~hc/RK356X_SDK_RELEASE.git

..	..	@@ -68,6 +68,20 @@
68	68	uint32_t bo_offset;
69	69	};
70	70
	71	+/**
	72	+ * vmw_surface_dirty - Surface dirty-tracker
	73	+ * @cache: Cached layout information of the surface.
	74	+ * @size: Accounting size for the struct vmw_surface_dirty.
	75	+ * @num_subres: Number of subresources.
	76	+ * @boxes: Array of SVGA3dBoxes indicating dirty regions. One per subresource.
	77	+ */
	78	+struct vmw_surface_dirty {
	79	+ struct svga3dsurface_cache cache;
	80	+ size_t size;
	81	+ u32 num_subres;
	82	+ SVGA3dBox boxes[];
	83	+};
	84	+
71	85	static void vmw_user_surface_free(struct vmw_resource *res);
72	86	static struct vmw_resource *
73	87	vmw_user_surface_base_to_res(struct ttm_base_object *base);
..	..	@@ -96,6 +110,13 @@
96	110	struct drm_vmw_gb_surface_ref_ext_rep *rep,
97	111	struct drm_file *file_priv);
98	112
	113	+static void vmw_surface_dirty_free(struct vmw_resource *res);
	114	+static int vmw_surface_dirty_alloc(struct vmw_resource *res);
	115	+static int vmw_surface_dirty_sync(struct vmw_resource *res);
	116	+static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
	117	+ size_t end);
	118	+static int vmw_surface_clean(struct vmw_resource *res);
	119	+
99	120	static const struct vmw_user_resource_conv user_surface_conv = {
100	121	.object_type = VMW_RES_SURFACE,
101	122	.base_obj_to_res = vmw_user_surface_base_to_res,
..	..	@@ -112,6 +133,8 @@
112	133	.res_type = vmw_res_surface,
113	134	.needs_backup = false,
114	135	.may_evict = true,
	136	+ .prio = 1,
	137	+ .dirty_prio = 1,
115	138	.type_name = "legacy surfaces",
116	139	.backup_placement = &vmw_srf_placement,
117	140	.create = &vmw_legacy_srf_create,
..	..	@@ -124,12 +147,19 @@
124	147	.res_type = vmw_res_surface,
125	148	.needs_backup = true,
126	149	.may_evict = true,
	150	+ .prio = 1,
	151	+ .dirty_prio = 2,
127	152	.type_name = "guest backed surfaces",
128	153	.backup_placement = &vmw_mob_placement,
129	154	.create = vmw_gb_surface_create,
130	155	.destroy = vmw_gb_surface_destroy,
131	156	.bind = vmw_gb_surface_bind,
132		- .unbind = vmw_gb_surface_unbind
	157	+ .unbind = vmw_gb_surface_unbind,
	158	+ .dirty_alloc = vmw_surface_dirty_alloc,
	159	+ .dirty_free = vmw_surface_dirty_free,
	160	+ .dirty_sync = vmw_surface_dirty_sync,
	161	+ .dirty_range_add = vmw_surface_dirty_range_add,
	162	+ .clean = vmw_surface_clean,
133	163	};
134	164
135	165	/**
..	..	@@ -169,7 +199,7 @@
169	199	*/
170	200	static inline uint32_t vmw_surface_dma_size(const struct vmw_surface *srf)
171	201	{
172		- return srf->num_sizes * sizeof(struct vmw_surface_dma);
	202	+ return srf->metadata.num_sizes * sizeof(struct vmw_surface_dma);
173	203	}
174	204
175	205
..	..	@@ -183,7 +213,7 @@
183	213	*/
184	214	static inline uint32_t vmw_surface_define_size(const struct vmw_surface *srf)
185	215	{
186		- return sizeof(struct vmw_surface_define) + srf->num_sizes *
	216	+ return sizeof(struct vmw_surface_define) + srf->metadata.num_sizes *
187	217	sizeof(SVGA3dSize);
188	218	}
189	219
..	..	@@ -232,7 +262,8 @@
232	262	uint32_t cmd_len;
233	263	int i;
234	264
235		- cmd_len = sizeof(cmd->body) + srf->num_sizes * sizeof(SVGA3dSize);
	265	+ cmd_len = sizeof(cmd->body) + srf->metadata.num_sizes *
	266	+ sizeof(SVGA3dSize);
236	267
237	268	cmd->header.id = SVGA_3D_CMD_SURFACE_DEFINE;
238	269	cmd->header.size = cmd_len;
..	..	@@ -242,16 +273,16 @@
242	273	* since driver internally stores as 64 bit.
243	274	* For legacy surface define only 32 bit flag is supported.
244	275	*/
245		- cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->flags;
246		- cmd->body.format = srf->format;
	276	+ cmd->body.surfaceFlags = (SVGA3dSurface1Flags)srf->metadata.flags;
	277	+ cmd->body.format = srf->metadata.format;
247	278	for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i)
248		- cmd->body.face[i].numMipLevels = srf->mip_levels[i];
	279	+ cmd->body.face[i].numMipLevels = srf->metadata.mip_levels[i];
249	280
250	281	cmd += 1;
251	282	cmd_size = (SVGA3dSize *) cmd;
252		- src_size = srf->sizes;
	283	+ src_size = srf->metadata.sizes;
253	284
254		- for (i = 0; i < srf->num_sizes; ++i, cmd_size++, src_size++) {
	285	+ for (i = 0; i < srf->metadata.num_sizes; ++i, cmd_size++, src_size++) {
255	286	cmd_size->width = src_size->width;
256	287	cmd_size->height = src_size->height;
257	288	cmd_size->depth = src_size->depth;
..	..	@@ -275,15 +306,15 @@
275	306	uint32_t i;
276	307	struct vmw_surface_dma cmd = (struct vmw_surface_dma )cmd_space;
277	308	const struct svga3d_surface_desc *desc =
278		- svga3dsurface_get_desc(srf->format);
	309	+ svga3dsurface_get_desc(srf->metadata.format);
279	310
280		- for (i = 0; i < srf->num_sizes; ++i) {
	311	+ for (i = 0; i < srf->metadata.num_sizes; ++i) {
281	312	SVGA3dCmdHeader *header = &cmd->header;
282	313	SVGA3dCmdSurfaceDMA *body = &cmd->body;
283	314	SVGA3dCopyBox *cb = &cmd->cb;
284	315	SVGA3dCmdSurfaceDMASuffix *suffix = &cmd->suffix;
285	316	const struct vmw_surface_offset *cur_offset = &srf->offsets[i];
286		- const struct drm_vmw_size *cur_size = &srf->sizes[i];
	317	+ const struct drm_vmw_size *cur_size = &srf->metadata.sizes[i];
287	318
288	319	header->id = SVGA_3D_CMD_SURFACE_DMA;
289	320	header->size = sizeof(body) + sizeof(cb) + sizeof(*suffix);
..	..	@@ -332,7 +363,6 @@
332	363	{
333	364
334	365	struct vmw_private *dev_priv = res->dev_priv;
335		- struct vmw_surface *srf;
336	366	void *cmd;
337	367
338	368	if (res->func->destroy == vmw_gb_surface_destroy) {
..	..	@@ -342,12 +372,9 @@
342	372
343	373	if (res->id != -1) {
344	374
345		- cmd = vmw_fifo_reserve(dev_priv, vmw_surface_destroy_size());
346		- if (unlikely(!cmd)) {
347		- DRM_ERROR("Failed reserving FIFO space for surface "
348		- "destruction.\n");
	375	+ cmd = VMW_FIFO_RESERVE(dev_priv, vmw_surface_destroy_size());
	376	+ if (unlikely(!cmd))
349	377	return;
350		- }
351	378
352	379	vmw_surface_destroy_encode(res->id, cmd);
353	380	vmw_fifo_commit(dev_priv, vmw_surface_destroy_size());
..	..	@@ -359,7 +386,6 @@
359	386	*/
360	387
361	388	mutex_lock(&dev_priv->cmdbuf_mutex);
362		- srf = vmw_res_to_srf(res);
363	389	dev_priv->used_memory_size -= res->backup_size;
364	390	mutex_unlock(&dev_priv->cmdbuf_mutex);
365	391	}
..	..	@@ -414,10 +440,8 @@
414	440	*/
415	441
416	442	submit_size = vmw_surface_define_size(srf);
417		- cmd = vmw_fifo_reserve(dev_priv, submit_size);
	443	+ cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
418	444	if (unlikely(!cmd)) {
419		- DRM_ERROR("Failed reserving FIFO space for surface "
420		- "creation.\n");
421	445	ret = -ENOMEM;
422	446	goto out_no_fifo;
423	447	}
..	..	@@ -468,12 +492,10 @@
468	492
469	493	BUG_ON(!val_buf->bo);
470	494	submit_size = vmw_surface_dma_size(srf);
471		- cmd = vmw_fifo_reserve(dev_priv, submit_size);
472		- if (unlikely(!cmd)) {
473		- DRM_ERROR("Failed reserving FIFO space for surface "
474		- "DMA.\n");
	495	+ cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
	496	+ if (unlikely(!cmd))
475	497	return -ENOMEM;
476		- }
	498	+
477	499	vmw_bo_get_guest_ptr(val_buf->bo, &ptr);
478	500	vmw_surface_dma_encode(srf, cmd, &ptr, bind);
479	501
..	..	@@ -556,12 +578,9 @@
556	578	*/
557	579
558	580	submit_size = vmw_surface_destroy_size();
559		- cmd = vmw_fifo_reserve(dev_priv, submit_size);
560		- if (unlikely(!cmd)) {
561		- DRM_ERROR("Failed reserving FIFO space for surface "
562		- "eviction.\n");
	581	+ cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
	582	+ if (unlikely(!cmd))
563	583	return -ENOMEM;
564		- }
565	584
566	585	vmw_surface_destroy_encode(res->id, cmd);
567	586	vmw_fifo_commit(dev_priv, submit_size);
..	..	@@ -614,7 +633,7 @@
614	633	*/
615	634
616	635	INIT_LIST_HEAD(&srf->view_list);
617		- vmw_resource_activate(res, vmw_hw_surface_destroy);
	636	+ res->hw_destroy = vmw_hw_surface_destroy;
618	637	return ret;
619	638	}
620	639
..	..	@@ -647,10 +666,11 @@
647	666	struct vmw_private *dev_priv = srf->res.dev_priv;
648	667	uint32_t size = user_srf->size;
649	668
	669	+ WARN_ON_ONCE(res->dirty);
650	670	if (user_srf->master)
651	671	drm_master_put(&user_srf->master);
652	672	kfree(srf->offsets);
653		- kfree(srf->sizes);
	673	+ kfree(srf->metadata.sizes);
654	674	kfree(srf->snooper.image);
655	675	ttm_prime_object_kfree(user_srf, prime);
656	676	ttm_mem_global_free(vmw_mem_glob(dev_priv), size);
..	..	@@ -709,6 +729,7 @@
709	729	struct vmw_private *dev_priv = vmw_priv(dev);
710	730	struct vmw_user_surface *user_srf;
711	731	struct vmw_surface *srf;
	732	+ struct vmw_surface_metadata *metadata;
712	733	struct vmw_resource *res;
713	734	struct vmw_resource *tmp;
714	735	union drm_vmw_surface_create_arg *arg =
..	..	@@ -731,7 +752,7 @@
731	752
732	753	if (unlikely(vmw_user_surface_size == 0))
733	754	vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
734		- 128;
	755	+ VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
735	756
736	757	num_sizes = 0;
737	758	for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
..	..	@@ -744,15 +765,14 @@
744	765	num_sizes == 0)
745	766	return -EINVAL;
746	767
747		- size = vmw_user_surface_size + 128 +
	768	+ size = vmw_user_surface_size +
748	769	ttm_round_pot(num_sizes * sizeof(struct drm_vmw_size)) +
749	770	ttm_round_pot(num_sizes * sizeof(struct vmw_surface_offset));
750	771
751		-
752	772	desc = svga3dsurface_get_desc(req->format);
753	773	if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
754		- DRM_ERROR("Invalid surface format for surface creation.\n");
755		- DRM_ERROR("Format requested is: %d\n", req->format);
	774	+ VMW_DEBUG_USER("Invalid format %d for surface creation.\n",
	775	+ req->format);
756	776	return -EINVAL;
757	777	}
758	778
..	..	@@ -764,8 +784,7 @@
764	784	size, &ctx);
765	785	if (unlikely(ret != 0)) {
766	786	if (ret != -ERESTARTSYS)
767		- DRM_ERROR("Out of graphics memory for surface"
768		- " creation.\n");
	787	+ DRM_ERROR("Out of graphics memory for surface.\n");
769	788	goto out_unlock;
770	789	}
771	790
..	..	@@ -776,43 +795,45 @@
776	795	}
777	796
778	797	srf = &user_srf->srf;
	798	+ metadata = &srf->metadata;
779	799	res = &srf->res;
780	800
781	801	/* Driver internally stores as 64-bit flags */
782		- srf->flags = (SVGA3dSurfaceAllFlags)req->flags;
783		- srf->format = req->format;
784		- srf->scanout = req->scanout;
	802	+ metadata->flags = (SVGA3dSurfaceAllFlags)req->flags;
	803	+ metadata->format = req->format;
	804	+ metadata->scanout = req->scanout;
785	805
786		- memcpy(srf->mip_levels, req->mip_levels, sizeof(srf->mip_levels));
787		- srf->num_sizes = num_sizes;
	806	+ memcpy(metadata->mip_levels, req->mip_levels,
	807	+ sizeof(metadata->mip_levels));
	808	+ metadata->num_sizes = num_sizes;
788	809	user_srf->size = size;
789		- srf->sizes = memdup_user((struct drm_vmw_size __user *)(unsigned long)
790		- req->size_addr,
791		- sizeof(srf->sizes) srf->num_sizes);
792		- if (IS_ERR(srf->sizes)) {
793		- ret = PTR_ERR(srf->sizes);
	810	+ metadata->sizes =
	811	+ memdup_user((struct drm_vmw_size __user *)(unsigned long)
	812	+ req->size_addr,
	813	+ sizeof(metadata->sizes) metadata->num_sizes);
	814	+ if (IS_ERR(metadata->sizes)) {
	815	+ ret = PTR_ERR(metadata->sizes);
794	816	goto out_no_sizes;
795	817	}
796		- srf->offsets = kmalloc_array(srf->num_sizes,
797		- sizeof(*srf->offsets),
	818	+ srf->offsets = kmalloc_array(metadata->num_sizes, sizeof(*srf->offsets),
798	819	GFP_KERNEL);
799	820	if (unlikely(!srf->offsets)) {
800	821	ret = -ENOMEM;
801	822	goto out_no_offsets;
802	823	}
803	824
804		- srf->base_size = *srf->sizes;
805		- srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
806		- srf->multisample_count = 0;
807		- srf->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
808		- srf->quality_level = SVGA3D_MS_QUALITY_NONE;
	825	+ metadata->base_size = *srf->metadata.sizes;
	826	+ metadata->autogen_filter = SVGA3D_TEX_FILTER_NONE;
	827	+ metadata->multisample_count = 0;
	828	+ metadata->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
	829	+ metadata->quality_level = SVGA3D_MS_QUALITY_NONE;
809	830
810	831	cur_bo_offset = 0;
811	832	cur_offset = srf->offsets;
812		- cur_size = srf->sizes;
	833	+ cur_size = metadata->sizes;
813	834
814	835	for (i = 0; i < DRM_VMW_MAX_SURFACE_FACES; ++i) {
815		- for (j = 0; j < srf->mip_levels[i]; ++j) {
	836	+ for (j = 0; j < metadata->mip_levels[i]; ++j) {
816	837	uint32_t stride = svga3dsurface_calculate_pitch
817	838	(desc, cur_size);
818	839
..	..	@@ -826,11 +847,11 @@
826	847	}
827	848	}
828	849	res->backup_size = cur_bo_offset;
829		- if (srf->scanout &&
830		- srf->num_sizes == 1 &&
831		- srf->sizes[0].width == 64 &&
832		- srf->sizes[0].height == 64 &&
833		- srf->format == SVGA3D_A8R8G8B8) {
	850	+ if (metadata->scanout &&
	851	+ metadata->num_sizes == 1 &&
	852	+ metadata->sizes[0].width == 64 &&
	853	+ metadata->sizes[0].height == 64 &&
	854	+ metadata->format == SVGA3D_A8R8G8B8) {
834	855
835	856	srf->snooper.image = kzalloc(64 * 64 * 4, GFP_KERNEL);
836	857	if (!srf->snooper.image) {
..	..	@@ -886,7 +907,7 @@
886	907	goto out_unlock;
887	908	}
888	909
889		- rep->sid = user_srf->prime.base.hash.key;
	910	+ rep->sid = user_srf->prime.base.handle;
890	911	vmw_resource_unreference(&res);
891	912
892	913	ttm_read_unlock(&dev_priv->reservation_sem);
..	..	@@ -894,7 +915,7 @@
894	915	out_no_copy:
895	916	kfree(srf->offsets);
896	917	out_no_offsets:
897		- kfree(srf->sizes);
	918	+ kfree(metadata->sizes);
898	919	out_no_sizes:
899	920	ttm_prime_object_kfree(user_srf, prime);
900	921	out_no_user_srf:
..	..	@@ -917,40 +938,39 @@
917	938	uint32_t handle;
918	939	struct ttm_base_object *base;
919	940	int ret;
920		- bool require_exist = false;
921	941
922	942	if (handle_type == DRM_VMW_HANDLE_PRIME) {
923	943	ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
924	944	if (unlikely(ret != 0))
925	945	return ret;
926	946	} else {
927		- if (unlikely(drm_is_render_client(file_priv)))
928		- require_exist = true;
929		-
930		- if (READ_ONCE(vmw_fpriv(file_priv)->locked_master)) {
931		- DRM_ERROR("Locked master refused legacy "
932		- "surface reference.\n");
933		- return -EACCES;
934		- }
935		-
936	947	handle = u_handle;
937	948	}
938	949
939	950	ret = -EINVAL;
940	951	base = ttm_base_object_lookup_for_ref(dev_priv->tdev, handle);
941	952	if (unlikely(!base)) {
942		- DRM_ERROR("Could not find surface to reference.\n");
	953	+ VMW_DEBUG_USER("Could not find surface to reference.\n");
943	954	goto out_no_lookup;
944	955	}
945	956
946	957	if (unlikely(ttm_base_object_type(base) != VMW_RES_SURFACE)) {
947		- DRM_ERROR("Referenced object is not a surface.\n");
	958	+ VMW_DEBUG_USER("Referenced object is not a surface.\n");
948	959	goto out_bad_resource;
949	960	}
950	961
951	962	if (handle_type != DRM_VMW_HANDLE_PRIME) {
	963	+ bool require_exist = false;
	964	+
952	965	user_srf = container_of(base, struct vmw_user_surface,
953	966	prime.base);
	967	+
	968	+ /* Error out if we are unauthenticated primary */
	969	+ if (drm_is_primary_client(file_priv) &&
	970	+ !file_priv->authenticated) {
	971	+ ret = -EACCES;
	972	+ goto out_bad_resource;
	973	+ }
954	974
955	975	/*
956	976	* Make sure the surface creator has the same
..	..	@@ -958,6 +978,9 @@
958	978	*/
959	979	if (drm_is_primary_client(file_priv) &&
960	980	user_srf->master != file_priv->master)
	981	+ require_exist = true;
	982	+
	983	+ if (unlikely(drm_is_render_client(file_priv)))
961	984	require_exist = true;
962	985
963	986	ret = ttm_ref_object_add(tfile, base, TTM_REF_USAGE, NULL,
..	..	@@ -1012,19 +1035,20 @@
1012	1035	srf = &user_srf->srf;
1013	1036
1014	1037	/* Downcast of flags when sending back to user space */
1015		- rep->flags = (uint32_t)srf->flags;
1016		- rep->format = srf->format;
1017		- memcpy(rep->mip_levels, srf->mip_levels, sizeof(srf->mip_levels));
	1038	+ rep->flags = (uint32_t)srf->metadata.flags;
	1039	+ rep->format = srf->metadata.format;
	1040	+ memcpy(rep->mip_levels, srf->metadata.mip_levels,
	1041	+ sizeof(srf->metadata.mip_levels));
1018	1042	user_sizes = (struct drm_vmw_size __user *)(unsigned long)
1019	1043	rep->size_addr;
1020	1044
1021	1045	if (user_sizes)
1022		- ret = copy_to_user(user_sizes, &srf->base_size,
1023		- sizeof(srf->base_size));
	1046	+ ret = copy_to_user(user_sizes, &srf->metadata.base_size,
	1047	+ sizeof(srf->metadata.base_size));
1024	1048	if (unlikely(ret != 0)) {
1025		- DRM_ERROR("copy_to_user failed %p %u\n",
1026		- user_sizes, srf->num_sizes);
1027		- ttm_ref_object_base_unref(tfile, base->hash.key, TTM_REF_USAGE);
	1049	+ VMW_DEBUG_USER("copy_to_user failed %p %u\n", user_sizes,
	1050	+ srf->metadata.num_sizes);
	1051	+ ttm_ref_object_base_unref(tfile, base->handle, TTM_REF_USAGE);
1028	1052	ret = -EFAULT;
1029	1053	}
1030	1054
..	..	@@ -1043,6 +1067,7 @@
1043	1067	{
1044	1068	struct vmw_private *dev_priv = res->dev_priv;
1045	1069	struct vmw_surface *srf = vmw_res_to_srf(res);
	1070	+ struct vmw_surface_metadata *metadata = &srf->metadata;
1046	1071	uint32_t cmd_len, cmd_id, submit_len;
1047	1072	int ret;
1048	1073	struct {
..	..	@@ -1057,6 +1082,10 @@
1057	1082	SVGA3dCmdHeader header;
1058	1083	SVGA3dCmdDefineGBSurface_v3 body;
1059	1084	} *cmd3;
	1085	+ struct {
	1086	+ SVGA3dCmdHeader header;
	1087	+ SVGA3dCmdDefineGBSurface_v4 body;
	1088	+ } *cmd4;
1060	1089
1061	1090	if (likely(res->id != -1))
1062	1091	return 0;
..	..	@@ -1073,12 +1102,16 @@
1073	1102	goto out_no_fifo;
1074	1103	}
1075	1104
1076		- if (dev_priv->has_sm4_1 && srf->array_size > 0) {
	1105	+ if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
	1106	+ cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V4;
	1107	+ cmd_len = sizeof(cmd4->body);
	1108	+ submit_len = sizeof(*cmd4);
	1109	+ } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1077	1110	cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V3;
1078	1111	cmd_len = sizeof(cmd3->body);
1079	1112	submit_len = sizeof(*cmd3);
1080		- } else if (srf->array_size > 0) {
1081		- /* has_dx checked on creation time. */
	1113	+ } else if (metadata->array_size > 0) {
	1114	+ /* VMW_SM_4 support verified at creation time. */
1082	1115	cmd_id = SVGA_3D_CMD_DEFINE_GB_SURFACE_V2;
1083	1116	cmd_len = sizeof(cmd2->body);
1084	1117	submit_len = sizeof(*cmd2);
..	..	@@ -1088,56 +1121,71 @@
1088	1121	submit_len = sizeof(*cmd);
1089	1122	}
1090	1123
1091		- cmd = vmw_fifo_reserve(dev_priv, submit_len);
	1124	+ cmd = VMW_FIFO_RESERVE(dev_priv, submit_len);
1092	1125	cmd2 = (typeof(cmd2))cmd;
1093	1126	cmd3 = (typeof(cmd3))cmd;
	1127	+ cmd4 = (typeof(cmd4))cmd;
1094	1128	if (unlikely(!cmd)) {
1095		- DRM_ERROR("Failed reserving FIFO space for surface "
1096		- "creation.\n");
1097	1129	ret = -ENOMEM;
1098	1130	goto out_no_fifo;
1099	1131	}
1100	1132
1101		- if (dev_priv->has_sm4_1 && srf->array_size > 0) {
	1133	+ if (has_sm5_context(dev_priv) && metadata->array_size > 0) {
	1134	+ cmd4->header.id = cmd_id;
	1135	+ cmd4->header.size = cmd_len;
	1136	+ cmd4->body.sid = srf->res.id;
	1137	+ cmd4->body.surfaceFlags = metadata->flags;
	1138	+ cmd4->body.format = metadata->format;
	1139	+ cmd4->body.numMipLevels = metadata->mip_levels[0];
	1140	+ cmd4->body.multisampleCount = metadata->multisample_count;
	1141	+ cmd4->body.multisamplePattern = metadata->multisample_pattern;
	1142	+ cmd4->body.qualityLevel = metadata->quality_level;
	1143	+ cmd4->body.autogenFilter = metadata->autogen_filter;
	1144	+ cmd4->body.size.width = metadata->base_size.width;
	1145	+ cmd4->body.size.height = metadata->base_size.height;
	1146	+ cmd4->body.size.depth = metadata->base_size.depth;
	1147	+ cmd4->body.arraySize = metadata->array_size;
	1148	+ cmd4->body.bufferByteStride = metadata->buffer_byte_stride;
	1149	+ } else if (has_sm4_1_context(dev_priv) && metadata->array_size > 0) {
1102	1150	cmd3->header.id = cmd_id;
1103	1151	cmd3->header.size = cmd_len;
1104	1152	cmd3->body.sid = srf->res.id;
1105		- cmd3->body.surfaceFlags = srf->flags;
1106		- cmd3->body.format = srf->format;
1107		- cmd3->body.numMipLevels = srf->mip_levels[0];
1108		- cmd3->body.multisampleCount = srf->multisample_count;
1109		- cmd3->body.multisamplePattern = srf->multisample_pattern;
1110		- cmd3->body.qualityLevel = srf->quality_level;
1111		- cmd3->body.autogenFilter = srf->autogen_filter;
1112		- cmd3->body.size.width = srf->base_size.width;
1113		- cmd3->body.size.height = srf->base_size.height;
1114		- cmd3->body.size.depth = srf->base_size.depth;
1115		- cmd3->body.arraySize = srf->array_size;
1116		- } else if (srf->array_size > 0) {
	1153	+ cmd3->body.surfaceFlags = metadata->flags;
	1154	+ cmd3->body.format = metadata->format;
	1155	+ cmd3->body.numMipLevels = metadata->mip_levels[0];
	1156	+ cmd3->body.multisampleCount = metadata->multisample_count;
	1157	+ cmd3->body.multisamplePattern = metadata->multisample_pattern;
	1158	+ cmd3->body.qualityLevel = metadata->quality_level;
	1159	+ cmd3->body.autogenFilter = metadata->autogen_filter;
	1160	+ cmd3->body.size.width = metadata->base_size.width;
	1161	+ cmd3->body.size.height = metadata->base_size.height;
	1162	+ cmd3->body.size.depth = metadata->base_size.depth;
	1163	+ cmd3->body.arraySize = metadata->array_size;
	1164	+ } else if (metadata->array_size > 0) {
1117	1165	cmd2->header.id = cmd_id;
1118	1166	cmd2->header.size = cmd_len;
1119	1167	cmd2->body.sid = srf->res.id;
1120		- cmd2->body.surfaceFlags = srf->flags;
1121		- cmd2->body.format = srf->format;
1122		- cmd2->body.numMipLevels = srf->mip_levels[0];
1123		- cmd2->body.multisampleCount = srf->multisample_count;
1124		- cmd2->body.autogenFilter = srf->autogen_filter;
1125		- cmd2->body.size.width = srf->base_size.width;
1126		- cmd2->body.size.height = srf->base_size.height;
1127		- cmd2->body.size.depth = srf->base_size.depth;
1128		- cmd2->body.arraySize = srf->array_size;
	1168	+ cmd2->body.surfaceFlags = metadata->flags;
	1169	+ cmd2->body.format = metadata->format;
	1170	+ cmd2->body.numMipLevels = metadata->mip_levels[0];
	1171	+ cmd2->body.multisampleCount = metadata->multisample_count;
	1172	+ cmd2->body.autogenFilter = metadata->autogen_filter;
	1173	+ cmd2->body.size.width = metadata->base_size.width;
	1174	+ cmd2->body.size.height = metadata->base_size.height;
	1175	+ cmd2->body.size.depth = metadata->base_size.depth;
	1176	+ cmd2->body.arraySize = metadata->array_size;
1129	1177	} else {
1130	1178	cmd->header.id = cmd_id;
1131	1179	cmd->header.size = cmd_len;
1132	1180	cmd->body.sid = srf->res.id;
1133		- cmd->body.surfaceFlags = srf->flags;
1134		- cmd->body.format = srf->format;
1135		- cmd->body.numMipLevels = srf->mip_levels[0];
1136		- cmd->body.multisampleCount = srf->multisample_count;
1137		- cmd->body.autogenFilter = srf->autogen_filter;
1138		- cmd->body.size.width = srf->base_size.width;
1139		- cmd->body.size.height = srf->base_size.height;
1140		- cmd->body.size.depth = srf->base_size.depth;
	1181	+ cmd->body.surfaceFlags = metadata->flags;
	1182	+ cmd->body.format = metadata->format;
	1183	+ cmd->body.numMipLevels = metadata->mip_levels[0];
	1184	+ cmd->body.multisampleCount = metadata->multisample_count;
	1185	+ cmd->body.autogenFilter = metadata->autogen_filter;
	1186	+ cmd->body.size.width = metadata->base_size.width;
	1187	+ cmd->body.size.height = metadata->base_size.height;
	1188	+ cmd->body.size.depth = metadata->base_size.depth;
1141	1189	}
1142	1190
1143	1191	vmw_fifo_commit(dev_priv, submit_len);
..	..	@@ -1171,12 +1219,9 @@
1171	1219
1172	1220	submit_size = sizeof(cmd1) + (res->backup_dirty ? sizeof(cmd2) : 0);
1173	1221
1174		- cmd1 = vmw_fifo_reserve(dev_priv, submit_size);
1175		- if (unlikely(!cmd1)) {
1176		- DRM_ERROR("Failed reserving FIFO space for surface "
1177		- "binding.\n");
	1222	+ cmd1 = VMW_FIFO_RESERVE(dev_priv, submit_size);
	1223	+ if (unlikely(!cmd1))
1178	1224	return -ENOMEM;
1179		- }
1180	1225
1181	1226	cmd1->header.id = SVGA_3D_CMD_BIND_GB_SURFACE;
1182	1227	cmd1->header.size = sizeof(cmd1->body);
..	..	@@ -1187,9 +1232,15 @@
1187	1232	cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_SURFACE;
1188	1233	cmd2->header.size = sizeof(cmd2->body);
1189	1234	cmd2->body.sid = res->id;
1190		- res->backup_dirty = false;
1191	1235	}
1192	1236	vmw_fifo_commit(dev_priv, submit_size);
	1237	+
	1238	+ if (res->backup->dirty && res->backup_dirty) {
	1239	+ /* We've just made a full upload. Cear dirty regions. */
	1240	+ vmw_bo_dirty_clear_res(res);
	1241	+ }
	1242	+
	1243	+ res->backup_dirty = false;
1193	1244
1194	1245	return 0;
1195	1246	}
..	..	@@ -1221,12 +1272,9 @@
1221	1272	BUG_ON(bo->mem.mem_type != VMW_PL_MOB);
1222	1273
1223	1274	submit_size = sizeof(cmd3) + (readback ? sizeof(cmd1) : sizeof(*cmd2));
1224		- cmd = vmw_fifo_reserve(dev_priv, submit_size);
1225		- if (unlikely(!cmd)) {
1226		- DRM_ERROR("Failed reserving FIFO space for surface "
1227		- "unbinding.\n");
	1275	+ cmd = VMW_FIFO_RESERVE(dev_priv, submit_size);
	1276	+ if (unlikely(!cmd))
1228	1277	return -ENOMEM;
1229		- }
1230	1278
1231	1279	if (readback) {
1232	1280	cmd1 = (void *) cmd;
..	..	@@ -1280,10 +1328,8 @@
1280	1328	vmw_view_surface_list_destroy(dev_priv, &srf->view_list);
1281	1329	vmw_binding_res_list_scrub(&res->binding_head);
1282	1330
1283		- cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
	1331	+ cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
1284	1332	if (unlikely(!cmd)) {
1285		- DRM_ERROR("Failed reserving FIFO space for surface "
1286		- "destruction.\n");
1287	1333	mutex_unlock(&dev_priv->binding_mutex);
1288	1334	return -ENOMEM;
1289	1335	}
..	..	@@ -1298,7 +1344,6 @@
1298	1344
1299	1345	return 0;
1300	1346	}
1301		-
1302	1347
1303	1348	/**
1304	1349	* vmw_gb_surface_define_ioctl - Ioctl function implementing
..	..	@@ -1321,6 +1366,7 @@
1321	1366	req_ext.svga3d_flags_upper_32_bits = 0;
1322	1367	req_ext.multisample_pattern = SVGA3D_MS_PATTERN_NONE;
1323	1368	req_ext.quality_level = SVGA3D_MS_QUALITY_NONE;
	1369	+ req_ext.buffer_byte_stride = 0;
1324	1370	req_ext.must_be_zero = 0;
1325	1371
1326	1372	return vmw_gb_surface_define_internal(dev, &req_ext, rep, file_priv);
..	..	@@ -1352,171 +1398,6 @@
1352	1398	rep->creq = rep_ext.creq.base;
1353	1399	rep->crep = rep_ext.crep;
1354	1400
1355		- return ret;
1356		-}
1357		-
1358		-/**
1359		- * vmw_surface_gb_priv_define - Define a private GB surface
1360		- *
1361		- * @dev: Pointer to a struct drm_device
1362		- * @user_accounting_size: Used to track user-space memory usage, set
1363		- * to 0 for kernel mode only memory
1364		- * @svga3d_flags: SVGA3d surface flags for the device
1365		- * @format: requested surface format
1366		- * @for_scanout: true if inteded to be used for scanout buffer
1367		- * @num_mip_levels: number of MIP levels
1368		- * @multisample_count:
1369		- * @array_size: Surface array size.
1370		- * @size: width, heigh, depth of the surface requested
1371		- * @multisample_pattern: Multisampling pattern when msaa is supported
1372		- * @quality_level: Precision settings
1373		- * @user_srf_out: allocated user_srf. Set to NULL on failure.
1374		- *
1375		- * GB surfaces allocated by this function will not have a user mode handle, and
1376		- * thus will only be visible to vmwgfx. For optimization reasons the
1377		- * surface may later be given a user mode handle by another function to make
1378		- * it available to user mode drivers.
1379		- */
1380		-int vmw_surface_gb_priv_define(struct drm_device *dev,
1381		- uint32_t user_accounting_size,
1382		- SVGA3dSurfaceAllFlags svga3d_flags,
1383		- SVGA3dSurfaceFormat format,
1384		- bool for_scanout,
1385		- uint32_t num_mip_levels,
1386		- uint32_t multisample_count,
1387		- uint32_t array_size,
1388		- struct drm_vmw_size size,
1389		- SVGA3dMSPattern multisample_pattern,
1390		- SVGA3dMSQualityLevel quality_level,
1391		- struct vmw_surface **srf_out)
1392		-{
1393		- struct vmw_private *dev_priv = vmw_priv(dev);
1394		- struct vmw_user_surface *user_srf;
1395		- struct ttm_operation_ctx ctx = {
1396		- .interruptible = true,
1397		- .no_wait_gpu = false
1398		- };
1399		- struct vmw_surface *srf;
1400		- int ret;
1401		- u32 num_layers = 1;
1402		- u32 sample_count = 1;
1403		-
1404		- *srf_out = NULL;
1405		-
1406		- if (for_scanout) {
1407		- if (!svga3dsurface_is_screen_target_format(format)) {
1408		- DRM_ERROR("Invalid Screen Target surface format.");
1409		- return -EINVAL;
1410		- }
1411		-
1412		- if (size.width > dev_priv->texture_max_width \|\|
1413		- size.height > dev_priv->texture_max_height) {
1414		- DRM_ERROR("%ux%u\n, exceeds max surface size %ux%u",
1415		- size.width, size.height,
1416		- dev_priv->texture_max_width,
1417		- dev_priv->texture_max_height);
1418		- return -EINVAL;
1419		- }
1420		- } else {
1421		- const struct svga3d_surface_desc *desc;
1422		-
1423		- desc = svga3dsurface_get_desc(format);
1424		- if (unlikely(desc->block_desc == SVGA3DBLOCKDESC_NONE)) {
1425		- DRM_ERROR("Invalid surface format.\n");
1426		- return -EINVAL;
1427		- }
1428		- }
1429		-
1430		- /* array_size must be null for non-GL3 host. */
1431		- if (array_size > 0 && !dev_priv->has_dx) {
1432		- DRM_ERROR("Tried to create DX surface on non-DX host.\n");
1433		- return -EINVAL;
1434		- }
1435		-
1436		- ret = ttm_read_lock(&dev_priv->reservation_sem, true);
1437		- if (unlikely(ret != 0))
1438		- return ret;
1439		-
1440		- ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
1441		- user_accounting_size, &ctx);
1442		- if (unlikely(ret != 0)) {
1443		- if (ret != -ERESTARTSYS)
1444		- DRM_ERROR("Out of graphics memory for surface"
1445		- " creation.\n");
1446		- goto out_unlock;
1447		- }
1448		-
1449		- user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
1450		- if (unlikely(!user_srf)) {
1451		- ret = -ENOMEM;
1452		- goto out_no_user_srf;
1453		- }
1454		-
1455		- *srf_out = &user_srf->srf;
1456		- user_srf->size = user_accounting_size;
1457		- user_srf->prime.base.shareable = false;
1458		- user_srf->prime.base.tfile = NULL;
1459		-
1460		- srf = &user_srf->srf;
1461		- srf->flags = svga3d_flags;
1462		- srf->format = format;
1463		- srf->scanout = for_scanout;
1464		- srf->mip_levels[0] = num_mip_levels;
1465		- srf->num_sizes = 1;
1466		- srf->sizes = NULL;
1467		- srf->offsets = NULL;
1468		- srf->base_size = size;
1469		- srf->autogen_filter = SVGA3D_TEX_FILTER_NONE;
1470		- srf->array_size = array_size;
1471		- srf->multisample_count = multisample_count;
1472		- srf->multisample_pattern = multisample_pattern;
1473		- srf->quality_level = quality_level;
1474		-
1475		- if (array_size)
1476		- num_layers = array_size;
1477		- else if (svga3d_flags & SVGA3D_SURFACE_CUBEMAP)
1478		- num_layers = SVGA3D_MAX_SURFACE_FACES;
1479		-
1480		- if (srf->flags & SVGA3D_SURFACE_MULTISAMPLE)
1481		- sample_count = srf->multisample_count;
1482		-
1483		- srf->res.backup_size =
1484		- svga3dsurface_get_serialized_size_extended(srf->format,
1485		- srf->base_size,
1486		- srf->mip_levels[0],
1487		- num_layers,
1488		- sample_count);
1489		-
1490		- if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
1491		- srf->res.backup_size += sizeof(SVGA3dDXSOState);
1492		-
1493		- /*
1494		- * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
1495		- * size greater than STDU max width/height. This is really a workaround
1496		- * to support creation of big framebuffer requested by some user-space
1497		- * for whole topology. That big framebuffer won't really be used for
1498		- * binding with screen target as during prepare_fb a separate surface is
1499		- * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
1500		- */
1501		- if (dev_priv->active_display_unit == vmw_du_screen_target &&
1502		- for_scanout && size.width <= dev_priv->stdu_max_width &&
1503		- size.height <= dev_priv->stdu_max_height)
1504		- srf->flags \|= SVGA3D_SURFACE_SCREENTARGET;
1505		-
1506		- /*
1507		- * From this point, the generic resource management functions
1508		- * destroy the object on failure.
1509		- */
1510		- ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
1511		-
1512		- ttm_read_unlock(&dev_priv->reservation_sem);
1513		- return ret;
1514		-
1515		-out_no_user_srf:
1516		- ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
1517		-
1518		-out_unlock:
1519		- ttm_read_unlock(&dev_priv->reservation_sem);
1520	1401	return ret;
1521	1402	}
1522	1403
..	..	@@ -1573,66 +1454,86 @@
1573	1454	struct drm_vmw_gb_surface_create_rep *rep,
1574	1455	struct drm_file *file_priv)
1575	1456	{
	1457	+ struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1576	1458	struct vmw_private *dev_priv = vmw_priv(dev);
1577	1459	struct vmw_user_surface *user_srf;
	1460	+ struct vmw_surface_metadata metadata = {0};
1578	1461	struct vmw_surface *srf;
1579	1462	struct vmw_resource *res;
1580	1463	struct vmw_resource *tmp;
1581		- struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1582		- int ret;
	1464	+ int ret = 0;
1583	1465	uint32_t size;
1584	1466	uint32_t backup_handle = 0;
1585	1467	SVGA3dSurfaceAllFlags svga3d_flags_64 =
1586	1468	SVGA3D_FLAGS_64(req->svga3d_flags_upper_32_bits,
1587	1469	req->base.svga3d_flags);
1588	1470
1589		- if (!dev_priv->has_sm4_1) {
1590		- /*
1591		- * If SM4_1 is not support then cannot send 64-bit flag to
1592		- * device.
1593		- */
	1471	+ /* array_size must be null for non-GL3 host. */
	1472	+ if (req->base.array_size > 0 && !has_sm4_context(dev_priv)) {
	1473	+ VMW_DEBUG_USER("SM4 surface not supported.\n");
	1474	+ return -EINVAL;
	1475	+ }
	1476	+
	1477	+ if (!has_sm4_1_context(dev_priv)) {
1594	1478	if (req->svga3d_flags_upper_32_bits != 0)
1595		- return -EINVAL;
	1479	+ ret = -EINVAL;
1596	1480
1597	1481	if (req->base.multisample_count != 0)
1598		- return -EINVAL;
	1482	+ ret = -EINVAL;
1599	1483
1600	1484	if (req->multisample_pattern != SVGA3D_MS_PATTERN_NONE)
1601		- return -EINVAL;
	1485	+ ret = -EINVAL;
1602	1486
1603	1487	if (req->quality_level != SVGA3D_MS_QUALITY_NONE)
1604		- return -EINVAL;
	1488	+ ret = -EINVAL;
	1489	+
	1490	+ if (ret) {
	1491	+ VMW_DEBUG_USER("SM4.1 surface not supported.\n");
	1492	+ return ret;
	1493	+ }
	1494	+ }
	1495	+
	1496	+ if (req->buffer_byte_stride > 0 && !has_sm5_context(dev_priv)) {
	1497	+ VMW_DEBUG_USER("SM5 surface not supported.\n");
	1498	+ return -EINVAL;
1605	1499	}
1606	1500
1607	1501	if ((svga3d_flags_64 & SVGA3D_SURFACE_MULTISAMPLE) &&
1608		- req->base.multisample_count == 0)
	1502	+ req->base.multisample_count == 0) {
	1503	+ VMW_DEBUG_USER("Invalid sample count.\n");
1609	1504	return -EINVAL;
	1505	+ }
1610	1506
1611		- if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS)
	1507	+ if (req->base.mip_levels > DRM_VMW_MAX_MIP_LEVELS) {
	1508	+ VMW_DEBUG_USER("Invalid mip level.\n");
1612	1509	return -EINVAL;
	1510	+ }
1613	1511
1614	1512	if (unlikely(vmw_user_surface_size == 0))
1615	1513	vmw_user_surface_size = ttm_round_pot(sizeof(*user_srf)) +
1616		- 128;
	1514	+ VMW_IDA_ACC_SIZE + TTM_OBJ_EXTRA_SIZE;
1617	1515
1618		- size = vmw_user_surface_size + 128;
	1516	+ size = vmw_user_surface_size;
	1517	+
	1518	+ metadata.flags = svga3d_flags_64;
	1519	+ metadata.format = req->base.format;
	1520	+ metadata.mip_levels[0] = req->base.mip_levels;
	1521	+ metadata.multisample_count = req->base.multisample_count;
	1522	+ metadata.multisample_pattern = req->multisample_pattern;
	1523	+ metadata.quality_level = req->quality_level;
	1524	+ metadata.array_size = req->base.array_size;
	1525	+ metadata.buffer_byte_stride = req->buffer_byte_stride;
	1526	+ metadata.num_sizes = 1;
	1527	+ metadata.base_size = req->base.base_size;
	1528	+ metadata.scanout = req->base.drm_surface_flags &
	1529	+ drm_vmw_surface_flag_scanout;
1619	1530
1620	1531	/* Define a surface based on the parameters. */
1621		- ret = vmw_surface_gb_priv_define(dev,
1622		- size,
1623		- svga3d_flags_64,
1624		- req->base.format,
1625		- req->base.drm_surface_flags &
1626		- drm_vmw_surface_flag_scanout,
1627		- req->base.mip_levels,
1628		- req->base.multisample_count,
1629		- req->base.array_size,
1630		- req->base.base_size,
1631		- req->multisample_pattern,
1632		- req->quality_level,
1633		- &srf);
1634		- if (unlikely(ret != 0))
	1532	+ ret = vmw_gb_surface_define(dev_priv, size, &metadata, &srf);
	1533	+ if (ret != 0) {
	1534	+ VMW_DEBUG_USER("Failed to define surface.\n");
1635	1535	return ret;
	1536	+ }
1636	1537
1637	1538	user_srf = container_of(srf, struct vmw_user_surface, srf);
1638	1539	if (drm_is_primary_client(file_priv))
..	..	@@ -1651,7 +1552,7 @@
1651	1552	if (ret == 0) {
1652	1553	if (res->backup->base.num_pages * PAGE_SIZE <
1653	1554	res->backup_size) {
1654		- DRM_ERROR("Surface backup buffer too small.\n");
	1555	+ VMW_DEBUG_USER("Surface backup buffer too small.\n");
1655	1556	vmw_bo_unreference(&res->backup);
1656	1557	ret = -EINVAL;
1657	1558	goto out_unlock;
..	..	@@ -1660,7 +1561,8 @@
1660	1561	}
1661	1562	}
1662	1563	} else if (req->base.drm_surface_flags &
1663		- drm_vmw_surface_flag_create_buffer)
	1564	+ (drm_vmw_surface_flag_create_buffer \|
	1565	+ drm_vmw_surface_flag_coherent))
1664	1566	ret = vmw_user_bo_alloc(dev_priv, tfile,
1665	1567	res->backup_size,
1666	1568	req->base.drm_surface_flags &
..	..	@@ -1672,6 +1574,26 @@
1672	1574	if (unlikely(ret != 0)) {
1673	1575	vmw_resource_unreference(&res);
1674	1576	goto out_unlock;
	1577	+ }
	1578	+
	1579	+ if (req->base.drm_surface_flags & drm_vmw_surface_flag_coherent) {
	1580	+ struct vmw_buffer_object *backup = res->backup;
	1581	+
	1582	+ ttm_bo_reserve(&backup->base, false, false, NULL);
	1583	+ if (!res->func->dirty_alloc)
	1584	+ ret = -EINVAL;
	1585	+ if (!ret)
	1586	+ ret = vmw_bo_dirty_add(backup);
	1587	+ if (!ret) {
	1588	+ res->coherent = true;
	1589	+ ret = res->func->dirty_alloc(res);
	1590	+ }
	1591	+ ttm_bo_unreserve(&backup->base);
	1592	+ if (ret) {
	1593	+ vmw_resource_unreference(&res);
	1594	+ goto out_unlock;
	1595	+ }
	1596	+
1675	1597	}
1676	1598
1677	1599	tmp = vmw_resource_reference(res);
..	..	@@ -1687,11 +1609,11 @@
1687	1609	goto out_unlock;
1688	1610	}
1689	1611
1690		- rep->handle = user_srf->prime.base.hash.key;
	1612	+ rep->handle = user_srf->prime.base.handle;
1691	1613	rep->backup_size = res->backup_size;
1692	1614	if (res->backup) {
1693	1615	rep->buffer_map_handle =
1694		- drm_vma_node_offset_addr(&res->backup->base.vma_node);
	1616	+ drm_vma_node_offset_addr(&res->backup->base.base.vma_node);
1695	1617	rep->buffer_size = res->backup->base.num_pages * PAGE_SIZE;
1696	1618	rep->buffer_handle = backup_handle;
1697	1619	} else {
..	..	@@ -1726,9 +1648,10 @@
1726	1648	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
1727	1649	struct vmw_surface *srf;
1728	1650	struct vmw_user_surface *user_srf;
	1651	+ struct vmw_surface_metadata *metadata;
1729	1652	struct ttm_base_object *base;
1730	1653	uint32_t backup_handle;
1731		- int ret = -EINVAL;
	1654	+ int ret;
1732	1655
1733	1656	ret = vmw_surface_handle_reference(dev_priv, file_priv, req->sid,
1734	1657	req->handle_type, &base);
..	..	@@ -1741,6 +1664,7 @@
1741	1664	DRM_ERROR("Shared GB surface is missing a backup buffer.\n");
1742	1665	goto out_bad_resource;
1743	1666	}
	1667	+ metadata = &srf->metadata;
1744	1668
1745	1669	mutex_lock(&dev_priv->cmdbuf_mutex); /* Protect res->backup */
1746	1670	ret = vmw_user_bo_reference(tfile, srf->res.backup, &backup_handle);
..	..	@@ -1749,32 +1673,32 @@
1749	1673	if (unlikely(ret != 0)) {
1750	1674	DRM_ERROR("Could not add a reference to a GB surface "
1751	1675	"backup buffer.\n");
1752		- (void) ttm_ref_object_base_unref(tfile, base->hash.key,
	1676	+ (void) ttm_ref_object_base_unref(tfile, base->handle,
1753	1677	TTM_REF_USAGE);
1754	1678	goto out_bad_resource;
1755	1679	}
1756	1680
1757		- rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(srf->flags);
1758		- rep->creq.base.format = srf->format;
1759		- rep->creq.base.mip_levels = srf->mip_levels[0];
	1681	+ rep->creq.base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(metadata->flags);
	1682	+ rep->creq.base.format = metadata->format;
	1683	+ rep->creq.base.mip_levels = metadata->mip_levels[0];
1760	1684	rep->creq.base.drm_surface_flags = 0;
1761		- rep->creq.base.multisample_count = srf->multisample_count;
1762		- rep->creq.base.autogen_filter = srf->autogen_filter;
1763		- rep->creq.base.array_size = srf->array_size;
	1685	+ rep->creq.base.multisample_count = metadata->multisample_count;
	1686	+ rep->creq.base.autogen_filter = metadata->autogen_filter;
	1687	+ rep->creq.base.array_size = metadata->array_size;
1764	1688	rep->creq.base.buffer_handle = backup_handle;
1765		- rep->creq.base.base_size = srf->base_size;
1766		- rep->crep.handle = user_srf->prime.base.hash.key;
	1689	+ rep->creq.base.base_size = metadata->base_size;
	1690	+ rep->crep.handle = user_srf->prime.base.handle;
1767	1691	rep->crep.backup_size = srf->res.backup_size;
1768	1692	rep->crep.buffer_handle = backup_handle;
1769	1693	rep->crep.buffer_map_handle =
1770		- drm_vma_node_offset_addr(&srf->res.backup->base.vma_node);
	1694	+ drm_vma_node_offset_addr(&srf->res.backup->base.base.vma_node);
1771	1695	rep->crep.buffer_size = srf->res.backup->base.num_pages * PAGE_SIZE;
1772	1696
1773	1697	rep->creq.version = drm_vmw_gb_surface_v1;
1774	1698	rep->creq.svga3d_flags_upper_32_bits =
1775		- SVGA3D_FLAGS_UPPER_32(srf->flags);
1776		- rep->creq.multisample_pattern = srf->multisample_pattern;
1777		- rep->creq.quality_level = srf->quality_level;
	1699	+ SVGA3D_FLAGS_UPPER_32(metadata->flags);
	1700	+ rep->creq.multisample_pattern = metadata->multisample_pattern;
	1701	+ rep->creq.quality_level = metadata->quality_level;
1778	1702	rep->creq.must_be_zero = 0;
1779	1703
1780	1704	out_bad_resource:
..	..	@@ -1782,3 +1706,497 @@
1782	1706
1783	1707	return ret;
1784	1708	}
	1709	+
	1710	+/**
	1711	+ * vmw_subres_dirty_add - Add a dirty region to a subresource
	1712	+ * @dirty: The surfaces's dirty tracker.
	1713	+ * @loc_start: The location corresponding to the start of the region.
	1714	+ * @loc_end: The location corresponding to the end of the region.
	1715	+ *
	1716	+ * As we are assuming that @loc_start and @loc_end represent a sequential
	1717	+ * range of backing store memory, if the region spans multiple lines then
	1718	+ * regardless of the x coordinate, the full lines are dirtied.
	1719	+ * Correspondingly if the region spans multiple z slices, then full rather
	1720	+ * than partial z slices are dirtied.
	1721	+ */
	1722	+static void vmw_subres_dirty_add(struct vmw_surface_dirty *dirty,
	1723	+ const struct svga3dsurface_loc *loc_start,
	1724	+ const struct svga3dsurface_loc *loc_end)
	1725	+{
	1726	+ const struct svga3dsurface_cache *cache = &dirty->cache;
	1727	+ SVGA3dBox *box = &dirty->boxes[loc_start->sub_resource];
	1728	+ u32 mip = loc_start->sub_resource % cache->num_mip_levels;
	1729	+ const struct drm_vmw_size *size = &cache->mip[mip].size;
	1730	+ u32 box_c2 = box->z + box->d;
	1731	+
	1732	+ if (WARN_ON(loc_start->sub_resource >= dirty->num_subres))
	1733	+ return;
	1734	+
	1735	+ if (box->d == 0 \|\| box->z > loc_start->z)
	1736	+ box->z = loc_start->z;
	1737	+ if (box_c2 < loc_end->z)
	1738	+ box->d = loc_end->z - box->z;
	1739	+
	1740	+ if (loc_start->z + 1 == loc_end->z) {
	1741	+ box_c2 = box->y + box->h;
	1742	+ if (box->h == 0 \|\| box->y > loc_start->y)
	1743	+ box->y = loc_start->y;
	1744	+ if (box_c2 < loc_end->y)
	1745	+ box->h = loc_end->y - box->y;
	1746	+
	1747	+ if (loc_start->y + 1 == loc_end->y) {
	1748	+ box_c2 = box->x + box->w;
	1749	+ if (box->w == 0 \|\| box->x > loc_start->x)
	1750	+ box->x = loc_start->x;
	1751	+ if (box_c2 < loc_end->x)
	1752	+ box->w = loc_end->x - box->x;
	1753	+ } else {
	1754	+ box->x = 0;
	1755	+ box->w = size->width;
	1756	+ }
	1757	+ } else {
	1758	+ box->y = 0;
	1759	+ box->h = size->height;
	1760	+ box->x = 0;
	1761	+ box->w = size->width;
	1762	+ }
	1763	+}
	1764	+
	1765	+/**
	1766	+ * vmw_subres_dirty_full - Mark a full subresource as dirty
	1767	+ * @dirty: The surface's dirty tracker.
	1768	+ * @subres: The subresource
	1769	+ */
	1770	+static void vmw_subres_dirty_full(struct vmw_surface_dirty *dirty, u32 subres)
	1771	+{
	1772	+ const struct svga3dsurface_cache *cache = &dirty->cache;
	1773	+ u32 mip = subres % cache->num_mip_levels;
	1774	+ const struct drm_vmw_size *size = &cache->mip[mip].size;
	1775	+ SVGA3dBox *box = &dirty->boxes[subres];
	1776	+
	1777	+ box->x = 0;
	1778	+ box->y = 0;
	1779	+ box->z = 0;
	1780	+ box->w = size->width;
	1781	+ box->h = size->height;
	1782	+ box->d = size->depth;
	1783	+}
	1784	+
	1785	+/*
	1786	+ * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for texture
	1787	+ * surfaces.
	1788	+ */
	1789	+static void vmw_surface_tex_dirty_range_add(struct vmw_resource *res,
	1790	+ size_t start, size_t end)
	1791	+{
	1792	+ struct vmw_surface_dirty *dirty =
	1793	+ (struct vmw_surface_dirty *) res->dirty;
	1794	+ size_t backup_end = res->backup_offset + res->backup_size;
	1795	+ struct svga3dsurface_loc loc1, loc2;
	1796	+ const struct svga3dsurface_cache *cache;
	1797	+
	1798	+ start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
	1799	+ end = min(end, backup_end) - res->backup_offset;
	1800	+ cache = &dirty->cache;
	1801	+ svga3dsurface_get_loc(cache, &loc1, start);
	1802	+ svga3dsurface_get_loc(cache, &loc2, end - 1);
	1803	+ svga3dsurface_inc_loc(cache, &loc2);
	1804	+
	1805	+ if (loc1.sheet != loc2.sheet) {
	1806	+ u32 sub_res;
	1807	+
	1808	+ /*
	1809	+ * Multiple multisample sheets. To do this in an optimized
	1810	+ * fashion, compute the dirty region for each sheet and the
	1811	+ * resulting union. Since this is not a common case, just dirty
	1812	+ * the whole surface.
	1813	+ */
	1814	+ for (sub_res = 0; sub_res < dirty->num_subres; ++sub_res)
	1815	+ vmw_subres_dirty_full(dirty, sub_res);
	1816	+ return;
	1817	+ }
	1818	+ if (loc1.sub_resource + 1 == loc2.sub_resource) {
	1819	+ /* Dirty range covers a single sub-resource */
	1820	+ vmw_subres_dirty_add(dirty, &loc1, &loc2);
	1821	+ } else {
	1822	+ /* Dirty range covers multiple sub-resources */
	1823	+ struct svga3dsurface_loc loc_min, loc_max;
	1824	+ u32 sub_res;
	1825	+
	1826	+ svga3dsurface_max_loc(cache, loc1.sub_resource, &loc_max);
	1827	+ vmw_subres_dirty_add(dirty, &loc1, &loc_max);
	1828	+ svga3dsurface_min_loc(cache, loc2.sub_resource - 1, &loc_min);
	1829	+ vmw_subres_dirty_add(dirty, &loc_min, &loc2);
	1830	+ for (sub_res = loc1.sub_resource + 1;
	1831	+ sub_res < loc2.sub_resource - 1; ++sub_res)
	1832	+ vmw_subres_dirty_full(dirty, sub_res);
	1833	+ }
	1834	+}
	1835	+
	1836	+/*
	1837	+ * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for buffer
	1838	+ * surfaces.
	1839	+ */
	1840	+static void vmw_surface_buf_dirty_range_add(struct vmw_resource *res,
	1841	+ size_t start, size_t end)
	1842	+{
	1843	+ struct vmw_surface_dirty *dirty =
	1844	+ (struct vmw_surface_dirty *) res->dirty;
	1845	+ const struct svga3dsurface_cache *cache = &dirty->cache;
	1846	+ size_t backup_end = res->backup_offset + cache->mip_chain_bytes;
	1847	+ SVGA3dBox *box = &dirty->boxes[0];
	1848	+ u32 box_c2;
	1849	+
	1850	+ box->h = box->d = 1;
	1851	+ start = max_t(size_t, start, res->backup_offset) - res->backup_offset;
	1852	+ end = min(end, backup_end) - res->backup_offset;
	1853	+ box_c2 = box->x + box->w;
	1854	+ if (box->w == 0 \|\| box->x > start)
	1855	+ box->x = start;
	1856	+ if (box_c2 < end)
	1857	+ box->w = end - box->x;
	1858	+}
	1859	+
	1860	+/*
	1861	+ * vmw_surface_tex_dirty_add_range - The dirty_add_range callback for surfaces
	1862	+ */
	1863	+static void vmw_surface_dirty_range_add(struct vmw_resource *res, size_t start,
	1864	+ size_t end)
	1865	+{
	1866	+ struct vmw_surface *srf = vmw_res_to_srf(res);
	1867	+
	1868	+ if (WARN_ON(end <= res->backup_offset \|\|
	1869	+ start >= res->backup_offset + res->backup_size))
	1870	+ return;
	1871	+
	1872	+ if (srf->metadata.format == SVGA3D_BUFFER)
	1873	+ vmw_surface_buf_dirty_range_add(res, start, end);
	1874	+ else
	1875	+ vmw_surface_tex_dirty_range_add(res, start, end);
	1876	+}
	1877	+
	1878	+/*
	1879	+ * vmw_surface_dirty_sync - The surface's dirty_sync callback.
	1880	+ */
	1881	+static int vmw_surface_dirty_sync(struct vmw_resource *res)
	1882	+{
	1883	+ struct vmw_private *dev_priv = res->dev_priv;
	1884	+ bool has_dx = 0;
	1885	+ u32 i, num_dirty;
	1886	+ struct vmw_surface_dirty *dirty =
	1887	+ (struct vmw_surface_dirty *) res->dirty;
	1888	+ size_t alloc_size;
	1889	+ const struct svga3dsurface_cache *cache = &dirty->cache;
	1890	+ struct {
	1891	+ SVGA3dCmdHeader header;
	1892	+ SVGA3dCmdDXUpdateSubResource body;
	1893	+ } *cmd1;
	1894	+ struct {
	1895	+ SVGA3dCmdHeader header;
	1896	+ SVGA3dCmdUpdateGBImage body;
	1897	+ } *cmd2;
	1898	+ void *cmd;
	1899	+
	1900	+ num_dirty = 0;
	1901	+ for (i = 0; i < dirty->num_subres; ++i) {
	1902	+ const SVGA3dBox *box = &dirty->boxes[i];
	1903	+
	1904	+ if (box->d)
	1905	+ num_dirty++;
	1906	+ }
	1907	+
	1908	+ if (!num_dirty)
	1909	+ goto out;
	1910	+
	1911	+ alloc_size = num_dirty * ((has_dx) ? sizeof(cmd1) : sizeof(cmd2));
	1912	+ cmd = VMW_FIFO_RESERVE(dev_priv, alloc_size);
	1913	+ if (!cmd)
	1914	+ return -ENOMEM;
	1915	+
	1916	+ cmd1 = cmd;
	1917	+ cmd2 = cmd;
	1918	+
	1919	+ for (i = 0; i < dirty->num_subres; ++i) {
	1920	+ const SVGA3dBox *box = &dirty->boxes[i];
	1921	+
	1922	+ if (!box->d)
	1923	+ continue;
	1924	+
	1925	+ /*
	1926	+ * DX_UPDATE_SUBRESOURCE is aware of array surfaces.
	1927	+ * UPDATE_GB_IMAGE is not.
	1928	+ */
	1929	+ if (has_dx) {
	1930	+ cmd1->header.id = SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE;
	1931	+ cmd1->header.size = sizeof(cmd1->body);
	1932	+ cmd1->body.sid = res->id;
	1933	+ cmd1->body.subResource = i;
	1934	+ cmd1->body.box = *box;
	1935	+ cmd1++;
	1936	+ } else {
	1937	+ cmd2->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
	1938	+ cmd2->header.size = sizeof(cmd2->body);
	1939	+ cmd2->body.image.sid = res->id;
	1940	+ cmd2->body.image.face = i / cache->num_mip_levels;
	1941	+ cmd2->body.image.mipmap = i -
	1942	+ (cache->num_mip_levels * cmd2->body.image.face);
	1943	+ cmd2->body.box = *box;
	1944	+ cmd2++;
	1945	+ }
	1946	+
	1947	+ }
	1948	+ vmw_fifo_commit(dev_priv, alloc_size);
	1949	+ out:
	1950	+ memset(&dirty->boxes[0], 0, sizeof(dirty->boxes[0]) *
	1951	+ dirty->num_subres);
	1952	+
	1953	+ return 0;
	1954	+}
	1955	+
	1956	+/*
	1957	+ * vmw_surface_dirty_alloc - The surface's dirty_alloc callback.
	1958	+ */
	1959	+static int vmw_surface_dirty_alloc(struct vmw_resource *res)
	1960	+{
	1961	+ struct vmw_surface *srf = vmw_res_to_srf(res);
	1962	+ const struct vmw_surface_metadata *metadata = &srf->metadata;
	1963	+ struct vmw_surface_dirty *dirty;
	1964	+ u32 num_layers = 1;
	1965	+ u32 num_mip;
	1966	+ u32 num_subres;
	1967	+ u32 num_samples;
	1968	+ size_t dirty_size, acc_size;
	1969	+ static struct ttm_operation_ctx ctx = {
	1970	+ .interruptible = false,
	1971	+ .no_wait_gpu = false
	1972	+ };
	1973	+ int ret;
	1974	+
	1975	+ if (metadata->array_size)
	1976	+ num_layers = metadata->array_size;
	1977	+ else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
	1978	+ num_layers *= SVGA3D_MAX_SURFACE_FACES;
	1979	+
	1980	+ num_mip = metadata->mip_levels[0];
	1981	+ if (!num_mip)
	1982	+ num_mip = 1;
	1983	+
	1984	+ num_subres = num_layers * num_mip;
	1985	+ dirty_size = struct_size(dirty, boxes, num_subres);
	1986	+ acc_size = ttm_round_pot(dirty_size);
	1987	+ ret = ttm_mem_global_alloc(vmw_mem_glob(res->dev_priv),
	1988	+ acc_size, &ctx);
	1989	+ if (ret) {
	1990	+ VMW_DEBUG_USER("Out of graphics memory for surface "
	1991	+ "dirty tracker.\n");
	1992	+ return ret;
	1993	+ }
	1994	+
	1995	+ dirty = kvzalloc(dirty_size, GFP_KERNEL);
	1996	+ if (!dirty) {
	1997	+ ret = -ENOMEM;
	1998	+ goto out_no_dirty;
	1999	+ }
	2000	+
	2001	+ num_samples = max_t(u32, 1, metadata->multisample_count);
	2002	+ ret = svga3dsurface_setup_cache(&metadata->base_size, metadata->format,
	2003	+ num_mip, num_layers, num_samples,
	2004	+ &dirty->cache);
	2005	+ if (ret)
	2006	+ goto out_no_cache;
	2007	+
	2008	+ dirty->num_subres = num_subres;
	2009	+ dirty->size = acc_size;
	2010	+ res->dirty = (struct vmw_resource_dirty *) dirty;
	2011	+
	2012	+ return 0;
	2013	+
	2014	+out_no_cache:
	2015	+ kvfree(dirty);
	2016	+out_no_dirty:
	2017	+ ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
	2018	+ return ret;
	2019	+}
	2020	+
	2021	+/*
	2022	+ * vmw_surface_dirty_free - The surface's dirty_free callback
	2023	+ */
	2024	+static void vmw_surface_dirty_free(struct vmw_resource *res)
	2025	+{
	2026	+ struct vmw_surface_dirty *dirty =
	2027	+ (struct vmw_surface_dirty *) res->dirty;
	2028	+ size_t acc_size = dirty->size;
	2029	+
	2030	+ kvfree(dirty);
	2031	+ ttm_mem_global_free(vmw_mem_glob(res->dev_priv), acc_size);
	2032	+ res->dirty = NULL;
	2033	+}
	2034	+
	2035	+/*
	2036	+ * vmw_surface_clean - The surface's clean callback
	2037	+ */
	2038	+static int vmw_surface_clean(struct vmw_resource *res)
	2039	+{
	2040	+ struct vmw_private *dev_priv = res->dev_priv;
	2041	+ size_t alloc_size;
	2042	+ struct {
	2043	+ SVGA3dCmdHeader header;
	2044	+ SVGA3dCmdReadbackGBSurface body;
	2045	+ } *cmd;
	2046	+
	2047	+ alloc_size = sizeof(*cmd);
	2048	+ cmd = VMW_FIFO_RESERVE(dev_priv, alloc_size);
	2049	+ if (!cmd)
	2050	+ return -ENOMEM;
	2051	+
	2052	+ cmd->header.id = SVGA_3D_CMD_READBACK_GB_SURFACE;
	2053	+ cmd->header.size = sizeof(cmd->body);
	2054	+ cmd->body.sid = res->id;
	2055	+ vmw_fifo_commit(dev_priv, alloc_size);
	2056	+
	2057	+ return 0;
	2058	+}
	2059	+
	2060	+/*
	2061	+ * vmw_gb_surface_define - Define a private GB surface
	2062	+ *
	2063	+ * @dev_priv: Pointer to a device private.
	2064	+ * @user_accounting_size: Used to track user-space memory usage, set
	2065	+ * to 0 for kernel mode only memory
	2066	+ * @metadata: Metadata representing the surface to create.
	2067	+ * @user_srf_out: allocated user_srf. Set to NULL on failure.
	2068	+ *
	2069	+ * GB surfaces allocated by this function will not have a user mode handle, and
	2070	+ * thus will only be visible to vmwgfx. For optimization reasons the
	2071	+ * surface may later be given a user mode handle by another function to make
	2072	+ * it available to user mode drivers.
	2073	+ */
	2074	+int vmw_gb_surface_define(struct vmw_private *dev_priv,
	2075	+ uint32_t user_accounting_size,
	2076	+ const struct vmw_surface_metadata *req,
	2077	+ struct vmw_surface **srf_out)
	2078	+{
	2079	+ struct vmw_surface_metadata *metadata;
	2080	+ struct vmw_user_surface *user_srf;
	2081	+ struct vmw_surface *srf;
	2082	+ struct ttm_operation_ctx ctx = {
	2083	+ .interruptible = true,
	2084	+ .no_wait_gpu = false
	2085	+ };
	2086	+ u32 sample_count = 1;
	2087	+ u32 num_layers = 1;
	2088	+ int ret;
	2089	+
	2090	+ *srf_out = NULL;
	2091	+
	2092	+ if (req->scanout) {
	2093	+ if (!svga3dsurface_is_screen_target_format(req->format)) {
	2094	+ VMW_DEBUG_USER("Invalid Screen Target surface format.");
	2095	+ return -EINVAL;
	2096	+ }
	2097	+
	2098	+ if (req->base_size.width > dev_priv->texture_max_width \|\|
	2099	+ req->base_size.height > dev_priv->texture_max_height) {
	2100	+ VMW_DEBUG_USER("%ux%u\n, exceed max surface size %ux%u",
	2101	+ req->base_size.width,
	2102	+ req->base_size.height,
	2103	+ dev_priv->texture_max_width,
	2104	+ dev_priv->texture_max_height);
	2105	+ return -EINVAL;
	2106	+ }
	2107	+ } else {
	2108	+ const struct svga3d_surface_desc *desc =
	2109	+ svga3dsurface_get_desc(req->format);
	2110	+
	2111	+ if (desc->block_desc == SVGA3DBLOCKDESC_NONE) {
	2112	+ VMW_DEBUG_USER("Invalid surface format.\n");
	2113	+ return -EINVAL;
	2114	+ }
	2115	+ }
	2116	+
	2117	+ if (req->autogen_filter != SVGA3D_TEX_FILTER_NONE)
	2118	+ return -EINVAL;
	2119	+
	2120	+ if (req->num_sizes != 1)
	2121	+ return -EINVAL;
	2122	+
	2123	+ if (req->sizes != NULL)
	2124	+ return -EINVAL;
	2125	+
	2126	+ ret = ttm_read_lock(&dev_priv->reservation_sem, true);
	2127	+ if (unlikely(ret != 0))
	2128	+ return ret;
	2129	+
	2130	+ ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv),
	2131	+ user_accounting_size, &ctx);
	2132	+ if (ret != 0) {
	2133	+ if (ret != -ERESTARTSYS)
	2134	+ DRM_ERROR("Out of graphics memory for surface.\n");
	2135	+ goto out_unlock;
	2136	+ }
	2137	+
	2138	+ user_srf = kzalloc(sizeof(*user_srf), GFP_KERNEL);
	2139	+ if (unlikely(!user_srf)) {
	2140	+ ret = -ENOMEM;
	2141	+ goto out_no_user_srf;
	2142	+ }
	2143	+
	2144	+ *srf_out = &user_srf->srf;
	2145	+ user_srf->size = user_accounting_size;
	2146	+ user_srf->prime.base.shareable = false;
	2147	+ user_srf->prime.base.tfile = NULL;
	2148	+
	2149	+ srf = &user_srf->srf;
	2150	+ srf->metadata = *req;
	2151	+ srf->offsets = NULL;
	2152	+
	2153	+ metadata = &srf->metadata;
	2154	+
	2155	+ if (metadata->array_size)
	2156	+ num_layers = req->array_size;
	2157	+ else if (metadata->flags & SVGA3D_SURFACE_CUBEMAP)
	2158	+ num_layers = SVGA3D_MAX_SURFACE_FACES;
	2159	+
	2160	+ if (metadata->flags & SVGA3D_SURFACE_MULTISAMPLE)
	2161	+ sample_count = metadata->multisample_count;
	2162	+
	2163	+ srf->res.backup_size =
	2164	+ svga3dsurface_get_serialized_size_extended(metadata->format,
	2165	+ metadata->base_size,
	2166	+ metadata->mip_levels[0],
	2167	+ num_layers,
	2168	+ sample_count);
	2169	+
	2170	+ if (metadata->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
	2171	+ srf->res.backup_size += sizeof(SVGA3dDXSOState);
	2172	+
	2173	+ /*
	2174	+ * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
	2175	+ * size greater than STDU max width/height. This is really a workaround
	2176	+ * to support creation of big framebuffer requested by some user-space
	2177	+ * for whole topology. That big framebuffer won't really be used for
	2178	+ * binding with screen target as during prepare_fb a separate surface is
	2179	+ * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
	2180	+ */
	2181	+ if (dev_priv->active_display_unit == vmw_du_screen_target &&
	2182	+ metadata->scanout &&
	2183	+ metadata->base_size.width <= dev_priv->stdu_max_width &&
	2184	+ metadata->base_size.height <= dev_priv->stdu_max_height)
	2185	+ metadata->flags \|= SVGA3D_SURFACE_SCREENTARGET;
	2186	+
	2187	+ /*
	2188	+ * From this point, the generic resource management functions
	2189	+ * destroy the object on failure.
	2190	+ */
	2191	+ ret = vmw_surface_init(dev_priv, srf, vmw_user_surface_free);
	2192	+
	2193	+ ttm_read_unlock(&dev_priv->reservation_sem);
	2194	+ return ret;
	2195	+
	2196	+out_no_user_srf:
	2197	+ ttm_mem_global_free(vmw_mem_glob(dev_priv), user_accounting_size);
	2198	+
	2199	+out_unlock:
	2200	+ ttm_read_unlock(&dev_priv->reservation_sem);
	2201	+ return ret;
	2202	+}