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2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8 
 kernel/drivers/gpu/drm/virtio/virtgpu_ioctl.c
....@@ -25,72 +25,43 @@
2525  * OTHER DEALINGS IN THE SOFTWARE.
2626  */
2727 
28
-#include <drm/drmP.h>
29
-#include <drm/virtgpu_drm.h>
30
-#include <drm/ttm/ttm_execbuf_util.h>
28
+#include <linux/file.h>
3129 #include <linux/sync_file.h>
30
+#include <linux/uaccess.h>
31
+
32
+#include <drm/drm_file.h>
33
+#include <drm/virtgpu_drm.h>
3234 
3335 #include "virtgpu_drv.h"
3436 
35
-static void convert_to_hw_box(struct virtio_gpu_box *dst,
36
-			      const struct drm_virtgpu_3d_box *src)
37
+void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file)
3738 {
38
-	dst->x = cpu_to_le32(src->x);
39
-	dst->y = cpu_to_le32(src->y);
40
-	dst->z = cpu_to_le32(src->z);
41
-	dst->w = cpu_to_le32(src->w);
42
-	dst->h = cpu_to_le32(src->h);
43
-	dst->d = cpu_to_le32(src->d);
39
+	struct virtio_gpu_device *vgdev = dev->dev_private;
40
+	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
41
+	char dbgname[TASK_COMM_LEN];
42
+
43
+	mutex_lock(&vfpriv->context_lock);
44
+	if (vfpriv->context_created)
45
+		goto out_unlock;
46
+
47
+	get_task_comm(dbgname, current);
48
+	virtio_gpu_cmd_context_create(vgdev, vfpriv->ctx_id,
49
+				      strlen(dbgname), dbgname);
50
+	vfpriv->context_created = true;
51
+
52
+out_unlock:
53
+	mutex_unlock(&vfpriv->context_lock);
4454 }
4555 
4656 static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data,
47
-				struct drm_file *file_priv)
57
+				struct drm_file *file)
4858 {
4959 	struct virtio_gpu_device *vgdev = dev->dev_private;
5060 	struct drm_virtgpu_map *virtio_gpu_map = data;
5161 
52
-	return virtio_gpu_mode_dumb_mmap(file_priv, vgdev->ddev,
62
+	return virtio_gpu_mode_dumb_mmap(file, vgdev->ddev,
5363 					 virtio_gpu_map->handle,
5464 					 &virtio_gpu_map->offset);
55
-}
56
-
57
-int virtio_gpu_object_list_validate(struct ww_acquire_ctx *ticket,
58
-				    struct list_head *head)
59
-{
60
-	struct ttm_operation_ctx ctx = { false, false };
61
-	struct ttm_validate_buffer *buf;
62
-	struct ttm_buffer_object *bo;
63
-	struct virtio_gpu_object *qobj;
64
-	int ret;
65
-
66
-	ret = ttm_eu_reserve_buffers(ticket, head, true, NULL);
67
-	if (ret != 0)
68
-		return ret;
69
-
70
-	list_for_each_entry(buf, head, head) {
71
-		bo = buf->bo;
72
-		qobj = container_of(bo, struct virtio_gpu_object, tbo);
73
-		ret = ttm_bo_validate(bo, &qobj->placement, &ctx);
74
-		if (ret) {
75
-			ttm_eu_backoff_reservation(ticket, head);
76
-			return ret;
77
-		}
78
-	}
79
-	return 0;
80
-}
81
-
82
-void virtio_gpu_unref_list(struct list_head *head)
83
-{
84
-	struct ttm_validate_buffer *buf;
85
-	struct ttm_buffer_object *bo;
86
-	struct virtio_gpu_object *qobj;
87
-
88
-	list_for_each_entry(buf, head, head) {
89
-		bo = buf->bo;
90
-		qobj = container_of(bo, struct virtio_gpu_object, tbo);
91
-
92
-		drm_gem_object_put_unlocked(&qobj->gem_base);
93
-	}
9465 }
9566 
9667 /*
....@@ -100,21 +71,16 @@
10071  * VIRTIO_GPUReleaseInfo struct (first XXX bytes)
10172  */
10273 static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
103
-				 struct drm_file *drm_file)
74
+				 struct drm_file *file)
10475 {
10576 	struct drm_virtgpu_execbuffer *exbuf = data;
10677 	struct virtio_gpu_device *vgdev = dev->dev_private;
107
-	struct virtio_gpu_fpriv *vfpriv = drm_file->driver_priv;
108
-	struct drm_gem_object *gobj;
78
+	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
10979 	struct virtio_gpu_fence *out_fence;
110
-	struct virtio_gpu_object *qobj;
11180 	int ret;
11281 	uint32_t *bo_handles = NULL;
11382 	void __user *user_bo_handles = NULL;
114
-	struct list_head validate_list;
115
-	struct ttm_validate_buffer *buflist = NULL;
116
-	int i;
117
-	struct ww_acquire_ctx ticket;
83
+	struct virtio_gpu_object_array *buflist = NULL;
11884 	struct sync_file *sync_file;
11985 	int in_fence_fd = exbuf->fence_fd;
12086 	int out_fence_fd = -1;
....@@ -128,6 +94,7 @@
12894 
12995 	exbuf->fence_fd = -1;
13096 
97
+	virtio_gpu_create_context(dev, file);
13198 	if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_IN) {
13299 		struct dma_fence *in_fence;
133100 
....@@ -155,15 +122,10 @@
155122 			return out_fence_fd;
156123 	}
157124 
158
-	INIT_LIST_HEAD(&validate_list);
159125 	if (exbuf->num_bo_handles) {
160
-
161126 		bo_handles = kvmalloc_array(exbuf->num_bo_handles,
162
-					   sizeof(uint32_t), GFP_KERNEL);
163
-		buflist = kvmalloc_array(exbuf->num_bo_handles,
164
-					   sizeof(struct ttm_validate_buffer),
165
-					   GFP_KERNEL | __GFP_ZERO);
166
-		if (!bo_handles || !buflist) {
127
+					    sizeof(uint32_t), GFP_KERNEL);
128
+		if (!bo_handles) {
167129 			ret = -ENOMEM;
168130 			goto out_unused_fd;
169131 		}
....@@ -175,36 +137,32 @@
175137 			goto out_unused_fd;
176138 		}
177139 
178
-		for (i = 0; i < exbuf->num_bo_handles; i++) {
179
-			gobj = drm_gem_object_lookup(drm_file, bo_handles[i]);
180
-			if (!gobj) {
181
-				ret = -ENOENT;
182
-				goto out_unused_fd;
183
-			}
184
-
185
-			qobj = gem_to_virtio_gpu_obj(gobj);
186
-			buflist[i].bo = &qobj->tbo;
187
-
188
-			list_add(&buflist[i].head, &validate_list);
140
+		buflist = virtio_gpu_array_from_handles(file, bo_handles,
141
+							exbuf->num_bo_handles);
142
+		if (!buflist) {
143
+			ret = -ENOENT;
144
+			goto out_unused_fd;
189145 		}
190146 		kvfree(bo_handles);
191147 		bo_handles = NULL;
192148 	}
193149 
194
-	ret = virtio_gpu_object_list_validate(&ticket, &validate_list);
195
-	if (ret)
196
-		goto out_free;
197
-
198150 	buf = vmemdup_user(u64_to_user_ptr(exbuf->command), exbuf->size);
199151 	if (IS_ERR(buf)) {
200152 		ret = PTR_ERR(buf);
201
-		goto out_unresv;
153
+		goto out_unused_fd;
154
+	}
155
+
156
+	if (buflist) {
157
+		ret = virtio_gpu_array_lock_resv(buflist);
158
+		if (ret)
159
+			goto out_memdup;
202160 	}
203161 
204162 	out_fence = virtio_gpu_fence_alloc(vgdev);
205163 	if(!out_fence) {
206164 		ret = -ENOMEM;
207
-		goto out_memdup;
165
+		goto out_unresv;
208166 	}
209167 
210168 	if (out_fence_fd >= 0) {
....@@ -220,24 +178,20 @@
220178 	}
221179 
222180 	virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
223
-			      vfpriv->ctx_id, out_fence);
224
-
225
-	ttm_eu_fence_buffer_objects(&ticket, &validate_list, &out_fence->f);
226
-
227
-	/* fence the command bo */
228
-	virtio_gpu_unref_list(&validate_list);
229
-	kvfree(buflist);
181
+			      vfpriv->ctx_id, buflist, out_fence);
182
+	dma_fence_put(&out_fence->f);
183
+	virtio_gpu_notify(vgdev);
230184 	return 0;
231185 
186
+out_unresv:
187
+	if (buflist)
188
+		virtio_gpu_array_unlock_resv(buflist);
232189 out_memdup:
233190 	kvfree(buf);
234
-out_unresv:
235
-	ttm_eu_backoff_reservation(&ticket, &validate_list);
236
-out_free:
237
-	virtio_gpu_unref_list(&validate_list);
238191 out_unused_fd:
239192 	kvfree(bo_handles);
240
-	kvfree(buflist);
193
+	if (buflist)
194
+		virtio_gpu_array_put_free(buflist);
241195 
242196 	if (out_fence_fd >= 0)
243197 		put_unused_fd(out_fence_fd);
....@@ -246,7 +200,7 @@
246200 }
247201 
248202 static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data,
249
-				     struct drm_file *file_priv)
203
+				     struct drm_file *file)
250204 {
251205 	struct virtio_gpu_device *vgdev = dev->dev_private;
252206 	struct drm_virtgpu_getparam *param = data;
....@@ -269,7 +223,7 @@
269223 }
270224 
271225 static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data,
272
-					    struct drm_file *file_priv)
226
+					    struct drm_file *file)
273227 {
274228 	struct virtio_gpu_device *vgdev = dev->dev_private;
275229 	struct drm_virtgpu_resource_create *rc = data;
....@@ -280,7 +234,17 @@
280234 	uint32_t handle = 0;
281235 	struct virtio_gpu_object_params params = { 0 };
282236 
283
-	if (vgdev->has_virgl_3d == false) {
237
+	if (vgdev->has_virgl_3d) {
238
+		virtio_gpu_create_context(dev, file);
239
+		params.virgl = true;
240
+		params.target = rc->target;
241
+		params.bind = rc->bind;
242
+		params.depth = rc->depth;
243
+		params.array_size = rc->array_size;
244
+		params.last_level = rc->last_level;
245
+		params.nr_samples = rc->nr_samples;
246
+		params.flags = rc->flags;
247
+	} else {
284248 		if (rc->depth > 1)
285249 			return -EINVAL;
286250 		if (rc->nr_samples > 1)
....@@ -297,16 +261,6 @@
297261 	params.width = rc->width;
298262 	params.height = rc->height;
299263 	params.size = rc->size;
300
-	if (vgdev->has_virgl_3d) {
301
-		params.virgl = true;
302
-		params.target = rc->target;
303
-		params.bind = rc->bind;
304
-		params.depth = rc->depth;
305
-		params.array_size = rc->array_size;
306
-		params.last_level = rc->last_level;
307
-		params.nr_samples = rc->nr_samples;
308
-		params.flags = rc->flags;
309
-	}
310264 	/* allocate a single page size object */
311265 	if (params.size == 0)
312266 		params.size = PAGE_SIZE;
....@@ -314,40 +268,48 @@
314268 	fence = virtio_gpu_fence_alloc(vgdev);
315269 	if (!fence)
316270 		return -ENOMEM;
317
-	qobj = virtio_gpu_alloc_object(dev, &params, fence);
271
+	ret = virtio_gpu_object_create(vgdev, &params, &qobj, fence);
318272 	dma_fence_put(&fence->f);
319
-	if (IS_ERR(qobj))
320
-		return PTR_ERR(qobj);
321
-	obj = &qobj->gem_base;
273
+	if (ret < 0)
274
+		return ret;
275
+	obj = &qobj->base.base;
322276 
323
-	ret = drm_gem_handle_create(file_priv, obj, &handle);
277
+	ret = drm_gem_handle_create(file, obj, &handle);
324278 	if (ret) {
325279 		drm_gem_object_release(obj);
326280 		return ret;
327281 	}
328
-	drm_gem_object_put_unlocked(obj);
329282 
330283 	rc->res_handle = qobj->hw_res_handle; /* similiar to a VM address */
331284 	rc->bo_handle = handle;
285
+
286
+	/*
287
+	 * The handle owns the reference now.  But we must drop our
288
+	 * remaining reference *after* we no longer need to dereference
289
+	 * the obj.  Otherwise userspace could guess the handle and
290
+	 * race closing it from another thread.
291
+	 */
292
+	drm_gem_object_put(obj);
293
+
332294 	return 0;
333295 }
334296 
335297 static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data,
336
-					  struct drm_file *file_priv)
298
+					  struct drm_file *file)
337299 {
338300 	struct drm_virtgpu_resource_info *ri = data;
339301 	struct drm_gem_object *gobj = NULL;
340302 	struct virtio_gpu_object *qobj = NULL;
341303 
342
-	gobj = drm_gem_object_lookup(file_priv, ri->bo_handle);
304
+	gobj = drm_gem_object_lookup(file, ri->bo_handle);
343305 	if (gobj == NULL)
344306 		return -ENOENT;
345307 
346308 	qobj = gem_to_virtio_gpu_obj(gobj);
347309 
348
-	ri->size = qobj->gem_base.size;
310
+	ri->size = qobj->base.base.size;
349311 	ri->res_handle = qobj->hw_res_handle;
350
-	drm_gem_object_put_unlocked(gobj);
312
+	drm_gem_object_put(gobj);
351313 	return 0;
352314 }
353315 
....@@ -358,50 +320,39 @@
358320 	struct virtio_gpu_device *vgdev = dev->dev_private;
359321 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
360322 	struct drm_virtgpu_3d_transfer_from_host *args = data;
361
-	struct ttm_operation_ctx ctx = { true, false };
362
-	struct drm_gem_object *gobj = NULL;
363
-	struct virtio_gpu_object *qobj = NULL;
323
+	struct virtio_gpu_object_array *objs;
364324 	struct virtio_gpu_fence *fence;
365325 	int ret;
366326 	u32 offset = args->offset;
367
-	struct virtio_gpu_box box;
368327 
369328 	if (vgdev->has_virgl_3d == false)
370329 		return -ENOSYS;
371330 
372
-	gobj = drm_gem_object_lookup(file, args->bo_handle);
373
-	if (gobj == NULL)
331
+	virtio_gpu_create_context(dev, file);
332
+	objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
333
+	if (objs == NULL)
374334 		return -ENOENT;
375335 
376
-	qobj = gem_to_virtio_gpu_obj(gobj);
377
-
378
-	ret = virtio_gpu_object_reserve(qobj, false);
379
-	if (ret)
380
-		goto out;
381
-
382
-	ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
383
-	if (unlikely(ret))
384
-		goto out_unres;
385
-
386
-	convert_to_hw_box(&box, &args->box);
336
+	ret = virtio_gpu_array_lock_resv(objs);
337
+	if (ret != 0)
338
+		goto err_put_free;
387339 
388340 	fence = virtio_gpu_fence_alloc(vgdev);
389341 	if (!fence) {
390342 		ret = -ENOMEM;
391
-		goto out_unres;
343
+		goto err_unlock;
392344 	}
393345 	virtio_gpu_cmd_transfer_from_host_3d
394
-		(vgdev, qobj->hw_res_handle,
395
-		 vfpriv->ctx_id, offset, args->level,
396
-		 &box, fence);
397
-	reservation_object_add_excl_fence(qobj->tbo.resv,
398
-					  &fence->f);
399
-
346
+		(vgdev, vfpriv->ctx_id, offset, args->level,
347
+		 &args->box, objs, fence);
400348 	dma_fence_put(&fence->f);
401
-out_unres:
402
-	virtio_gpu_object_unreserve(qobj);
403
-out:
404
-	drm_gem_object_put_unlocked(gobj);
349
+	virtio_gpu_notify(vgdev);
350
+	return 0;
351
+
352
+err_unlock:
353
+	virtio_gpu_array_unlock_resv(objs);
354
+err_put_free:
355
+	virtio_gpu_array_put_free(objs);
405356 	return ret;
406357 }
407358 
....@@ -411,75 +362,71 @@
411362 	struct virtio_gpu_device *vgdev = dev->dev_private;
412363 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
413364 	struct drm_virtgpu_3d_transfer_to_host *args = data;
414
-	struct ttm_operation_ctx ctx = { true, false };
415
-	struct drm_gem_object *gobj = NULL;
416
-	struct virtio_gpu_object *qobj = NULL;
365
+	struct virtio_gpu_object_array *objs;
417366 	struct virtio_gpu_fence *fence;
418
-	struct virtio_gpu_box box;
419367 	int ret;
420368 	u32 offset = args->offset;
421369 
422
-	gobj = drm_gem_object_lookup(file, args->bo_handle);
423
-	if (gobj == NULL)
370
+	objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1);
371
+	if (objs == NULL)
424372 		return -ENOENT;
425373 
426
-	qobj = gem_to_virtio_gpu_obj(gobj);
427
-
428
-	ret = virtio_gpu_object_reserve(qobj, false);
429
-	if (ret)
430
-		goto out;
431
-
432
-	ret = ttm_bo_validate(&qobj->tbo, &qobj->placement, &ctx);
433
-	if (unlikely(ret))
434
-		goto out_unres;
435
-
436
-	convert_to_hw_box(&box, &args->box);
437374 	if (!vgdev->has_virgl_3d) {
438375 		virtio_gpu_cmd_transfer_to_host_2d
439
-			(vgdev, qobj, offset,
440
-			 box.w, box.h, box.x, box.y, NULL);
376
+			(vgdev, offset,
377
+			 args->box.w, args->box.h, args->box.x, args->box.y,
378
+			 objs, NULL);
441379 	} else {
380
+		virtio_gpu_create_context(dev, file);
381
+		ret = virtio_gpu_array_lock_resv(objs);
382
+		if (ret != 0)
383
+			goto err_put_free;
384
+
385
+		ret = -ENOMEM;
442386 		fence = virtio_gpu_fence_alloc(vgdev);
443
-		if (!fence) {
444
-			ret = -ENOMEM;
445
-			goto out_unres;
446
-		}
387
+		if (!fence)
388
+			goto err_unlock;
389
+
447390 		virtio_gpu_cmd_transfer_to_host_3d
448
-			(vgdev, qobj,
391
+			(vgdev,
449392 			 vfpriv ? vfpriv->ctx_id : 0, offset,
450
-			 args->level, &box, fence);
451
-		reservation_object_add_excl_fence(qobj->tbo.resv,
452
-						  &fence->f);
393
+			 args->level, &args->box, objs, fence);
453394 		dma_fence_put(&fence->f);
454395 	}
396
+	virtio_gpu_notify(vgdev);
397
+	return 0;
455398 
456
-out_unres:
457
-	virtio_gpu_object_unreserve(qobj);
458
-out:
459
-	drm_gem_object_put_unlocked(gobj);
399
+err_unlock:
400
+	virtio_gpu_array_unlock_resv(objs);
401
+err_put_free:
402
+	virtio_gpu_array_put_free(objs);
460403 	return ret;
461404 }
462405 
463406 static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data,
464
-			    struct drm_file *file)
407
+				 struct drm_file *file)
465408 {
466409 	struct drm_virtgpu_3d_wait *args = data;
467
-	struct drm_gem_object *gobj = NULL;
468
-	struct virtio_gpu_object *qobj = NULL;
410
+	struct drm_gem_object *obj;
411
+	long timeout = 15 * HZ;
469412 	int ret;
470
-	bool nowait = false;
471413 
472
-	gobj = drm_gem_object_lookup(file, args->handle);
473
-	if (gobj == NULL)
414
+	obj = drm_gem_object_lookup(file, args->handle);
415
+	if (obj == NULL)
474416 		return -ENOENT;
475417 
476
-	qobj = gem_to_virtio_gpu_obj(gobj);
418
+	if (args->flags & VIRTGPU_WAIT_NOWAIT) {
419
+		ret = dma_resv_test_signaled_rcu(obj->resv, true);
420
+	} else {
421
+		ret = dma_resv_wait_timeout_rcu(obj->resv, true, true,
422
+						timeout);
423
+	}
424
+	if (ret == 0)
425
+		ret = -EBUSY;
426
+	else if (ret > 0)
427
+		ret = 0;
477428 
478
-	if (args->flags & VIRTGPU_WAIT_NOWAIT)
479
-		nowait = true;
480
-	ret = virtio_gpu_object_wait(qobj, nowait);
481
-
482
-	drm_gem_object_put_unlocked(gobj);
429
+	drm_gem_object_put(obj);
483430 	return ret;
484431 }
485432 
....@@ -531,8 +478,11 @@
531478 	spin_unlock(&vgdev->display_info_lock);
532479 
533480 	/* not in cache - need to talk to hw */
534
-	virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
535
-				  &cache_ent);
481
+	ret = virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
482
+					&cache_ent);
483
+	if (ret)
484
+		return ret;
485
+	virtio_gpu_notify(vgdev);
536486 
537487 copy_exit:
538488 	ret = wait_event_timeout(vgdev->resp_wq,
....@@ -553,34 +503,34 @@
553503 
554504 struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = {
555505 	DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl,
556
-			  DRM_AUTH | DRM_RENDER_ALLOW),
506
+			  DRM_RENDER_ALLOW),
557507 
558508 	DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl,
559
-			  DRM_AUTH | DRM_RENDER_ALLOW),
509
+			  DRM_RENDER_ALLOW),
560510 
561511 	DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl,
562
-			  DRM_AUTH | DRM_RENDER_ALLOW),
512
+			  DRM_RENDER_ALLOW),
563513 
564514 	DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE,
565515 			  virtio_gpu_resource_create_ioctl,
566
-			  DRM_AUTH | DRM_RENDER_ALLOW),
516
+			  DRM_RENDER_ALLOW),
567517 
568518 	DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl,
569
-			  DRM_AUTH | DRM_RENDER_ALLOW),
519
+			  DRM_RENDER_ALLOW),
570520 
571521 	/* make transfer async to the main ring? - no sure, can we
572522 	 * thread these in the underlying GL
573523 	 */
574524 	DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST,
575525 			  virtio_gpu_transfer_from_host_ioctl,
576
-			  DRM_AUTH | DRM_RENDER_ALLOW),
526
+			  DRM_RENDER_ALLOW),
577527 	DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST,
578528 			  virtio_gpu_transfer_to_host_ioctl,
579
-			  DRM_AUTH | DRM_RENDER_ALLOW),
529
+			  DRM_RENDER_ALLOW),
580530 
581531 	DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl,
582
-			  DRM_AUTH | DRM_RENDER_ALLOW),
532
+			  DRM_RENDER_ALLOW),
583533 
584534 	DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl,
585
-			  DRM_AUTH | DRM_RENDER_ALLOW),
535
+			  DRM_RENDER_ALLOW),
586536 };