rtl88x2CE_WiFi_linux driver

hc

2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8

 kernel/drivers/gpu/drm/virtio/virtgpu_gem.c
..
..
@@ -23,57 +23,36 @@
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23
  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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24
  */
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25
 
26
-#include <drm/drmP.h>
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+#include <drm/drm_file.h>
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+#include <drm/drm_fourcc.h>
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+
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29
 #include "virtgpu_drv.h"
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30
 
29
-void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj)
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-{
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-	struct virtio_gpu_object *obj = gem_to_virtio_gpu_obj(gem_obj);
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-
33
-	if (obj)
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-		virtio_gpu_object_unref(&obj);
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-}
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-
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-struct virtio_gpu_object*
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-virtio_gpu_alloc_object(struct drm_device *dev,
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-			struct virtio_gpu_object_params *params,
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-			struct virtio_gpu_fence *fence)
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+static int virtio_gpu_gem_create(struct drm_file *file,
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+				 struct drm_device *dev,
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+				 struct virtio_gpu_object_params *params,
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+				 struct drm_gem_object **obj_p,
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+				 uint32_t *handle_p)
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36
 {
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 	struct virtio_gpu_device *vgdev = dev->dev_private;
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 	struct virtio_gpu_object *obj;
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 	int ret;
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-
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-	ret = virtio_gpu_object_create(vgdev, params, &obj, fence);
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-	if (ret)
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-		return ERR_PTR(ret);
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-
50
-	return obj;
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-}
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-
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-int virtio_gpu_gem_create(struct drm_file *file,
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-			  struct drm_device *dev,
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-			  struct virtio_gpu_object_params *params,
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-			  struct drm_gem_object **obj_p,
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-			  uint32_t *handle_p)
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-{
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-	struct virtio_gpu_object *obj;
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-	int ret;
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40
 	u32 handle;
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41
 
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-	obj = virtio_gpu_alloc_object(dev, params, NULL);
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-	if (IS_ERR(obj))
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-		return PTR_ERR(obj);
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+	ret = virtio_gpu_object_create(vgdev, params, &obj, NULL);
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+	if (ret < 0)
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+		return ret;
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45
 
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-	ret = drm_gem_handle_create(file, &obj->gem_base, &handle);
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+	ret = drm_gem_handle_create(file, &obj->base.base, &handle);
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47
 	if (ret) {
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-		drm_gem_object_release(&obj->gem_base);
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+		drm_gem_object_release(&obj->base.base);
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 		return ret;
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 	}
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51
 
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-	*obj_p = &obj->gem_base;
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+	*obj_p = &obj->base.base;
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53
 
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 	/* drop reference from allocate - handle holds it now */
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-	drm_gem_object_put_unlocked(&obj->gem_base);
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+	drm_gem_object_put(&obj->base.base);
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56
 
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 	*handle_p = handle;
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58
 	return 0;
..
..
@@ -88,7 +67,10 @@
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67
 	int ret;
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68
 	uint32_t pitch;
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69
 
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-	pitch = args->width * ((args->bpp + 1) / 8);
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+	if (args->bpp != 32)
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+		return -EINVAL;
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+
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+	pitch = args->width * 4;
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 	args->size = pitch * args->height;
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 	args->size = ALIGN(args->size, PAGE_SIZE);
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76
 
..
..
@@ -114,15 +96,13 @@
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 			      uint32_t handle, uint64_t *offset_p)
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 {
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 	struct drm_gem_object *gobj;
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-	struct virtio_gpu_object *obj;
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99
 
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 	BUG_ON(!offset_p);
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 	gobj = drm_gem_object_lookup(file_priv, handle);
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102
 	if (gobj == NULL)
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 		return -ENOENT;
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-	obj = gem_to_virtio_gpu_obj(gobj);
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-	*offset_p = virtio_gpu_object_mmap_offset(obj);
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-	drm_gem_object_put_unlocked(gobj);
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+	*offset_p = drm_vma_node_offset_addr(&gobj->vma_node);
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+	drm_gem_object_put(gobj);
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 	return 0;
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107
 }
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108
 
..
..
@@ -131,19 +111,25 @@
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111
 {
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 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
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 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
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-	struct virtio_gpu_object *qobj = gem_to_virtio_gpu_obj(obj);
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-	int r;
114
+	struct virtio_gpu_object_array *objs;
136
115
 
137
116
 	if (!vgdev->has_virgl_3d)
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-		return 0;
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+		goto out_notify;
139
118
 
140
-	r = virtio_gpu_object_reserve(qobj, false);
141
-	if (r)
142
-		return r;
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+	/* the context might still be missing when the first ioctl is
120
+	 * DRM_IOCTL_MODE_CREATE_DUMB or DRM_IOCTL_PRIME_FD_TO_HANDLE
121
+	 */
122
+	virtio_gpu_create_context(obj->dev, file);
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+
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+	objs = virtio_gpu_array_alloc(1);
125
+	if (!objs)
126
+		return -ENOMEM;
127
+	virtio_gpu_array_add_obj(objs, obj);
143
128
 
144
129
 	virtio_gpu_cmd_context_attach_resource(vgdev, vfpriv->ctx_id,
145
-					       qobj->hw_res_handle);
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-	virtio_gpu_object_unreserve(qobj);
130
+					       objs);
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+out_notify:
132
+	virtio_gpu_notify(vgdev);
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133
 	return 0;
148
134
 }
149
135
 
..
..
@@ -152,17 +138,136 @@
152
138
 {
153
139
 	struct virtio_gpu_device *vgdev = obj->dev->dev_private;
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140
 	struct virtio_gpu_fpriv *vfpriv = file->driver_priv;
155
-	struct virtio_gpu_object *qobj = gem_to_virtio_gpu_obj(obj);
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-	int r;
141
+	struct virtio_gpu_object_array *objs;
157
142
 
158
143
 	if (!vgdev->has_virgl_3d)
159
144
 		return;
160
145
 
161
-	r = virtio_gpu_object_reserve(qobj, false);
162
-	if (r)
146
+	objs = virtio_gpu_array_alloc(1);
147
+	if (!objs)
163
148
 		return;
149
+	virtio_gpu_array_add_obj(objs, obj);
164
150
 
165
151
 	virtio_gpu_cmd_context_detach_resource(vgdev, vfpriv->ctx_id,
166
-						qobj->hw_res_handle);
167
-	virtio_gpu_object_unreserve(qobj);
152
+					       objs);
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+	virtio_gpu_notify(vgdev);
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+}
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+
156
+struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents)
157
+{
158
+	struct virtio_gpu_object_array *objs;
159
+
160
+	objs = kmalloc(struct_size(objs, objs, nents), GFP_KERNEL);
161
+	if (!objs)
162
+		return NULL;
163
+
164
+	objs->nents = 0;
165
+	objs->total = nents;
166
+	return objs;
167
+}
168
+
169
+static void virtio_gpu_array_free(struct virtio_gpu_object_array *objs)
170
+{
171
+	kfree(objs);
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+}
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+
174
+struct virtio_gpu_object_array*
175
+virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents)
176
+{
177
+	struct virtio_gpu_object_array *objs;
178
+	u32 i;
179
+
180
+	objs = virtio_gpu_array_alloc(nents);
181
+	if (!objs)
182
+		return NULL;
183
+
184
+	for (i = 0; i < nents; i++) {
185
+		objs->objs[i] = drm_gem_object_lookup(drm_file, handles[i]);
186
+		if (!objs->objs[i]) {
187
+			objs->nents = i;
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+			virtio_gpu_array_put_free(objs);
189
+			return NULL;
190
+		}
191
+	}
192
+	objs->nents = i;
193
+	return objs;
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+}
195
+
196
+void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
197
+			      struct drm_gem_object *obj)
198
+{
199
+	if (WARN_ON_ONCE(objs->nents == objs->total))
200
+		return;
201
+
202
+	drm_gem_object_get(obj);
203
+	objs->objs[objs->nents] = obj;
204
+	objs->nents++;
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+}
206
+
207
+int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs)
208
+{
209
+	int ret;
210
+
211
+	if (objs->nents == 1) {
212
+		ret = dma_resv_lock_interruptible(objs->objs[0]->resv, NULL);
213
+	} else {
214
+		ret = drm_gem_lock_reservations(objs->objs, objs->nents,
215
+						&objs->ticket);
216
+	}
217
+	return ret;
218
+}
219
+
220
+void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs)
221
+{
222
+	if (objs->nents == 1) {
223
+		dma_resv_unlock(objs->objs[0]->resv);
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+	} else {
225
+		drm_gem_unlock_reservations(objs->objs, objs->nents,
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+					    &objs->ticket);
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+	}
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+}
229
+
230
+void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
231
+				struct dma_fence *fence)
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+{
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+	int i;
234
+
235
+	for (i = 0; i < objs->nents; i++)
236
+		dma_resv_add_excl_fence(objs->objs[i]->resv, fence);
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+}
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+
239
+void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs)
240
+{
241
+	u32 i;
242
+
243
+	for (i = 0; i < objs->nents; i++)
244
+		drm_gem_object_put(objs->objs[i]);
245
+	virtio_gpu_array_free(objs);
246
+}
247
+
248
+void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
249
+				       struct virtio_gpu_object_array *objs)
250
+{
251
+	spin_lock(&vgdev->obj_free_lock);
252
+	list_add_tail(&objs->next, &vgdev->obj_free_list);
253
+	spin_unlock(&vgdev->obj_free_lock);
254
+	schedule_work(&vgdev->obj_free_work);
255
+}
256
+
257
+void virtio_gpu_array_put_free_work(struct work_struct *work)
258
+{
259
+	struct virtio_gpu_device *vgdev =
260
+		container_of(work, struct virtio_gpu_device, obj_free_work);
261
+	struct virtio_gpu_object_array *objs;
262
+
263
+	spin_lock(&vgdev->obj_free_lock);
264
+	while (!list_empty(&vgdev->obj_free_list)) {
265
+		objs = list_first_entry(&vgdev->obj_free_list,
266
+					struct virtio_gpu_object_array, next);
267
+		list_del(&objs->next);
268
+		spin_unlock(&vgdev->obj_free_lock);
269
+		virtio_gpu_array_put_free(objs);
270
+		spin_lock(&vgdev->obj_free_lock);
271
+	}
272
+	spin_unlock(&vgdev->obj_free_lock);
168
273
 }