rtl88x2CE_WiFi_linux driver

hc

2024-05-10 cde9070d9970eef1f7ec2360586c802a16230ad8

 kernel/drivers/clk/socfpga/clk-periph-s10.c
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@@ -4,6 +4,7 @@
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  */
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 #include <linux/slab.h>
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 #include <linux/clk-provider.h>
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+#include <linux/io.h>
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 #include "stratix10-clk.h"
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 #include "clk.h"
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@@ -48,16 +49,21 @@
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 {
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 	struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
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 	u32 clk_src, mask;
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-	u8 parent;
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+	u8 parent = 0;
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+	/* handle the bypass first */
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 	if (socfpgaclk->bypass_reg) {
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 		mask = (0x1 << socfpgaclk->bypass_shift);
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 		parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
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 			   socfpgaclk->bypass_shift);
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-	} else {
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+		if (parent)
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+			return parent;
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+	}
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+
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+	if (socfpgaclk->hw.reg) {
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 		clk_src = readl(socfpgaclk->hw.reg);
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 		parent = (clk_src >> CLK_MGR_FREE_SHIFT) &
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-			CLK_MGR_FREE_MASK;
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+			  CLK_MGR_FREE_MASK;
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 	}
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 	return parent;
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 }
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@@ -72,27 +78,29 @@
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 	.get_parent = clk_periclk_get_parent,
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 };
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-struct clk *s10_register_periph(const char *name, const char *parent_name,
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-				const char * const *parent_names,
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-				u8 num_parents, unsigned long flags,
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-				void __iomem *reg, unsigned long offset)
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+struct clk *s10_register_periph(const struct stratix10_perip_c_clock *clks,
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+				void __iomem *reg)
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 {
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 	struct clk *clk;
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 	struct socfpga_periph_clk *periph_clk;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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+	const char *name = clks->name;
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+	const char *parent_name = clks->parent_name;
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 	periph_clk = kzalloc(sizeof(*periph_clk), GFP_KERNEL);
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 	if (WARN_ON(!periph_clk))
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 		return NULL;
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-	periph_clk->hw.reg = reg + offset;
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+	periph_clk->hw.reg = reg + clks->offset;
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 	init.name = name;
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 	init.ops = &peri_c_clk_ops;
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-	init.flags = flags;
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+	init.flags = clks->flags;
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-	init.num_parents = num_parents;
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-	init.parent_names = parent_names ? parent_names : &parent_name;
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+	init.num_parents = clks->num_parents;
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+	init.parent_names = parent_name ? &parent_name : NULL;
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+	if (init.parent_names == NULL)
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+		init.parent_data = clks->parent_data;
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 	periph_clk->hw.hw.init = &init;
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@@ -104,39 +112,39 @@
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 	return clk;
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 }
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-struct clk *s10_register_cnt_periph(const char *name, const char *parent_name,
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-				    const char * const *parent_names,
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-				    u8 num_parents, unsigned long flags,
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-				    void __iomem *regbase, unsigned long offset,
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-				    u8 fixed_divider, unsigned long bypass_reg,
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-				    unsigned long bypass_shift)
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+struct clk *s10_register_cnt_periph(const struct stratix10_perip_cnt_clock *clks,
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+				    void __iomem *regbase)
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 {
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 	struct clk *clk;
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 	struct socfpga_periph_clk *periph_clk;
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-	struct clk_init_data init = {};
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+	struct clk_init_data init;
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+	const char *name = clks->name;
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+	const char *parent_name = clks->parent_name;
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123
 
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 	periph_clk = kzalloc(sizeof(*periph_clk), GFP_KERNEL);
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 	if (WARN_ON(!periph_clk))
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 		return NULL;
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-	if (offset)
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-		periph_clk->hw.reg = regbase + offset;
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+	if (clks->offset)
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+		periph_clk->hw.reg = regbase + clks->offset;
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 	else
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 		periph_clk->hw.reg = NULL;
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-	if (bypass_reg)
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-		periph_clk->bypass_reg = regbase + bypass_reg;
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+	if (clks->bypass_reg)
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+		periph_clk->bypass_reg = regbase + clks->bypass_reg;
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 	else
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 		periph_clk->bypass_reg = NULL;
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-	periph_clk->bypass_shift = bypass_shift;
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-	periph_clk->fixed_div = fixed_divider;
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+	periph_clk->bypass_shift = clks->bypass_shift;
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+	periph_clk->fixed_div = clks->fixed_divider;
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 	init.name = name;
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 	init.ops = &peri_cnt_clk_ops;
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-	init.flags = flags;
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+	init.flags = clks->flags;
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-	init.num_parents = num_parents;
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-	init.parent_names = parent_names ? parent_names : &parent_name;
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+	init.num_parents = clks->num_parents;
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+	init.parent_names = parent_name ? &parent_name : NULL;
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+	if (init.parent_names == NULL)
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+		init.parent_data = clks->parent_data;
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 	periph_clk->hw.hw.init = &init;
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