.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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1 | 2 | /* |
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2 | 3 | * RZ/A1 Core CPG Clocks |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2013 Ideas On Board SPRL |
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5 | 6 | * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com> |
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6 | | - * |
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7 | | - * This program is free software; you can redistribute it and/or modify |
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8 | | - * it under the terms of the GNU General Public License as published by |
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9 | | - * the Free Software Foundation; version 2 of the License. |
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10 | 7 | */ |
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11 | 8 | |
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12 | 9 | #include <linux/clk-provider.h> |
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13 | 10 | #include <linux/clk/renesas.h> |
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14 | 11 | #include <linux/init.h> |
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| 12 | +#include <linux/io.h> |
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15 | 13 | #include <linux/kernel.h> |
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16 | 14 | #include <linux/of.h> |
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17 | 15 | #include <linux/of_address.h> |
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.. | .. |
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39 | 37 | void __iomem *ppr0, *pibc0; |
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40 | 38 | u16 modes; |
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41 | 39 | |
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42 | | - ppr0 = ioremap_nocache(PPR0, 2); |
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43 | | - pibc0 = ioremap_nocache(PIBC0, 2); |
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| 40 | + ppr0 = ioremap(PPR0, 2); |
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| 41 | + pibc0 = ioremap(PIBC0, 2); |
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44 | 42 | BUG_ON(!ppr0 || !pibc0); |
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45 | 43 | iowrite16(4, pibc0); /* enable input buffer */ |
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46 | 44 | modes = ioread16(ppr0); |
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.. | .. |
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113 | 111 | |
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114 | 112 | clk = rz_cpg_register_clock(np, cpg, name); |
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115 | 113 | if (IS_ERR(clk)) |
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116 | | - pr_err("%s: failed to register %s %s clock (%ld)\n", |
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117 | | - __func__, np->name, name, PTR_ERR(clk)); |
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| 114 | + pr_err("%s: failed to register %pOFn %s clock (%ld)\n", |
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| 115 | + __func__, np, name, PTR_ERR(clk)); |
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118 | 116 | else |
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119 | 117 | cpg->data.clks[i] = clk; |
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120 | 118 | } |
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