.. | .. |
---|
2 | 2 | // Copyright 2017 IBM Corp. |
---|
3 | 3 | #include <asm/pnv-ocxl.h> |
---|
4 | 4 | #include <asm/opal.h> |
---|
5 | | -#include <asm/xive.h> |
---|
6 | 5 | #include <misc/ocxl-config.h> |
---|
7 | 6 | #include "pci.h" |
---|
8 | 7 | |
---|
.. | .. |
---|
484 | 483 | return rc; |
---|
485 | 484 | } |
---|
486 | 485 | EXPORT_SYMBOL_GPL(pnv_ocxl_spa_remove_pe_from_cache); |
---|
487 | | - |
---|
488 | | -int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr) |
---|
489 | | -{ |
---|
490 | | - __be64 flags, trigger_page; |
---|
491 | | - s64 rc; |
---|
492 | | - u32 hwirq; |
---|
493 | | - |
---|
494 | | - hwirq = xive_native_alloc_irq(); |
---|
495 | | - if (!hwirq) |
---|
496 | | - return -ENOENT; |
---|
497 | | - |
---|
498 | | - rc = opal_xive_get_irq_info(hwirq, &flags, NULL, &trigger_page, NULL, |
---|
499 | | - NULL); |
---|
500 | | - if (rc || !trigger_page) { |
---|
501 | | - xive_native_free_irq(hwirq); |
---|
502 | | - return -ENOENT; |
---|
503 | | - } |
---|
504 | | - *irq = hwirq; |
---|
505 | | - *trigger_addr = be64_to_cpu(trigger_page); |
---|
506 | | - return 0; |
---|
507 | | - |
---|
508 | | -} |
---|
509 | | -EXPORT_SYMBOL_GPL(pnv_ocxl_alloc_xive_irq); |
---|
510 | | - |
---|
511 | | -void pnv_ocxl_free_xive_irq(u32 irq) |
---|
512 | | -{ |
---|
513 | | - xive_native_free_irq(irq); |
---|
514 | | -} |
---|
515 | | -EXPORT_SYMBOL_GPL(pnv_ocxl_free_xive_irq); |
---|