.. | .. |
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21 | 21 | #endif |
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22 | 22 | #include <asm/cmpxchg.h> |
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23 | 23 | |
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24 | | -#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I) |
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25 | | - |
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26 | | -#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \ |
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| 24 | +#define ia64_set_rr0_to_rr4(val0, val1, val2, val3, val4) \ |
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27 | 25 | do { \ |
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28 | | - ia64_native_set_rr(0x0000000000000000UL, (val0)); \ |
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29 | | - ia64_native_set_rr(0x2000000000000000UL, (val1)); \ |
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30 | | - ia64_native_set_rr(0x4000000000000000UL, (val2)); \ |
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31 | | - ia64_native_set_rr(0x6000000000000000UL, (val3)); \ |
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32 | | - ia64_native_set_rr(0x8000000000000000UL, (val4)); \ |
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| 26 | + ia64_set_rr(0x0000000000000000UL, (val0)); \ |
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| 27 | + ia64_set_rr(0x2000000000000000UL, (val1)); \ |
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| 28 | + ia64_set_rr(0x4000000000000000UL, (val2)); \ |
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| 29 | + ia64_set_rr(0x6000000000000000UL, (val3)); \ |
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| 30 | + ia64_set_rr(0x8000000000000000UL, (val4)); \ |
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33 | 31 | } while (0) |
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34 | 32 | |
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35 | 33 | /* |
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.. | .. |
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84 | 82 | #define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */ |
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85 | 83 | |
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86 | 84 | #endif |
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87 | | - |
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88 | | - |
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89 | | -#ifndef __ASSEMBLY__ |
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90 | | - |
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91 | | -#define IA64_INTRINSIC_API(name) ia64_native_ ## name |
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92 | | -#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name |
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93 | | - |
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94 | | - |
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95 | | -/************************************************/ |
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96 | | -/* Instructions paravirtualized for correctness */ |
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97 | | -/************************************************/ |
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98 | | -/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */ |
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99 | | -/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag" |
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100 | | - * is not currently used (though it may be in a long-format VHPT system!) |
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101 | | - */ |
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102 | | -#define ia64_fc IA64_INTRINSIC_API(fc) |
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103 | | -#define ia64_thash IA64_INTRINSIC_API(thash) |
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104 | | -#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid) |
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105 | | -#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd) |
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106 | | - |
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107 | | - |
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108 | | -/************************************************/ |
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109 | | -/* Instructions paravirtualized for performance */ |
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110 | | -/************************************************/ |
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111 | | -#define ia64_ssm IA64_INTRINSIC_MACRO(ssm) |
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112 | | -#define ia64_rsm IA64_INTRINSIC_MACRO(rsm) |
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113 | | -#define ia64_getreg IA64_INTRINSIC_MACRO(getreg) |
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114 | | -#define ia64_setreg IA64_INTRINSIC_API(setreg) |
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115 | | -#define ia64_set_rr IA64_INTRINSIC_API(set_rr) |
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116 | | -#define ia64_get_rr IA64_INTRINSIC_API(get_rr) |
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117 | | -#define ia64_ptcga IA64_INTRINSIC_API(ptcga) |
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118 | | -#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i) |
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119 | | -#define ia64_intrin_local_irq_restore \ |
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120 | | - IA64_INTRINSIC_API(intrin_local_irq_restore) |
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121 | | -#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4) |
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122 | | - |
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123 | | -#endif /* !__ASSEMBLY__ */ |
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124 | 85 | |
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125 | 86 | #endif /* _UAPI_ASM_IA64_INTRINSICS_H */ |
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