| .. | .. |
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| 7 | 7 | #include "rk3288-dram-default-timing.dtsi" |
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| 8 | 8 | |
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| 9 | 9 | / { |
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| 10 | + aliases { |
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| 11 | + mshc0 = &emmc; |
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| 12 | + mshc1 = &sdmmc; |
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| 13 | + mshc2 = &sdio0; |
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| 14 | + mshc3 = &sdio1; |
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| 15 | + }; |
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| 16 | + |
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| 10 | 17 | chosen { |
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| 11 | | - bootargs = "earlycon=uart8250,mmio32,0xff690000 vmalloc=496M rw root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait"; |
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| 18 | + bootargs = "earlycon=uart8250,mmio32,0xff690000 console=ttyFIQ0 vmalloc=496M rw root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait"; |
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| 12 | 19 | }; |
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| 13 | 20 | |
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| 14 | 21 | /delete-node/ dmc@ff610000; |
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| .. | .. |
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| 74 | 81 | }; |
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| 75 | 82 | |
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| 76 | 83 | reserved-memory { |
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| 77 | | - ramoops_mem: ramoops@00000000 { |
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| 84 | + ramoops_mem: ramoops@8000000 { |
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| 78 | 85 | reg = <0x0 0x8000000 0x0 0xF0000>; |
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| 79 | 86 | }; |
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| 80 | 87 | |
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| 81 | 88 | drm_logo: drm-logo@00000000 { |
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| 82 | | - compatible = "rockchip,drm-logo"; |
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| 89 | + compatible = "rockchip,drm-logo"; |
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| 83 | 90 | reg = <0x0 0x0 0x0 0x0>; |
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| 84 | 91 | }; |
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| 85 | 92 | }; |
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| .. | .. |
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| 89 | 96 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
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| 90 | 97 | rockchip,serial-id = <2>; |
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| 91 | 98 | rockchip,wake-irq = <0>; |
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| 92 | | - /* If enable uart uses irq instead of fiq */ |
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| 93 | | - rockchip,irq-mode-enable = <0>; |
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| 99 | + rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */ |
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| 94 | 100 | rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ |
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| 95 | 101 | pinctrl-names = "default"; |
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| 96 | 102 | pinctrl-0 = <&uart2_xfer>; |
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| 97 | | - }; |
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| 98 | | - |
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| 99 | | - psci { |
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| 100 | | - compatible = "arm,psci-1.0"; |
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| 101 | | - method = "smc"; |
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| 102 | 103 | }; |
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| 103 | 104 | |
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| 104 | 105 | /delete-node/ timer@ff810000; |
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| .. | .. |
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| 158 | 159 | }; |
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| 159 | 160 | }; |
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| 160 | 161 | |
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| 161 | | -&cpu0 { |
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| 162 | | - enable-method = "psci"; |
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| 163 | | -}; |
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| 164 | | - |
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| 165 | | -&cpu1 { |
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| 166 | | - enable-method = "psci"; |
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| 167 | | -}; |
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| 168 | | - |
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| 169 | | -&cpu2 { |
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| 170 | | - enable-method = "psci"; |
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| 171 | | -}; |
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| 172 | | - |
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| 173 | | -&cpu3 { |
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| 174 | | - enable-method = "psci"; |
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| 175 | | -}; |
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| 176 | | - |
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| 177 | 162 | &dmac_bus_s { |
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| 178 | 163 | /* change to non-secure dmac */ |
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| 179 | 164 | reg = <0x0 0xff600000 0x0 0x4000>; |
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| .. | .. |
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| 195 | 180 | status = "okay"; |
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| 196 | 181 | }; |
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| 197 | 182 | |
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| 183 | +&iep { |
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| 184 | + status = "okay"; |
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| 185 | +}; |
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| 186 | + |
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| 187 | +&iep_mmu { |
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| 188 | + status = "okay"; |
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| 189 | +}; |
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| 190 | + |
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| 191 | +&rga { |
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| 192 | + compatible = "rockchip,rga2"; |
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| 193 | + clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>; |
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| 194 | + clock-names = "aclk_rga", "hclk_rga", "clk_rga"; |
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| 195 | + status = "okay"; |
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| 196 | +}; |
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| 197 | + |
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| 198 | +&rng { |
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| 199 | + status = "okay"; |
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| 200 | +}; |
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| 201 | + |
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| 198 | 202 | &uart2 { |
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| 199 | 203 | status = "disabled"; |
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| 200 | 204 | }; |
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