.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * wm8904.c -- WM8904 ALSA SoC Audio driver |
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3 | 4 | * |
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4 | 5 | * Copyright 2009-12 Wolfson Microelectronics plc |
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5 | 6 | * |
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6 | 7 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> |
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7 | | - * |
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8 | | - * |
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9 | | - * This program is free software; you can redistribute it and/or modify |
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10 | | - * it under the terms of the GNU General Public License version 2 as |
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11 | | - * published by the Free Software Foundation. |
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12 | 8 | */ |
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13 | 9 | |
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14 | 10 | #include <linux/clk.h> |
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15 | 11 | #include <linux/module.h> |
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16 | | -#include <linux/moduleparam.h> |
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17 | 12 | #include <linux/init.h> |
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18 | 13 | #include <linux/delay.h> |
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19 | 14 | #include <linux/pm.h> |
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.. | .. |
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322 | 317 | unsigned int clock0, clock2, rate; |
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323 | 318 | |
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324 | 319 | /* Gate the clock while we're updating to avoid misclocking */ |
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325 | | - clock2 = snd_soc_component_read32(component, WM8904_CLOCK_RATES_2); |
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| 320 | + clock2 = snd_soc_component_read(component, WM8904_CLOCK_RATES_2); |
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326 | 321 | snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_2, |
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327 | 322 | WM8904_SYSCLK_SRC, 0); |
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328 | 323 | |
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.. | .. |
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379 | 374 | int save, i; |
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380 | 375 | |
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381 | 376 | /* Save any enables; the configuration should clear them. */ |
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382 | | - save = snd_soc_component_read32(component, WM8904_DRC_0); |
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| 377 | + save = snd_soc_component_read(component, WM8904_DRC_0); |
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383 | 378 | |
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384 | 379 | for (i = 0; i < WM8904_DRC_REGS; i++) |
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385 | 380 | snd_soc_component_update_bits(component, WM8904_DRC_0 + i, 0xffff, |
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.. | .. |
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452 | 447 | /* The EQ will be disabled while reconfiguring it, remember the |
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453 | 448 | * current configuration. |
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454 | 449 | */ |
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455 | | - save = snd_soc_component_read32(component, WM8904_EQ1); |
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| 450 | + save = snd_soc_component_read(component, WM8904_EQ1); |
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456 | 451 | |
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457 | 452 | for (i = 0; i < WM8904_EQ_REGS; i++) |
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458 | 453 | snd_soc_component_update_bits(component, WM8904_EQ1 + i, 0xffff, |
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.. | .. |
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550 | 545 | static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0); |
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551 | 546 | static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); |
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552 | 547 | |
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553 | | -static const char *input_mode_text[] = { |
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554 | | - "Single-Ended", "Differential Line", "Differential Mic" |
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555 | | -}; |
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556 | | - |
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557 | | -static SOC_ENUM_SINGLE_DECL(lin_mode, |
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558 | | - WM8904_ANALOGUE_LEFT_INPUT_1, 0, |
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559 | | - input_mode_text); |
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560 | | - |
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561 | | -static SOC_ENUM_SINGLE_DECL(rin_mode, |
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562 | | - WM8904_ANALOGUE_RIGHT_INPUT_1, 0, |
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563 | | - input_mode_text); |
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564 | | - |
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565 | 548 | static const char *hpf_mode_text[] = { |
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566 | 549 | "Hi-fi", "Voice 1", "Voice 2", "Voice 3" |
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567 | 550 | }; |
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.. | .. |
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595 | 578 | static const struct snd_kcontrol_new wm8904_adc_snd_controls[] = { |
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596 | 579 | SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8904_ADC_DIGITAL_VOLUME_LEFT, |
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597 | 580 | WM8904_ADC_DIGITAL_VOLUME_RIGHT, 1, 119, 0, digital_tlv), |
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598 | | - |
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599 | | -SOC_ENUM("Left Capture Mode", lin_mode), |
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600 | | -SOC_ENUM("Right Capture Mode", rin_mode), |
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601 | 581 | |
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602 | 582 | /* No TLV since it depends on mode */ |
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603 | 583 | SOC_DOUBLE_R("Capture Volume", WM8904_ANALOGUE_LEFT_INPUT_0, |
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.. | .. |
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717 | 697 | int dcs_mask; |
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718 | 698 | int dcs_l, dcs_r; |
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719 | 699 | int dcs_l_reg, dcs_r_reg; |
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| 700 | + int an_out_reg; |
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720 | 701 | int timeout; |
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721 | 702 | int pwr_reg; |
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722 | 703 | |
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.. | .. |
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732 | 713 | dcs_mask = WM8904_DCS_ENA_CHAN_0 | WM8904_DCS_ENA_CHAN_1; |
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733 | 714 | dcs_r_reg = WM8904_DC_SERVO_8; |
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734 | 715 | dcs_l_reg = WM8904_DC_SERVO_9; |
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| 716 | + an_out_reg = WM8904_ANALOGUE_OUT1_LEFT; |
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735 | 717 | dcs_l = 0; |
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736 | 718 | dcs_r = 1; |
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737 | 719 | break; |
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.. | .. |
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740 | 722 | dcs_mask = WM8904_DCS_ENA_CHAN_2 | WM8904_DCS_ENA_CHAN_3; |
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741 | 723 | dcs_r_reg = WM8904_DC_SERVO_6; |
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742 | 724 | dcs_l_reg = WM8904_DC_SERVO_7; |
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| 725 | + an_out_reg = WM8904_ANALOGUE_OUT2_LEFT; |
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743 | 726 | dcs_l = 2; |
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744 | 727 | dcs_r = 3; |
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745 | 728 | break; |
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.. | .. |
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796 | 779 | /* Wait for DC servo to complete */ |
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797 | 780 | dcs_mask <<= WM8904_DCS_CAL_COMPLETE_SHIFT; |
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798 | 781 | do { |
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799 | | - val = snd_soc_component_read32(component, WM8904_DC_SERVO_READBACK_0); |
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| 782 | + val = snd_soc_component_read(component, WM8904_DC_SERVO_READBACK_0); |
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800 | 783 | if ((val & dcs_mask) == dcs_mask) |
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801 | 784 | break; |
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802 | 785 | |
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.. | .. |
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812 | 795 | snd_soc_component_update_bits(component, reg, |
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813 | 796 | WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP, |
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814 | 797 | WM8904_HPL_ENA_OUTP | WM8904_HPR_ENA_OUTP); |
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| 798 | + |
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| 799 | + /* Update volume, requires PGA to be powered */ |
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| 800 | + val = snd_soc_component_read(component, an_out_reg); |
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| 801 | + snd_soc_component_write(component, an_out_reg, val); |
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815 | 802 | break; |
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816 | 803 | |
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817 | 804 | case SND_SOC_DAPM_POST_PMU: |
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.. | .. |
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834 | 821 | case SND_SOC_DAPM_POST_PMD: |
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835 | 822 | /* Cache the DC servo configuration; this will be |
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836 | 823 | * invalidated if we change the configuration. */ |
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837 | | - wm8904->dcs_state[dcs_l] = snd_soc_component_read32(component, dcs_l_reg); |
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838 | | - wm8904->dcs_state[dcs_r] = snd_soc_component_read32(component, dcs_r_reg); |
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| 824 | + wm8904->dcs_state[dcs_l] = snd_soc_component_read(component, dcs_l_reg); |
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| 825 | + wm8904->dcs_state[dcs_r] = snd_soc_component_read(component, dcs_r_reg); |
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839 | 826 | |
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840 | 827 | snd_soc_component_update_bits(component, WM8904_DC_SERVO_0, |
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841 | 828 | dcs_mask, 0); |
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.. | .. |
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857 | 844 | return 0; |
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858 | 845 | } |
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859 | 846 | |
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| 847 | +static const char *input_mode_text[] = { |
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| 848 | + "Single-Ended", "Differential Line", "Differential Mic" |
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| 849 | +}; |
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| 850 | + |
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860 | 851 | static const char *lin_text[] = { |
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861 | 852 | "IN1L", "IN2L", "IN3L" |
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862 | 853 | }; |
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.. | .. |
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871 | 862 | lin_text); |
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872 | 863 | |
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873 | 864 | static const struct snd_kcontrol_new lin_inv_mux = |
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874 | | - SOC_DAPM_ENUM("Left Capture Inveting Mux", lin_inv_enum); |
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| 865 | + SOC_DAPM_ENUM("Left Capture Inverting Mux", lin_inv_enum); |
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| 866 | + |
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| 867 | +static SOC_ENUM_SINGLE_DECL(lin_mode_enum, |
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| 868 | + WM8904_ANALOGUE_LEFT_INPUT_1, 0, |
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| 869 | + input_mode_text); |
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| 870 | + |
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| 871 | +static const struct snd_kcontrol_new lin_mode = |
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| 872 | + SOC_DAPM_ENUM("Left Capture Mode", lin_mode_enum); |
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875 | 873 | |
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876 | 874 | static const char *rin_text[] = { |
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877 | 875 | "IN1R", "IN2R", "IN3R" |
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.. | .. |
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887 | 885 | rin_text); |
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888 | 886 | |
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889 | 887 | static const struct snd_kcontrol_new rin_inv_mux = |
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890 | | - SOC_DAPM_ENUM("Right Capture Inveting Mux", rin_inv_enum); |
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| 888 | + SOC_DAPM_ENUM("Right Capture Inverting Mux", rin_inv_enum); |
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| 889 | + |
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| 890 | +static SOC_ENUM_SINGLE_DECL(rin_mode_enum, |
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| 891 | + WM8904_ANALOGUE_RIGHT_INPUT_1, 0, |
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| 892 | + input_mode_text); |
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| 893 | + |
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| 894 | +static const struct snd_kcontrol_new rin_mode = |
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| 895 | + SOC_DAPM_ENUM("Right Capture Mode", rin_mode_enum); |
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891 | 896 | |
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892 | 897 | static const char *aif_text[] = { |
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893 | 898 | "Left", "Right" |
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.. | .. |
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937 | 942 | SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM, 0, 0, &lin_mux), |
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938 | 943 | SND_SOC_DAPM_MUX("Left Capture Inverting Mux", SND_SOC_NOPM, 0, 0, |
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939 | 944 | &lin_inv_mux), |
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| 945 | +SND_SOC_DAPM_MUX("Left Capture Mode", SND_SOC_NOPM, 0, 0, &lin_mode), |
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940 | 946 | SND_SOC_DAPM_MUX("Right Capture Mux", SND_SOC_NOPM, 0, 0, &rin_mux), |
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941 | 947 | SND_SOC_DAPM_MUX("Right Capture Inverting Mux", SND_SOC_NOPM, 0, 0, |
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942 | 948 | &rin_inv_mux), |
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| 949 | +SND_SOC_DAPM_MUX("Right Capture Mode", SND_SOC_NOPM, 0, 0, &rin_mode), |
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943 | 950 | |
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944 | 951 | SND_SOC_DAPM_PGA("Left Capture PGA", WM8904_POWER_MANAGEMENT_0, 1, 0, |
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945 | 952 | NULL, 0), |
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.. | .. |
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1062 | 1069 | { "Left Capture Inverting Mux", "IN2L", "IN2L" }, |
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1063 | 1070 | { "Left Capture Inverting Mux", "IN3L", "IN3L" }, |
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1064 | 1071 | |
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| 1072 | + { "Left Capture Mode", "Single-Ended", "Left Capture Inverting Mux" }, |
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| 1073 | + { "Left Capture Mode", "Differential Line", "Left Capture Mux" }, |
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| 1074 | + { "Left Capture Mode", "Differential Line", "Left Capture Inverting Mux" }, |
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| 1075 | + { "Left Capture Mode", "Differential Mic", "Left Capture Mux" }, |
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| 1076 | + { "Left Capture Mode", "Differential Mic", "Left Capture Inverting Mux" }, |
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| 1077 | + |
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1065 | 1078 | { "Right Capture Mux", "IN1R", "IN1R" }, |
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1066 | 1079 | { "Right Capture Mux", "IN2R", "IN2R" }, |
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1067 | 1080 | { "Right Capture Mux", "IN3R", "IN3R" }, |
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.. | .. |
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1070 | 1083 | { "Right Capture Inverting Mux", "IN2R", "IN2R" }, |
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1071 | 1084 | { "Right Capture Inverting Mux", "IN3R", "IN3R" }, |
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1072 | 1085 | |
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1073 | | - { "Left Capture PGA", NULL, "Left Capture Mux" }, |
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1074 | | - { "Left Capture PGA", NULL, "Left Capture Inverting Mux" }, |
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| 1086 | + { "Right Capture Mode", "Single-Ended", "Right Capture Inverting Mux" }, |
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| 1087 | + { "Right Capture Mode", "Differential Line", "Right Capture Mux" }, |
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| 1088 | + { "Right Capture Mode", "Differential Line", "Right Capture Inverting Mux" }, |
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| 1089 | + { "Right Capture Mode", "Differential Mic", "Right Capture Mux" }, |
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| 1090 | + { "Right Capture Mode", "Differential Mic", "Right Capture Inverting Mux" }, |
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1075 | 1091 | |
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1076 | | - { "Right Capture PGA", NULL, "Right Capture Mux" }, |
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1077 | | - { "Right Capture PGA", NULL, "Right Capture Inverting Mux" }, |
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| 1092 | + { "Left Capture PGA", NULL, "Left Capture Mode" }, |
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| 1093 | + { "Right Capture PGA", NULL, "Right Capture Mode" }, |
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1078 | 1094 | |
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1079 | 1095 | { "AIFOUTL Mux", "Left", "ADCL" }, |
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1080 | 1096 | { "AIFOUTL Mux", "Right", "ADCR" }, |
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.. | .. |
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1401 | 1417 | return 0; |
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1402 | 1418 | } |
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1403 | 1419 | |
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1404 | | - |
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1405 | | -static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id, |
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1406 | | - unsigned int freq, int dir) |
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1407 | | -{ |
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1408 | | - struct snd_soc_component *component = dai->component; |
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1409 | | - struct wm8904_priv *priv = snd_soc_component_get_drvdata(component); |
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1410 | | - |
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1411 | | - switch (clk_id) { |
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1412 | | - case WM8904_CLK_MCLK: |
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1413 | | - priv->sysclk_src = clk_id; |
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1414 | | - priv->mclk_rate = freq; |
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1415 | | - break; |
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1416 | | - |
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1417 | | - case WM8904_CLK_FLL: |
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1418 | | - priv->sysclk_src = clk_id; |
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1419 | | - break; |
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1420 | | - |
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1421 | | - default: |
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1422 | | - return -EINVAL; |
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1423 | | - } |
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1424 | | - |
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1425 | | - dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); |
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1426 | | - |
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1427 | | - wm8904_configure_clocking(component); |
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1428 | | - |
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1429 | | - return 0; |
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1430 | | -} |
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1431 | | - |
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1432 | 1420 | static int wm8904_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
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1433 | 1421 | { |
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1434 | 1422 | struct snd_soc_component *component = dai->component; |
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.. | .. |
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1455 | 1443 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
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1456 | 1444 | case SND_SOC_DAIFMT_DSP_B: |
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1457 | 1445 | aif1 |= 0x3 | WM8904_AIF_LRCLK_INV; |
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1458 | | - /* fall through */ |
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| 1446 | + fallthrough; |
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1459 | 1447 | case SND_SOC_DAIFMT_DSP_A: |
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1460 | 1448 | aif1 |= 0x3; |
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1461 | 1449 | break; |
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.. | .. |
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1690 | 1678 | Fout == wm8904->fll_fout) |
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1691 | 1679 | return 0; |
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1692 | 1680 | |
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1693 | | - clock2 = snd_soc_component_read32(component, WM8904_CLOCK_RATES_2); |
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| 1681 | + clock2 = snd_soc_component_read(component, WM8904_CLOCK_RATES_2); |
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1694 | 1682 | |
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1695 | 1683 | if (Fout == 0) { |
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1696 | 1684 | dev_dbg(component->dev, "FLL disabled\n"); |
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.. | .. |
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1735 | 1723 | |
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1736 | 1724 | /* Save current state then disable the FLL and SYSCLK to avoid |
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1737 | 1725 | * misclocking */ |
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1738 | | - fll1 = snd_soc_component_read32(component, WM8904_FLL_CONTROL_1); |
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| 1726 | + fll1 = snd_soc_component_read(component, WM8904_FLL_CONTROL_1); |
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1739 | 1727 | snd_soc_component_update_bits(component, WM8904_CLOCK_RATES_2, |
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1740 | 1728 | WM8904_CLK_SYS_ENA, 0); |
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1741 | 1729 | snd_soc_component_update_bits(component, WM8904_FLL_CONTROL_1, |
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.. | .. |
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1815 | 1803 | return 0; |
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1816 | 1804 | } |
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1817 | 1805 | |
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1818 | | -static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute) |
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| 1806 | +static int wm8904_set_sysclk(struct snd_soc_dai *dai, int clk_id, |
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| 1807 | + unsigned int freq, int dir) |
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| 1808 | +{ |
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| 1809 | + struct snd_soc_component *component = dai->component; |
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| 1810 | + struct wm8904_priv *priv = snd_soc_component_get_drvdata(component); |
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| 1811 | + unsigned long mclk_freq; |
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| 1812 | + int ret; |
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| 1813 | + |
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| 1814 | + switch (clk_id) { |
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| 1815 | + case WM8904_CLK_AUTO: |
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| 1816 | + /* We don't have any rate constraints, so just ignore the |
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| 1817 | + * request to disable constraining. |
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| 1818 | + */ |
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| 1819 | + if (!freq) |
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| 1820 | + return 0; |
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| 1821 | + |
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| 1822 | + mclk_freq = clk_get_rate(priv->mclk); |
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| 1823 | + /* enable FLL if a different sysclk is desired */ |
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| 1824 | + if (mclk_freq != freq) { |
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| 1825 | + priv->sysclk_src = WM8904_CLK_FLL; |
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| 1826 | + ret = wm8904_set_fll(dai, WM8904_FLL_MCLK, |
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| 1827 | + WM8904_FLL_MCLK, |
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| 1828 | + mclk_freq, freq); |
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| 1829 | + if (ret) |
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| 1830 | + return ret; |
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| 1831 | + break; |
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| 1832 | + } |
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| 1833 | + clk_id = WM8904_CLK_MCLK; |
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| 1834 | + fallthrough; |
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| 1835 | + |
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| 1836 | + case WM8904_CLK_MCLK: |
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| 1837 | + priv->sysclk_src = clk_id; |
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| 1838 | + priv->mclk_rate = freq; |
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| 1839 | + break; |
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| 1840 | + |
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| 1841 | + case WM8904_CLK_FLL: |
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| 1842 | + priv->sysclk_src = clk_id; |
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| 1843 | + break; |
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| 1844 | + |
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| 1845 | + default: |
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| 1846 | + return -EINVAL; |
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| 1847 | + } |
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| 1848 | + |
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| 1849 | + dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); |
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| 1850 | + |
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| 1851 | + wm8904_configure_clocking(component); |
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| 1852 | + |
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| 1853 | + return 0; |
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| 1854 | +} |
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| 1855 | + |
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| 1856 | +static int wm8904_mute(struct snd_soc_dai *codec_dai, int mute, int direction) |
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1819 | 1857 | { |
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1820 | 1858 | struct snd_soc_component *component = codec_dai->component; |
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1821 | 1859 | int val; |
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.. | .. |
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1838 | 1876 | |
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1839 | 1877 | switch (level) { |
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1840 | 1878 | case SND_SOC_BIAS_ON: |
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1841 | | - ret = clk_prepare_enable(wm8904->mclk); |
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1842 | | - if (ret) |
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1843 | | - return ret; |
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1844 | 1879 | break; |
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1845 | 1880 | |
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1846 | 1881 | case SND_SOC_BIAS_PREPARE: |
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.. | .. |
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1862 | 1897 | dev_err(component->dev, |
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1863 | 1898 | "Failed to enable supplies: %d\n", |
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1864 | 1899 | ret); |
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| 1900 | + return ret; |
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| 1901 | + } |
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| 1902 | + |
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| 1903 | + ret = clk_prepare_enable(wm8904->mclk); |
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| 1904 | + if (ret) { |
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| 1905 | + dev_err(component->dev, |
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| 1906 | + "Failed to enable MCLK: %d\n", ret); |
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| 1907 | + regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), |
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| 1908 | + wm8904->supplies); |
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1865 | 1909 | return ret; |
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1866 | 1910 | } |
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1867 | 1911 | |
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.. | .. |
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1925 | 1969 | .set_tdm_slot = wm8904_set_tdm_slot, |
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1926 | 1970 | .set_pll = wm8904_set_fll, |
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1927 | 1971 | .hw_params = wm8904_hw_params, |
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1928 | | - .digital_mute = wm8904_digital_mute, |
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| 1972 | + .mute_stream = wm8904_mute, |
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| 1973 | + .no_capture_mute = 1, |
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1929 | 1974 | }; |
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1930 | 1975 | |
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1931 | 1976 | static struct snd_soc_dai_driver wm8904_dai = { |
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.. | .. |
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2110 | 2155 | }; |
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2111 | 2156 | |
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2112 | 2157 | #ifdef CONFIG_OF |
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2113 | | -static enum wm8904_type wm8904_data = WM8904; |
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2114 | | -static enum wm8904_type wm8912_data = WM8912; |
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2115 | | - |
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2116 | 2158 | static const struct of_device_id wm8904_of_match[] = { |
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2117 | 2159 | { |
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2118 | 2160 | .compatible = "wlf,wm8904", |
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2119 | | - .data = &wm8904_data, |
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| 2161 | + .data = (void *)WM8904, |
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2120 | 2162 | }, { |
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2121 | 2163 | .compatible = "wlf,wm8912", |
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2122 | | - .data = &wm8912_data, |
---|
| 2164 | + .data = (void *)WM8912, |
---|
2123 | 2165 | }, { |
---|
2124 | 2166 | /* sentinel */ |
---|
2125 | 2167 | } |
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.. | .. |
---|
2160 | 2202 | match = of_match_node(wm8904_of_match, i2c->dev.of_node); |
---|
2161 | 2203 | if (match == NULL) |
---|
2162 | 2204 | return -EINVAL; |
---|
2163 | | - wm8904->devtype = *((enum wm8904_type *)match->data); |
---|
| 2205 | + wm8904->devtype = (enum wm8904_type)match->data; |
---|
2164 | 2206 | } else { |
---|
2165 | 2207 | wm8904->devtype = id->driver_data; |
---|
2166 | 2208 | } |
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.. | .. |
---|
2264 | 2306 | regmap_update_bits(wm8904->regmap, WM8904_BIAS_CONTROL_0, |
---|
2265 | 2307 | WM8904_POBCTRL, 0); |
---|
2266 | 2308 | |
---|
| 2309 | + /* Fill the cache for the ADC test register */ |
---|
| 2310 | + regmap_read(wm8904->regmap, WM8904_ADC_TEST_0, &val); |
---|
| 2311 | + |
---|
2267 | 2312 | /* Can leave the device powered off until we need it */ |
---|
2268 | 2313 | regcache_cache_only(wm8904->regmap, true); |
---|
2269 | 2314 | regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies), wm8904->supplies); |
---|