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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * Driver for Atmel SAMA5D4 Watchdog Timer |
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3 | 4 | * |
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4 | | - * Copyright (C) 2015 Atmel Corporation |
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5 | | - * |
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6 | | - * Licensed under GPLv2. |
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| 5 | + * Copyright (C) 2015-2019 Microchip Technology Inc. and its subsidiaries |
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7 | 6 | */ |
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8 | 7 | |
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9 | 8 | #include <linux/delay.h> |
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.. | .. |
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12 | 11 | #include <linux/kernel.h> |
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13 | 12 | #include <linux/module.h> |
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14 | 13 | #include <linux/of.h> |
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| 14 | +#include <linux/of_device.h> |
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15 | 15 | #include <linux/of_irq.h> |
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16 | 16 | #include <linux/platform_device.h> |
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17 | 17 | #include <linux/reboot.h> |
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.. | .. |
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30 | 30 | struct watchdog_device wdd; |
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31 | 31 | void __iomem *reg_base; |
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32 | 32 | u32 mr; |
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| 33 | + u32 ir; |
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33 | 34 | unsigned long last_ping; |
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| 35 | + bool need_irq; |
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| 36 | + bool sam9x60_support; |
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34 | 37 | }; |
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35 | 38 | |
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36 | 39 | static int wdt_timeout; |
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.. | .. |
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79 | 82 | { |
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80 | 83 | struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd); |
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81 | 84 | |
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82 | | - wdt->mr &= ~AT91_WDT_WDDIS; |
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| 85 | + if (wdt->sam9x60_support) { |
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| 86 | + writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IER); |
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| 87 | + wdt->mr &= ~AT91_SAM9X60_WDDIS; |
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| 88 | + } else { |
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| 89 | + wdt->mr &= ~AT91_WDT_WDDIS; |
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| 90 | + } |
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83 | 91 | wdt_write(wdt, AT91_WDT_MR, wdt->mr); |
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84 | 92 | |
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85 | 93 | return 0; |
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.. | .. |
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89 | 97 | { |
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90 | 98 | struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd); |
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91 | 99 | |
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92 | | - wdt->mr |= AT91_WDT_WDDIS; |
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| 100 | + if (wdt->sam9x60_support) { |
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| 101 | + writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IDR); |
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| 102 | + wdt->mr |= AT91_SAM9X60_WDDIS; |
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| 103 | + } else { |
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| 104 | + wdt->mr |= AT91_WDT_WDDIS; |
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| 105 | + } |
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93 | 106 | wdt_write(wdt, AT91_WDT_MR, wdt->mr); |
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94 | 107 | |
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95 | 108 | return 0; |
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.. | .. |
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109 | 122 | { |
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110 | 123 | struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd); |
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111 | 124 | u32 value = WDT_SEC2TICKS(timeout); |
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| 125 | + |
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| 126 | + if (wdt->sam9x60_support) { |
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| 127 | + wdt_write(wdt, AT91_SAM9X60_WLR, |
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| 128 | + AT91_SAM9X60_SET_COUNTER(value)); |
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| 129 | + |
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| 130 | + wdd->timeout = timeout; |
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| 131 | + return 0; |
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| 132 | + } |
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112 | 133 | |
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113 | 134 | wdt->mr &= ~AT91_WDT_WDV; |
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114 | 135 | wdt->mr |= AT91_WDT_SET_WDV(value); |
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.. | .. |
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144 | 165 | static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id) |
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145 | 166 | { |
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146 | 167 | struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id); |
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| 168 | + u32 reg; |
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147 | 169 | |
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148 | | - if (wdt_read(wdt, AT91_WDT_SR)) { |
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| 170 | + if (wdt->sam9x60_support) |
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| 171 | + reg = wdt_read(wdt, AT91_SAM9X60_ISR); |
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| 172 | + else |
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| 173 | + reg = wdt_read(wdt, AT91_WDT_SR); |
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| 174 | + |
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| 175 | + if (reg) { |
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149 | 176 | pr_crit("Atmel Watchdog Software Reset\n"); |
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150 | 177 | emergency_restart(); |
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151 | 178 | pr_crit("Reboot didn't succeed\n"); |
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.. | .. |
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158 | 185 | { |
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159 | 186 | const char *tmp; |
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160 | 187 | |
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161 | | - wdt->mr = AT91_WDT_WDDIS; |
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| 188 | + if (wdt->sam9x60_support) |
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| 189 | + wdt->mr = AT91_SAM9X60_WDDIS; |
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| 190 | + else |
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| 191 | + wdt->mr = AT91_WDT_WDDIS; |
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162 | 192 | |
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163 | 193 | if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) && |
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164 | 194 | !strcmp(tmp, "software")) |
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165 | | - wdt->mr |= AT91_WDT_WDFIEN; |
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166 | | - else |
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167 | | - wdt->mr |= AT91_WDT_WDRSTEN; |
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| 195 | + wdt->need_irq = true; |
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168 | 196 | |
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169 | 197 | if (of_property_read_bool(np, "atmel,idle-halt")) |
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170 | 198 | wdt->mr |= AT91_WDT_WDIDLEHLT; |
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.. | .. |
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177 | 205 | |
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178 | 206 | static int sama5d4_wdt_init(struct sama5d4_wdt *wdt) |
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179 | 207 | { |
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180 | | - u32 reg; |
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| 208 | + u32 reg, val; |
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| 209 | + |
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| 210 | + val = WDT_SEC2TICKS(WDT_DEFAULT_TIMEOUT); |
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181 | 211 | /* |
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182 | 212 | * When booting and resuming, the bootloader may have changed the |
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183 | 213 | * watchdog configuration. |
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184 | 214 | * If the watchdog is already running, we can safely update it. |
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185 | 215 | * Else, we have to disable it properly. |
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186 | 216 | */ |
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187 | | - if (wdt_enabled) { |
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188 | | - wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr); |
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189 | | - } else { |
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| 217 | + if (!wdt_enabled) { |
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190 | 218 | reg = wdt_read(wdt, AT91_WDT_MR); |
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191 | | - if (!(reg & AT91_WDT_WDDIS)) |
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| 219 | + if (wdt->sam9x60_support && (!(reg & AT91_SAM9X60_WDDIS))) |
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| 220 | + wdt_write_nosleep(wdt, AT91_WDT_MR, |
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| 221 | + reg | AT91_SAM9X60_WDDIS); |
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| 222 | + else if (!wdt->sam9x60_support && |
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| 223 | + (!(reg & AT91_WDT_WDDIS))) |
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192 | 224 | wdt_write_nosleep(wdt, AT91_WDT_MR, |
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193 | 225 | reg | AT91_WDT_WDDIS); |
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194 | 226 | } |
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| 227 | + |
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| 228 | + if (wdt->sam9x60_support) { |
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| 229 | + if (wdt->need_irq) |
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| 230 | + wdt->ir = AT91_SAM9X60_PERINT; |
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| 231 | + else |
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| 232 | + wdt->mr |= AT91_SAM9X60_PERIODRST; |
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| 233 | + |
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| 234 | + wdt_write(wdt, AT91_SAM9X60_IER, wdt->ir); |
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| 235 | + wdt_write(wdt, AT91_SAM9X60_WLR, AT91_SAM9X60_SET_COUNTER(val)); |
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| 236 | + } else { |
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| 237 | + wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT)); |
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| 238 | + wdt->mr |= AT91_WDT_SET_WDV(val); |
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| 239 | + |
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| 240 | + if (wdt->need_irq) |
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| 241 | + wdt->mr |= AT91_WDT_WDFIEN; |
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| 242 | + else |
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| 243 | + wdt->mr |= AT91_WDT_WDRSTEN; |
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| 244 | + } |
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| 245 | + |
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| 246 | + wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr); |
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| 247 | + |
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195 | 248 | return 0; |
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196 | 249 | } |
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197 | 250 | |
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198 | 251 | static int sama5d4_wdt_probe(struct platform_device *pdev) |
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199 | 252 | { |
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| 253 | + struct device *dev = &pdev->dev; |
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200 | 254 | struct watchdog_device *wdd; |
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201 | 255 | struct sama5d4_wdt *wdt; |
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202 | | - struct resource *res; |
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203 | 256 | void __iomem *regs; |
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204 | 257 | u32 irq = 0; |
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205 | | - u32 timeout; |
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206 | 258 | int ret; |
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207 | 259 | |
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208 | | - wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL); |
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| 260 | + wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL); |
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209 | 261 | if (!wdt) |
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210 | 262 | return -ENOMEM; |
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211 | 263 | |
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.. | .. |
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216 | 268 | wdd->min_timeout = MIN_WDT_TIMEOUT; |
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217 | 269 | wdd->max_timeout = MAX_WDT_TIMEOUT; |
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218 | 270 | wdt->last_ping = jiffies; |
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| 271 | + wdt->sam9x60_support = of_device_is_compatible(dev->of_node, |
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| 272 | + "microchip,sam9x60-wdt"); |
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219 | 273 | |
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220 | 274 | watchdog_set_drvdata(wdd, wdt); |
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221 | 275 | |
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222 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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223 | | - regs = devm_ioremap_resource(&pdev->dev, res); |
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| 276 | + regs = devm_platform_ioremap_resource(pdev, 0); |
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224 | 277 | if (IS_ERR(regs)) |
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225 | 278 | return PTR_ERR(regs); |
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226 | 279 | |
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227 | 280 | wdt->reg_base = regs; |
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228 | 281 | |
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229 | | - irq = irq_of_parse_and_map(pdev->dev.of_node, 0); |
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230 | | - if (!irq) |
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231 | | - dev_warn(&pdev->dev, "failed to get IRQ from DT\n"); |
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232 | | - |
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233 | | - ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt); |
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| 282 | + ret = of_sama5d4_wdt_init(dev->of_node, wdt); |
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234 | 283 | if (ret) |
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235 | 284 | return ret; |
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236 | 285 | |
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237 | | - if ((wdt->mr & AT91_WDT_WDFIEN) && irq) { |
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238 | | - ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler, |
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| 286 | + if (wdt->need_irq) { |
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| 287 | + irq = irq_of_parse_and_map(dev->of_node, 0); |
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| 288 | + if (!irq) { |
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| 289 | + dev_warn(dev, "failed to get IRQ from DT\n"); |
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| 290 | + wdt->need_irq = false; |
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| 291 | + } |
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| 292 | + } |
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| 293 | + |
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| 294 | + if (wdt->need_irq) { |
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| 295 | + ret = devm_request_irq(dev, irq, sama5d4_wdt_irq_handler, |
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239 | 296 | IRQF_SHARED | IRQF_IRQPOLL | |
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240 | 297 | IRQF_NO_SUSPEND, pdev->name, pdev); |
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241 | 298 | if (ret) { |
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242 | | - dev_err(&pdev->dev, |
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243 | | - "cannot register interrupt handler\n"); |
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| 299 | + dev_err(dev, "cannot register interrupt handler\n"); |
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244 | 300 | return ret; |
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245 | 301 | } |
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246 | 302 | } |
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247 | 303 | |
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248 | | - watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev); |
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249 | | - |
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250 | | - timeout = WDT_SEC2TICKS(wdd->timeout); |
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251 | | - |
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252 | | - wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT)); |
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253 | | - wdt->mr |= AT91_WDT_SET_WDV(timeout); |
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| 304 | + watchdog_init_timeout(wdd, wdt_timeout, dev); |
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254 | 305 | |
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255 | 306 | ret = sama5d4_wdt_init(wdt); |
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256 | 307 | if (ret) |
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.. | .. |
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258 | 309 | |
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259 | 310 | watchdog_set_nowayout(wdd, nowayout); |
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260 | 311 | |
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261 | | - ret = watchdog_register_device(wdd); |
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262 | | - if (ret) { |
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263 | | - dev_err(&pdev->dev, "failed to register watchdog device\n"); |
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| 312 | + watchdog_stop_on_unregister(wdd); |
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| 313 | + ret = devm_watchdog_register_device(dev, wdd); |
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| 314 | + if (ret) |
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264 | 315 | return ret; |
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265 | | - } |
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266 | 316 | |
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267 | 317 | platform_set_drvdata(pdev, wdt); |
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268 | 318 | |
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269 | | - dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n", |
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| 319 | + dev_info(dev, "initialized (timeout = %d sec, nowayout = %d)\n", |
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270 | 320 | wdd->timeout, nowayout); |
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271 | 321 | |
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272 | 322 | return 0; |
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273 | 323 | } |
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274 | 324 | |
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275 | | -static int sama5d4_wdt_remove(struct platform_device *pdev) |
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276 | | -{ |
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277 | | - struct sama5d4_wdt *wdt = platform_get_drvdata(pdev); |
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278 | | - |
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279 | | - sama5d4_wdt_stop(&wdt->wdd); |
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280 | | - |
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281 | | - watchdog_unregister_device(&wdt->wdd); |
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282 | | - |
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283 | | - return 0; |
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284 | | -} |
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285 | | - |
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286 | 325 | static const struct of_device_id sama5d4_wdt_of_match[] = { |
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287 | | - { .compatible = "atmel,sama5d4-wdt", }, |
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| 326 | + { |
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| 327 | + .compatible = "atmel,sama5d4-wdt", |
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| 328 | + }, |
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| 329 | + { |
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| 330 | + .compatible = "microchip,sam9x60-wdt", |
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| 331 | + }, |
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288 | 332 | { } |
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289 | 333 | }; |
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290 | 334 | MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match); |
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291 | 335 | |
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292 | 336 | #ifdef CONFIG_PM_SLEEP |
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293 | | -static int sama5d4_wdt_resume(struct device *dev) |
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| 337 | +static int sama5d4_wdt_suspend_late(struct device *dev) |
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| 338 | +{ |
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| 339 | + struct sama5d4_wdt *wdt = dev_get_drvdata(dev); |
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| 340 | + |
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| 341 | + if (watchdog_active(&wdt->wdd)) |
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| 342 | + sama5d4_wdt_stop(&wdt->wdd); |
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| 343 | + |
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| 344 | + return 0; |
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| 345 | +} |
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| 346 | + |
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| 347 | +static int sama5d4_wdt_resume_early(struct device *dev) |
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294 | 348 | { |
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295 | 349 | struct sama5d4_wdt *wdt = dev_get_drvdata(dev); |
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296 | 350 | |
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.. | .. |
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301 | 355 | */ |
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302 | 356 | sama5d4_wdt_init(wdt); |
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303 | 357 | |
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| 358 | + if (watchdog_active(&wdt->wdd)) |
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| 359 | + sama5d4_wdt_start(&wdt->wdd); |
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| 360 | + |
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304 | 361 | return 0; |
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305 | 362 | } |
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306 | 363 | #endif |
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307 | 364 | |
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308 | | -static SIMPLE_DEV_PM_OPS(sama5d4_wdt_pm_ops, NULL, |
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309 | | - sama5d4_wdt_resume); |
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| 365 | +static const struct dev_pm_ops sama5d4_wdt_pm_ops = { |
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| 366 | + SET_LATE_SYSTEM_SLEEP_PM_OPS(sama5d4_wdt_suspend_late, |
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| 367 | + sama5d4_wdt_resume_early) |
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| 368 | +}; |
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310 | 369 | |
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311 | 370 | static struct platform_driver sama5d4_wdt_driver = { |
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312 | 371 | .probe = sama5d4_wdt_probe, |
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313 | | - .remove = sama5d4_wdt_remove, |
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314 | 372 | .driver = { |
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315 | 373 | .name = "sama5d4_wdt", |
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316 | 374 | .pm = &sama5d4_wdt_pm_ops, |
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