修改内核路径

hc

2024-05-14 bedbef8ad3e75a304af6361af235302bcc61d06b

 kernel/drivers/watchdog/orion_wdt.c
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@@ -35,7 +35,15 @@
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  * Watchdog timer block registers.
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  */
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 #define TIMER_CTRL		0x0000
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-#define TIMER_A370_STATUS	0x04
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+#define TIMER1_FIXED_ENABLE_BIT	BIT(12)
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+#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
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+#define TIMER1_ENABLE_BIT	BIT(2)
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+
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+#define TIMER_A370_STATUS	0x0004
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+#define WDT_A370_EXPIRED	BIT(31)
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+#define TIMER1_STATUS_BIT	BIT(8)
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+
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+#define TIMER1_VAL_OFF		0x001c
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 #define WDT_MAX_CYCLE_COUNT	0xffffffff
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@@ -43,11 +51,8 @@
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 #define WDT_A370_RATIO_SHIFT	5
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 #define WDT_A370_RATIO		(1 << WDT_A370_RATIO_SHIFT)
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-#define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
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-#define WDT_A370_EXPIRED	BIT(31)
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-
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 static bool nowayout = WATCHDOG_NOWAYOUT;
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-static int heartbeat = -1;		/* module parameter (seconds) */
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+static int heartbeat;		/* module parameter (seconds) */
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 struct orion_watchdog;
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@@ -158,6 +163,7 @@
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 				   struct orion_watchdog *dev)
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 {
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 	int ret;
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+	u32 val;
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 	dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
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 	if (IS_ERR(dev->clk))
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@@ -168,10 +174,9 @@
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 		return ret;
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 	}
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-	/* Enable the fixed watchdog clock input */
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-	atomic_io_modify(dev->reg + TIMER_CTRL,
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-			 WDT_AXP_FIXED_ENABLE_BIT,
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-			 WDT_AXP_FIXED_ENABLE_BIT);
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+	/* Fix the wdt and timer1 clock freqency to 25MHz */
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+	val = WDT_AXP_FIXED_ENABLE_BIT | TIMER1_FIXED_ENABLE_BIT;
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+	atomic_io_modify(dev->reg + TIMER_CTRL, val, val);
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 	dev->clk_rate = clk_get_rate(dev->clk);
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 	return 0;
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@@ -183,6 +188,10 @@
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 	/* Reload watchdog duration */
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 	writel(dev->clk_rate * wdt_dev->timeout,
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 	       dev->reg + dev->data->wdt_counter_offset);
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+	if (dev->wdt.info->options & WDIOF_PRETIMEOUT)
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+		writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout),
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+		       dev->reg + TIMER1_VAL_OFF);
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+
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 	return 0;
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 }
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@@ -194,13 +203,18 @@
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 	/* Set watchdog duration */
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 	writel(dev->clk_rate * wdt_dev->timeout,
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 	       dev->reg + dev->data->wdt_counter_offset);
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+	if (dev->wdt.info->options & WDIOF_PRETIMEOUT)
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+		writel(dev->clk_rate * (wdt_dev->timeout - wdt_dev->pretimeout),
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+		       dev->reg + TIMER1_VAL_OFF);
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 	/* Clear the watchdog expiration bit */
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 	atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
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 	/* Enable watchdog timer */
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-	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
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-						dev->data->wdt_enable_bit);
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+	reg = dev->data->wdt_enable_bit;
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+	if (dev->wdt.info->options & WDIOF_PRETIMEOUT)
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+		reg |= TIMER1_ENABLE_BIT;
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+	atomic_io_modify(dev->reg + TIMER_CTRL, reg, reg);
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 	/* Enable reset on watchdog */
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 	reg = readl(dev->rstout);
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@@ -277,7 +291,7 @@
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 static int armada375_stop(struct watchdog_device *wdt_dev)
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 {
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 	struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
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-	u32 reg;
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+	u32 reg, mask;
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 	/* Disable reset on watchdog */
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 	atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit,
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@@ -287,7 +301,10 @@
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 	writel(reg, dev->rstout);
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 	/* Disable watchdog timer */
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-	atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
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+	mask = dev->data->wdt_enable_bit;
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+	if (wdt_dev->info->options & WDIOF_PRETIMEOUT)
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+		mask |= TIMER1_ENABLE_BIT;
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+	atomic_io_modify(dev->reg + TIMER_CTRL, mask, 0);
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 	return 0;
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 }
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@@ -349,14 +366,7 @@
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 	return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
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 }
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-static int orion_wdt_set_timeout(struct watchdog_device *wdt_dev,
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-				 unsigned int timeout)
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-{
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-	wdt_dev->timeout = timeout;
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-	return 0;
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-}
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-
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-static const struct watchdog_info orion_wdt_info = {
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+static struct watchdog_info orion_wdt_info = {
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 	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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 	.identity = "Orion Watchdog",
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 };
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@@ -366,13 +376,22 @@
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 	.start = orion_wdt_start,
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 	.stop = orion_wdt_stop,
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 	.ping = orion_wdt_ping,
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-	.set_timeout = orion_wdt_set_timeout,
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 	.get_timeleft = orion_wdt_get_timeleft,
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 };
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 static irqreturn_t orion_wdt_irq(int irq, void *devid)
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 {
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 	panic("Watchdog Timeout");
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+	return IRQ_HANDLED;
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+}
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+
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+static irqreturn_t orion_wdt_pre_irq(int irq, void *devid)
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+{
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+	struct orion_watchdog *dev = devid;
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+
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+	atomic_io_modify(dev->reg + TIMER_A370_STATUS,
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+			 TIMER1_STATUS_BIT, 0);
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+	watchdog_notify_pretimeout(&dev->wdt);
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 	return IRQ_HANDLED;
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 }
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@@ -502,8 +521,7 @@
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 		   of_device_is_compatible(node, "marvell,armada-xp-wdt")) {
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 		/* Dedicated RSTOUT register, can be requested. */
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-		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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-		dev->rstout = devm_ioremap_resource(&pdev->dev, res);
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+		dev->rstout = devm_platform_ioremap_resource(pdev, 1);
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 		if (IS_ERR(dev->rstout))
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 			return PTR_ERR(dev->rstout);
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@@ -511,8 +529,7 @@
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 		   of_device_is_compatible(node, "marvell,armada-380-wdt")) {
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 		/* Dedicated RSTOUT register, can be requested. */
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-		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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-		dev->rstout = devm_ioremap_resource(&pdev->dev, res);
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+		dev->rstout = devm_platform_ioremap_resource(pdev, 1);
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 		if (IS_ERR(dev->rstout))
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 			return PTR_ERR(dev->rstout);
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@@ -585,7 +602,7 @@
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 		set_bit(WDOG_HW_RUNNING, &dev->wdt.status);
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 	/* Request the IRQ only after the watchdog is disabled */
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-	irq = platform_get_irq(pdev, 0);
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+	irq = platform_get_irq_optional(pdev, 0);
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 	if (irq > 0) {
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 		/*
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 		 * Not all supported platforms specify an interrupt for the
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@@ -599,6 +616,19 @@
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 		}
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 	}
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+	/* Optional 2nd interrupt for pretimeout */
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+	irq = platform_get_irq_optional(pdev, 1);
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+	if (irq > 0) {
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+		orion_wdt_info.options |= WDIOF_PRETIMEOUT;
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+		ret = devm_request_irq(&pdev->dev, irq, orion_wdt_pre_irq,
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+				       0, pdev->name, dev);
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+		if (ret < 0) {
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+			dev_err(&pdev->dev, "failed to request IRQ\n");
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+			goto disable_clk;
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+		}
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+	}
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+
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+
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 	watchdog_set_nowayout(&dev->wdt, nowayout);
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 	ret = watchdog_register_device(&dev->wdt);
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 	if (ret)