forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-14 bedbef8ad3e75a304af6361af235302bcc61d06b
kernel/drivers/soc/fsl/qe/ucc_fast.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
34 *
....@@ -6,11 +7,6 @@
67 *
78 * Description:
89 * QE UCC Fast API Set - UCC Fast specific routines implementations.
9
- *
10
- * This program is free software; you can redistribute it and/or modify it
11
- * under the terms of the GNU General Public License as published by the
12
- * Free Software Foundation; either version 2 of the License, or (at your
13
- * option) any later version.
1410 */
1511 #include <linux/kernel.h>
1612 #include <linux/errno.h>
....@@ -33,41 +29,42 @@
3329 printk(KERN_INFO "Base address: 0x%p\n", uccf->uf_regs);
3430
3531 printk(KERN_INFO "gumr : addr=0x%p, val=0x%08x\n",
36
- &uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
32
+ &uccf->uf_regs->gumr, qe_ioread32be(&uccf->uf_regs->gumr));
3733 printk(KERN_INFO "upsmr : addr=0x%p, val=0x%08x\n",
38
- &uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
34
+ &uccf->uf_regs->upsmr, qe_ioread32be(&uccf->uf_regs->upsmr));
3935 printk(KERN_INFO "utodr : addr=0x%p, val=0x%04x\n",
40
- &uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
36
+ &uccf->uf_regs->utodr, qe_ioread16be(&uccf->uf_regs->utodr));
4137 printk(KERN_INFO "udsr : addr=0x%p, val=0x%04x\n",
42
- &uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
38
+ &uccf->uf_regs->udsr, qe_ioread16be(&uccf->uf_regs->udsr));
4339 printk(KERN_INFO "ucce : addr=0x%p, val=0x%08x\n",
44
- &uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
40
+ &uccf->uf_regs->ucce, qe_ioread32be(&uccf->uf_regs->ucce));
4541 printk(KERN_INFO "uccm : addr=0x%p, val=0x%08x\n",
46
- &uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
42
+ &uccf->uf_regs->uccm, qe_ioread32be(&uccf->uf_regs->uccm));
4743 printk(KERN_INFO "uccs : addr=0x%p, val=0x%02x\n",
48
- &uccf->uf_regs->uccs, in_8(&uccf->uf_regs->uccs));
44
+ &uccf->uf_regs->uccs, qe_ioread8(&uccf->uf_regs->uccs));
4945 printk(KERN_INFO "urfb : addr=0x%p, val=0x%08x\n",
50
- &uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
46
+ &uccf->uf_regs->urfb, qe_ioread32be(&uccf->uf_regs->urfb));
5147 printk(KERN_INFO "urfs : addr=0x%p, val=0x%04x\n",
52
- &uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
48
+ &uccf->uf_regs->urfs, qe_ioread16be(&uccf->uf_regs->urfs));
5349 printk(KERN_INFO "urfet : addr=0x%p, val=0x%04x\n",
54
- &uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
50
+ &uccf->uf_regs->urfet, qe_ioread16be(&uccf->uf_regs->urfet));
5551 printk(KERN_INFO "urfset: addr=0x%p, val=0x%04x\n",
56
- &uccf->uf_regs->urfset, in_be16(&uccf->uf_regs->urfset));
52
+ &uccf->uf_regs->urfset,
53
+ qe_ioread16be(&uccf->uf_regs->urfset));
5754 printk(KERN_INFO "utfb : addr=0x%p, val=0x%08x\n",
58
- &uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
55
+ &uccf->uf_regs->utfb, qe_ioread32be(&uccf->uf_regs->utfb));
5956 printk(KERN_INFO "utfs : addr=0x%p, val=0x%04x\n",
60
- &uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
57
+ &uccf->uf_regs->utfs, qe_ioread16be(&uccf->uf_regs->utfs));
6158 printk(KERN_INFO "utfet : addr=0x%p, val=0x%04x\n",
62
- &uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
59
+ &uccf->uf_regs->utfet, qe_ioread16be(&uccf->uf_regs->utfet));
6360 printk(KERN_INFO "utftt : addr=0x%p, val=0x%04x\n",
64
- &uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
61
+ &uccf->uf_regs->utftt, qe_ioread16be(&uccf->uf_regs->utftt));
6562 printk(KERN_INFO "utpt : addr=0x%p, val=0x%04x\n",
66
- &uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
63
+ &uccf->uf_regs->utpt, qe_ioread16be(&uccf->uf_regs->utpt));
6764 printk(KERN_INFO "urtry : addr=0x%p, val=0x%08x\n",
68
- &uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
65
+ &uccf->uf_regs->urtry, qe_ioread32be(&uccf->uf_regs->urtry));
6966 printk(KERN_INFO "guemr : addr=0x%p, val=0x%02x\n",
70
- &uccf->uf_regs->guemr, in_8(&uccf->uf_regs->guemr));
67
+ &uccf->uf_regs->guemr, qe_ioread8(&uccf->uf_regs->guemr));
7168 }
7269 EXPORT_SYMBOL(ucc_fast_dump_regs);
7370
....@@ -89,7 +86,7 @@
8986
9087 void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf)
9188 {
92
- out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
89
+ qe_iowrite16be(UCC_FAST_TOD, &uccf->uf_regs->utodr);
9390 }
9491 EXPORT_SYMBOL(ucc_fast_transmit_on_demand);
9592
....@@ -101,7 +98,7 @@
10198 uf_regs = uccf->uf_regs;
10299
103100 /* Enable reception and/or transmission on this UCC. */
104
- gumr = in_be32(&uf_regs->gumr);
101
+ gumr = qe_ioread32be(&uf_regs->gumr);
105102 if (mode & COMM_DIR_TX) {
106103 gumr |= UCC_FAST_GUMR_ENT;
107104 uccf->enabled_tx = 1;
....@@ -110,7 +107,7 @@
110107 gumr |= UCC_FAST_GUMR_ENR;
111108 uccf->enabled_rx = 1;
112109 }
113
- out_be32(&uf_regs->gumr, gumr);
110
+ qe_iowrite32be(gumr, &uf_regs->gumr);
114111 }
115112 EXPORT_SYMBOL(ucc_fast_enable);
116113
....@@ -122,7 +119,7 @@
122119 uf_regs = uccf->uf_regs;
123120
124121 /* Disable reception and/or transmission on this UCC. */
125
- gumr = in_be32(&uf_regs->gumr);
122
+ gumr = qe_ioread32be(&uf_regs->gumr);
126123 if (mode & COMM_DIR_TX) {
127124 gumr &= ~UCC_FAST_GUMR_ENT;
128125 uccf->enabled_tx = 0;
....@@ -131,7 +128,7 @@
131128 gumr &= ~UCC_FAST_GUMR_ENR;
132129 uccf->enabled_rx = 0;
133130 }
134
- out_be32(&uf_regs->gumr, gumr);
131
+ qe_iowrite32be(gumr, &uf_regs->gumr);
135132 }
136133 EXPORT_SYMBOL(ucc_fast_disable);
137134
....@@ -200,6 +197,8 @@
200197 __func__);
201198 return -ENOMEM;
202199 }
200
+ uccf->ucc_fast_tx_virtual_fifo_base_offset = -1;
201
+ uccf->ucc_fast_rx_virtual_fifo_base_offset = -1;
203202
204203 /* Fill fast UCC structure */
205204 uccf->uf_info = uf_info;
....@@ -263,15 +262,14 @@
263262 gumr |= uf_info->tenc;
264263 gumr |= uf_info->tcrc;
265264 gumr |= uf_info->mode;
266
- out_be32(&uf_regs->gumr, gumr);
265
+ qe_iowrite32be(gumr, &uf_regs->gumr);
267266
268267 /* Allocate memory for Tx Virtual Fifo */
269268 uccf->ucc_fast_tx_virtual_fifo_base_offset =
270269 qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
271
- if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
270
+ if (uccf->ucc_fast_tx_virtual_fifo_base_offset < 0) {
272271 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO\n",
273272 __func__);
274
- uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
275273 ucc_fast_free(uccf);
276274 return -ENOMEM;
277275 }
....@@ -281,24 +279,25 @@
281279 qe_muram_alloc(uf_info->urfs +
282280 UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
283281 UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
284
- if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
282
+ if (uccf->ucc_fast_rx_virtual_fifo_base_offset < 0) {
285283 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO\n",
286284 __func__);
287
- uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
288285 ucc_fast_free(uccf);
289286 return -ENOMEM;
290287 }
291288
292289 /* Set Virtual Fifo registers */
293
- out_be16(&uf_regs->urfs, uf_info->urfs);
294
- out_be16(&uf_regs->urfet, uf_info->urfet);
295
- out_be16(&uf_regs->urfset, uf_info->urfset);
296
- out_be16(&uf_regs->utfs, uf_info->utfs);
297
- out_be16(&uf_regs->utfet, uf_info->utfet);
298
- out_be16(&uf_regs->utftt, uf_info->utftt);
290
+ qe_iowrite16be(uf_info->urfs, &uf_regs->urfs);
291
+ qe_iowrite16be(uf_info->urfet, &uf_regs->urfet);
292
+ qe_iowrite16be(uf_info->urfset, &uf_regs->urfset);
293
+ qe_iowrite16be(uf_info->utfs, &uf_regs->utfs);
294
+ qe_iowrite16be(uf_info->utfet, &uf_regs->utfet);
295
+ qe_iowrite16be(uf_info->utftt, &uf_regs->utftt);
299296 /* utfb, urfb are offsets from MURAM base */
300
- out_be32(&uf_regs->utfb, uccf->ucc_fast_tx_virtual_fifo_base_offset);
301
- out_be32(&uf_regs->urfb, uccf->ucc_fast_rx_virtual_fifo_base_offset);
297
+ qe_iowrite32be(uccf->ucc_fast_tx_virtual_fifo_base_offset,
298
+ &uf_regs->utfb);
299
+ qe_iowrite32be(uccf->ucc_fast_rx_virtual_fifo_base_offset,
300
+ &uf_regs->urfb);
302301
303302 /* Mux clocking */
304303 /* Grant Support */
....@@ -366,14 +365,14 @@
366365 }
367366
368367 /* Set interrupt mask register at UCC level. */
369
- out_be32(&uf_regs->uccm, uf_info->uccm_mask);
368
+ qe_iowrite32be(uf_info->uccm_mask, &uf_regs->uccm);
370369
371370 /* First, clear anything pending at UCC level,
372371 * otherwise, old garbage may come through
373372 * as soon as the dam is opened. */
374373
375374 /* Writing '1' clears */
376
- out_be32(&uf_regs->ucce, 0xffffffff);
375
+ qe_iowrite32be(0xffffffff, &uf_regs->ucce);
377376
378377 *uccf_ret = uccf;
379378 return 0;
....@@ -385,11 +384,8 @@
385384 if (!uccf)
386385 return;
387386
388
- if (uccf->ucc_fast_tx_virtual_fifo_base_offset)
389
- qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
390
-
391
- if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
392
- qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
387
+ qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
388
+ qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
393389
394390 if (uccf->uf_regs)
395391 iounmap(uccf->uf_regs);