修改内核路径

hc

2024-05-14 bedbef8ad3e75a304af6361af235302bcc61d06b

 kernel/drivers/net/ethernet/microchip/lan743x_main.h
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@@ -4,6 +4,7 @@
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 #ifndef _LAN743X_H
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 #define _LAN743X_H
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+#include <linux/phy.h>
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 #include "lan743x_ptp.h"
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 #define DRIVER_AUTHOR   "Bryan Whitehead <Bryan.Whitehead@microchip.com>"
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@@ -26,6 +27,8 @@
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 #define FPGA_REV_GET_MAJOR_(fpga_rev)	((fpga_rev) & 0x000000FF)
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 #define HW_CFG					(0x010)
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+#define HW_CFG_RELOAD_TYPE_ALL_			(0x00000FC0)
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+#define HW_CFG_EE_OTP_RELOAD_			BIT(4)
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 #define HW_CFG_LRST_				BIT(1)
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 #define PMT_CTL					(0x014)
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@@ -102,10 +105,14 @@
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 	((value << 0) & FCT_FLOW_CTL_ON_THRESHOLD_)
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 #define MAC_CR				(0x100)
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+#define MAC_CR_MII_EN_			BIT(19)
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 #define MAC_CR_EEE_EN_			BIT(17)
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 #define MAC_CR_ADD_			BIT(12)
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 #define MAC_CR_ASD_			BIT(11)
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 #define MAC_CR_CNTR_RST_		BIT(5)
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+#define MAC_CR_DPX_			BIT(3)
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+#define MAC_CR_CFG_H_			BIT(2)
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+#define MAC_CR_CFG_L_			BIT(1)
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 #define MAC_CR_RST_			BIT(0)
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 #define MAC_RX				(0x104)
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@@ -453,16 +460,18 @@
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 #define OTP_PWR_DN				(0x1000)
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 #define OTP_PWR_DN_PWRDN_N_			BIT(0)
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-#define OTP_ADDR1				(0x1004)
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-#define OTP_ADDR1_15_11_MASK_			(0x1F)
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-
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-#define OTP_ADDR2				(0x1008)
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-#define OTP_ADDR2_10_3_MASK_			(0xFF)
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+#define OTP_ADDR_HIGH				(0x1004)
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+#define OTP_ADDR_LOW				(0x1008)
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 #define OTP_PRGM_DATA				(0x1010)
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 #define OTP_PRGM_MODE				(0x1014)
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 #define OTP_PRGM_MODE_BYTE_			BIT(0)
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+
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+#define OTP_READ_DATA				(0x1018)
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+
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+#define OTP_FUNC_CMD				(0x1020)
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+#define OTP_FUNC_CMD_READ_			BIT(0)
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 #define OTP_TST_CMD				(0x1024)
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 #define OTP_TST_CMD_PRGVRFY_			BIT(3)
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@@ -651,7 +660,7 @@
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 	struct lan743x_tx_buffer_info *buffer_info;
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-	u32		*head_cpu_ptr;
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+	__le32		*head_cpu_ptr;
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 	dma_addr_t	head_dma_ptr;
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 	int		last_head;
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 	int		last_tail;
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@@ -681,7 +690,7 @@
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 	struct lan743x_rx_buffer_info *buffer_info;
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-	u32		*head_cpu_ptr;
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+	__le32		*head_cpu_ptr;
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 	dma_addr_t	head_dma_ptr;
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 	u32		last_head;
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 	u32		last_tail;
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@@ -694,6 +703,7 @@
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 struct lan743x_adapter {
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 	struct net_device       *netdev;
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 	struct mii_bus		*mdiobus;
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+	phy_interface_t		phy_mode;
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 	int                     msg_enable;
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 #ifdef CONFIG_PM
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 	u32			wolopts;
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@@ -710,6 +720,9 @@
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 	struct lan743x_phy      phy;
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 	struct lan743x_tx       tx[LAN743X_MAX_TX_CHANNELS];
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 	struct lan743x_rx       rx[LAN743X_MAX_RX_CHANNELS];
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+
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+#define LAN743X_ADAPTER_FLAG_OTP		BIT(0)
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+	u32			flags;
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 };
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 #define LAN743X_COMPONENT_FLAG_RX(channel)  BIT(20 + (channel))
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@@ -762,10 +775,10 @@
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 #define TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_	(0x3FFF0000)
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 struct lan743x_tx_descriptor {
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-	u32     data0;
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-	u32     data1;
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-	u32     data2;
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-	u32     data3;
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+	__le32     data0;
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+	__le32     data1;
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+	__le32     data2;
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+	__le32     data3;
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 } __aligned(DEFAULT_DMA_DESCRIPTOR_SPACING);
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 #define TX_BUFFER_INFO_FLAG_ACTIVE		BIT(0)
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@@ -800,10 +813,10 @@
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 #define RX_HEAD_PADDING		NET_IP_ALIGN
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 struct lan743x_rx_descriptor {
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-	u32     data0;
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-	u32     data1;
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-	u32     data2;
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-	u32     data3;
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+	__le32     data0;
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+	__le32     data1;
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+	__le32     data2;
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+	__le32     data3;
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 } __aligned(DEFAULT_DMA_DESCRIPTOR_SPACING);
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 #define RX_BUFFER_INFO_FLAG_ACTIVE      BIT(0)