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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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1 | 2 | /* |
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2 | 3 | * I2C bus driver for Amlogic Meson SoCs |
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3 | 4 | * |
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4 | 5 | * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com> |
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5 | | - * |
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6 | | - * This program is free software; you can redistribute it and/or modify |
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7 | | - * it under the terms of the GNU General Public License version 2 as |
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8 | | - * published by the Free Software Foundation. |
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9 | 6 | */ |
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10 | 7 | |
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11 | 8 | #include <linux/bitfield.h> |
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.. | .. |
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14 | 11 | #include <linux/i2c.h> |
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15 | 12 | #include <linux/interrupt.h> |
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16 | 13 | #include <linux/io.h> |
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| 14 | +#include <linux/iopoll.h> |
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17 | 15 | #include <linux/kernel.h> |
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18 | 16 | #include <linux/module.h> |
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19 | 17 | #include <linux/of.h> |
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.. | .. |
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227 | 225 | writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1); |
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228 | 226 | } |
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229 | 227 | |
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| 228 | +static void meson_i2c_transfer_complete(struct meson_i2c *i2c, u32 ctrl) |
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| 229 | +{ |
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| 230 | + if (ctrl & REG_CTRL_ERROR) { |
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| 231 | + /* |
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| 232 | + * The bit is set when the IGNORE_NAK bit is cleared |
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| 233 | + * and the device didn't respond. In this case, the |
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| 234 | + * I2C controller automatically generates a STOP |
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| 235 | + * condition. |
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| 236 | + */ |
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| 237 | + dev_dbg(i2c->dev, "error bit set\n"); |
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| 238 | + i2c->error = -ENXIO; |
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| 239 | + i2c->state = STATE_IDLE; |
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| 240 | + } else { |
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| 241 | + if (i2c->state == STATE_READ && i2c->count) |
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| 242 | + meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, |
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| 243 | + i2c->count); |
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| 244 | + |
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| 245 | + i2c->pos += i2c->count; |
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| 246 | + |
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| 247 | + if (i2c->pos >= i2c->msg->len) |
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| 248 | + i2c->state = STATE_IDLE; |
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| 249 | + } |
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| 250 | +} |
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| 251 | + |
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230 | 252 | static irqreturn_t meson_i2c_irq(int irqno, void *dev_id) |
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231 | 253 | { |
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232 | 254 | struct meson_i2c *i2c = dev_id; |
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.. | .. |
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246 | 268 | return IRQ_NONE; |
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247 | 269 | } |
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248 | 270 | |
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249 | | - if (ctrl & REG_CTRL_ERROR) { |
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250 | | - /* |
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251 | | - * The bit is set when the IGNORE_NAK bit is cleared |
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252 | | - * and the device didn't respond. In this case, the |
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253 | | - * I2C controller automatically generates a STOP |
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254 | | - * condition. |
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255 | | - */ |
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256 | | - dev_dbg(i2c->dev, "error bit set\n"); |
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257 | | - i2c->error = -ENXIO; |
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258 | | - i2c->state = STATE_IDLE; |
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259 | | - complete(&i2c->done); |
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260 | | - goto out; |
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261 | | - } |
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| 271 | + meson_i2c_transfer_complete(i2c, ctrl); |
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262 | 272 | |
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263 | | - if (i2c->state == STATE_READ && i2c->count) |
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264 | | - meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); |
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265 | | - |
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266 | | - i2c->pos += i2c->count; |
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267 | | - |
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268 | | - if (i2c->pos >= i2c->msg->len) { |
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269 | | - i2c->state = STATE_IDLE; |
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| 273 | + if (i2c->state == STATE_IDLE) { |
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270 | 274 | complete(&i2c->done); |
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271 | 275 | goto out; |
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272 | 276 | } |
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.. | .. |
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296 | 300 | } |
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297 | 301 | |
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298 | 302 | static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, |
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299 | | - int last) |
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| 303 | + int last, bool atomic) |
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300 | 304 | { |
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301 | 305 | unsigned long time_left, flags; |
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302 | 306 | int ret = 0; |
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| 307 | + u32 ctrl; |
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303 | 308 | |
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304 | 309 | i2c->msg = msg; |
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305 | 310 | i2c->last = last; |
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.. | .. |
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317 | 322 | |
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318 | 323 | i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; |
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319 | 324 | meson_i2c_prepare_xfer(i2c); |
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320 | | - reinit_completion(&i2c->done); |
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| 325 | + |
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| 326 | + if (!atomic) |
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| 327 | + reinit_completion(&i2c->done); |
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321 | 328 | |
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322 | 329 | /* Start the transfer */ |
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323 | 330 | meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); |
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324 | 331 | |
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325 | | - time_left = msecs_to_jiffies(I2C_TIMEOUT_MS); |
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326 | | - time_left = wait_for_completion_timeout(&i2c->done, time_left); |
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| 332 | + if (atomic) { |
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| 333 | + ret = readl_poll_timeout_atomic(i2c->regs + REG_CTRL, ctrl, |
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| 334 | + !(ctrl & REG_CTRL_STATUS), |
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| 335 | + 10, I2C_TIMEOUT_MS * 1000); |
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| 336 | + } else { |
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| 337 | + time_left = msecs_to_jiffies(I2C_TIMEOUT_MS); |
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| 338 | + time_left = wait_for_completion_timeout(&i2c->done, time_left); |
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| 339 | + |
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| 340 | + if (!time_left) |
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| 341 | + ret = -ETIMEDOUT; |
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| 342 | + } |
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327 | 343 | |
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328 | 344 | /* |
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329 | 345 | * Protect access to i2c struct and registers from interrupt |
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.. | .. |
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332 | 348 | */ |
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333 | 349 | spin_lock_irqsave(&i2c->lock, flags); |
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334 | 350 | |
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| 351 | + if (atomic && !ret) |
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| 352 | + meson_i2c_transfer_complete(i2c, ctrl); |
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| 353 | + |
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335 | 354 | /* Abort any active operation */ |
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336 | 355 | meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); |
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337 | 356 | |
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338 | | - if (!time_left) { |
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| 357 | + if (ret) |
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339 | 358 | i2c->state = STATE_IDLE; |
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340 | | - ret = -ETIMEDOUT; |
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341 | | - } |
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342 | 359 | |
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343 | 360 | if (i2c->error) |
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344 | 361 | ret = i2c->error; |
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.. | .. |
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348 | 365 | return ret; |
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349 | 366 | } |
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350 | 367 | |
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351 | | -static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, |
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352 | | - int num) |
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| 368 | +static int meson_i2c_xfer_messages(struct i2c_adapter *adap, |
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| 369 | + struct i2c_msg *msgs, int num, bool atomic) |
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353 | 370 | { |
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354 | 371 | struct meson_i2c *i2c = adap->algo_data; |
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355 | 372 | int i, ret = 0; |
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356 | 373 | |
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357 | | - clk_enable(i2c->clk); |
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358 | | - |
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359 | 374 | for (i = 0; i < num; i++) { |
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360 | | - ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1); |
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| 375 | + ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1, atomic); |
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361 | 376 | if (ret) |
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362 | 377 | break; |
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363 | 378 | } |
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364 | 379 | |
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365 | | - clk_disable(i2c->clk); |
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366 | | - |
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367 | 380 | return ret ?: i; |
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| 381 | +} |
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| 382 | + |
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| 383 | +static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, |
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| 384 | + int num) |
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| 385 | +{ |
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| 386 | + return meson_i2c_xfer_messages(adap, msgs, num, false); |
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| 387 | +} |
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| 388 | + |
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| 389 | +static int meson_i2c_xfer_atomic(struct i2c_adapter *adap, |
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| 390 | + struct i2c_msg *msgs, int num) |
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| 391 | +{ |
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| 392 | + return meson_i2c_xfer_messages(adap, msgs, num, true); |
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368 | 393 | } |
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369 | 394 | |
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370 | 395 | static u32 meson_i2c_func(struct i2c_adapter *adap) |
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.. | .. |
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373 | 398 | } |
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374 | 399 | |
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375 | 400 | static const struct i2c_algorithm meson_i2c_algorithm = { |
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376 | | - .master_xfer = meson_i2c_xfer, |
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377 | | - .functionality = meson_i2c_func, |
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| 401 | + .master_xfer = meson_i2c_xfer, |
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| 402 | + .master_xfer_atomic = meson_i2c_xfer_atomic, |
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| 403 | + .functionality = meson_i2c_func, |
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378 | 404 | }; |
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379 | 405 | |
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380 | 406 | static int meson_i2c_probe(struct platform_device *pdev) |
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381 | 407 | { |
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382 | 408 | struct device_node *np = pdev->dev.of_node; |
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383 | 409 | struct meson_i2c *i2c; |
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384 | | - struct resource *mem; |
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385 | 410 | struct i2c_timings timings; |
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386 | 411 | int irq, ret = 0; |
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387 | 412 | |
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.. | .. |
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406 | 431 | return PTR_ERR(i2c->clk); |
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407 | 432 | } |
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408 | 433 | |
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409 | | - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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410 | | - i2c->regs = devm_ioremap_resource(&pdev->dev, mem); |
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| 434 | + i2c->regs = devm_platform_ioremap_resource(pdev, 0); |
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411 | 435 | if (IS_ERR(i2c->regs)) |
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412 | 436 | return PTR_ERR(i2c->regs); |
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413 | 437 | |
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414 | 438 | irq = platform_get_irq(pdev, 0); |
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415 | | - if (irq < 0) { |
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416 | | - dev_err(&pdev->dev, "can't find IRQ\n"); |
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| 439 | + if (irq < 0) |
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417 | 440 | return irq; |
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418 | | - } |
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419 | 441 | |
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420 | 442 | ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c); |
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421 | 443 | if (ret < 0) { |
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.. | .. |
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423 | 445 | return ret; |
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424 | 446 | } |
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425 | 447 | |
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426 | | - ret = clk_prepare(i2c->clk); |
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| 448 | + ret = clk_prepare_enable(i2c->clk); |
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427 | 449 | if (ret < 0) { |
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428 | 450 | dev_err(&pdev->dev, "can't prepare clock\n"); |
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429 | 451 | return ret; |
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.. | .. |
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443 | 465 | */ |
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444 | 466 | meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); |
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445 | 467 | |
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446 | | - ret = i2c_add_adapter(&i2c->adap); |
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447 | | - if (ret < 0) { |
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448 | | - clk_unprepare(i2c->clk); |
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449 | | - return ret; |
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450 | | - } |
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451 | | - |
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452 | 468 | /* Disable filtering */ |
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453 | 469 | meson_i2c_set_mask(i2c, REG_SLAVE_ADDR, |
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454 | 470 | REG_SLV_SDA_FILTER | REG_SLV_SCL_FILTER, 0); |
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455 | 471 | |
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456 | 472 | meson_i2c_set_clk_div(i2c, timings.bus_freq_hz); |
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| 473 | + |
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| 474 | + ret = i2c_add_adapter(&i2c->adap); |
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| 475 | + if (ret < 0) { |
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| 476 | + clk_disable_unprepare(i2c->clk); |
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| 477 | + return ret; |
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| 478 | + } |
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457 | 479 | |
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458 | 480 | return 0; |
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459 | 481 | } |
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.. | .. |
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463 | 485 | struct meson_i2c *i2c = platform_get_drvdata(pdev); |
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464 | 486 | |
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465 | 487 | i2c_del_adapter(&i2c->adap); |
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466 | | - clk_unprepare(i2c->clk); |
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| 488 | + clk_disable_unprepare(i2c->clk); |
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467 | 489 | |
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468 | 490 | return 0; |
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469 | 491 | } |
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