修改内核路径

hc

2024-05-14 bedbef8ad3e75a304af6361af235302bcc61d06b

 kernel/arch/powerpc/include/asm/pgalloc.h
..
..
@@ -20,10 +20,59 @@
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 #define PGALLOC_GFP (GFP_KERNEL | __GFP_ZERO)
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+pte_t *pte_fragment_alloc(struct mm_struct *mm, int kernel);
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+
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+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm)
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+{
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+	return (pte_t *)pte_fragment_alloc(mm, 1);
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+}
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+
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+static inline pgtable_t pte_alloc_one(struct mm_struct *mm)
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+{
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+	return (pgtable_t)pte_fragment_alloc(mm, 0);
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+}
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+
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+void pte_frag_destroy(void *pte_frag);
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+void pte_fragment_free(unsigned long *table, int kernel);
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+
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+static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte)
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+{
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+	pte_fragment_free((unsigned long *)pte, 1);
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+}
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+
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+static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
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+{
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+	pte_fragment_free((unsigned long *)ptepage, 0);
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+}
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+
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+/*
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+ * Functions that deal with pagetables that could be at any level of
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+ * the table need to be passed an "index_size" so they know how to
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+ * handle allocation.  For PTE pages, the allocation size will be
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+ * (2^index_size * sizeof(pointer)) and allocations are drawn from
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+ * the kmem_cache in PGT_CACHE(index_size).
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+ *
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+ * The maximum index size needs to be big enough to allow any
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+ * pagetable sizes we need, but small enough to fit in the low bits of
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+ * any page table pointer.  In other words all pagetables, even tiny
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+ * ones, must be aligned to allow at least enough low 0 bits to
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+ * contain this value.  This value is also used as a mask, so it must
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+ * be one less than a power of two.
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+ */
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+#define MAX_PGTABLE_INDEX_SIZE	0xf
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+
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+extern struct kmem_cache *pgtable_cache[];
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+#define PGT_CACHE(shift) pgtable_cache[shift]
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+
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 #ifdef CONFIG_PPC_BOOK3S
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 #include <asm/book3s/pgalloc.h>
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 #else
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 #include <asm/nohash/pgalloc.h>
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 #endif
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+static inline pgtable_t pmd_pgtable(pmd_t pmd)
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+{
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+	return (pgtable_t)pmd_page_vaddr(pmd);
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+}
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+
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 #endif /* _ASM_POWERPC_PGALLOC_H */