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2024-05-14 bedbef8ad3e75a304af6361af235302bcc61d06b 
 kernel/arch/powerpc/include/asm/bitops.h
....@@ -1,3 +1,4 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23  * PowerPC atomic bit operations.
34  *
....@@ -26,11 +27,6 @@
2627  * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
2728  * number field needs to be reversed compared to the big-endian bit
2829  * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
29
- *
30
- * This program is free software; you can redistribute it and/or
31
- * modify it under the terms of the GNU General Public License
32
- * as published by the Free Software Foundation; either version
33
- * 2 of the License, or (at your option) any later version.
3430  */
3531 
3632 #ifndef _ASM_POWERPC_BITOPS_H
....@@ -45,7 +41,6 @@
4541 #include <linux/compiler.h>
4642 #include <asm/asm-compat.h>
4743 #include <asm/synch.h>
48
-#include <asm/asm-405.h>
4944 
5045 /* PPC bit number conversion */
5146 #define PPC_BITLSHIFT(be)	(BITS_PER_LONG - 1 - (be))
....@@ -68,7 +63,7 @@
6863 
6964 /* Macro for generating the ***_bits() functions */
7065 #define DEFINE_BITOP(fn, op, prefix)		\
71
-static __inline__ void fn(unsigned long mask,	\
66
+static inline void fn(unsigned long mask,	\
7267 		volatile unsigned long *_p)	\
7368 {						\
7469 	unsigned long old;			\
....@@ -77,7 +72,6 @@
7772 	prefix					\
7873 "1:"	PPC_LLARX(%0,0,%3,0) "\n"		\
7974 	stringify_in_c(op) "%0,%0,%2\n"		\
80
-	PPC405_ERR77(0,%3)			\
8175 	PPC_STLCX "%0,0,%3\n"			\
8276 	"bne- 1b\n"				\
8377 	: "=&r" (old), "+m" (*p)		\
....@@ -90,22 +84,22 @@
9084 DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER)
9185 DEFINE_BITOP(change_bits, xor, "")
9286 
93
-static __inline__ void set_bit(int nr, volatile unsigned long *addr)
87
+static inline void arch_set_bit(int nr, volatile unsigned long *addr)
9488 {
9589 	set_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
9690 }
9791 
98
-static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
92
+static inline void arch_clear_bit(int nr, volatile unsigned long *addr)
9993 {
10094 	clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
10195 }
10296 
103
-static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
97
+static inline void arch_clear_bit_unlock(int nr, volatile unsigned long *addr)
10498 {
10599 	clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr));
106100 }
107101 
108
-static __inline__ void change_bit(int nr, volatile unsigned long *addr)
102
+static inline void arch_change_bit(int nr, volatile unsigned long *addr)
109103 {
110104 	change_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
111105 }
....@@ -113,7 +107,7 @@
113107 /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
114108  * operands. */
115109 #define DEFINE_TESTOP(fn, op, prefix, postfix, eh)	\
116
-static __inline__ unsigned long fn(			\
110
+static inline unsigned long fn(			\
117111 		unsigned long mask,			\
118112 		volatile unsigned long *_p)		\
119113 {							\
....@@ -123,7 +117,6 @@
123117 	prefix						\
124118 "1:"	PPC_LLARX(%0,0,%3,eh) "\n"			\
125119 	stringify_in_c(op) "%1,%0,%2\n"			\
126
-	PPC405_ERR77(0,%3)				\
127120 	PPC_STLCX "%1,0,%3\n"				\
128121 	"bne- 1b\n"					\
129122 	postfix						\
....@@ -142,34 +135,34 @@
142135 DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
143136 	      PPC_ATOMIC_EXIT_BARRIER, 0)
144137 
145
-static __inline__ int test_and_set_bit(unsigned long nr,
146
-				       volatile unsigned long *addr)
138
+static inline int arch_test_and_set_bit(unsigned long nr,
139
+					volatile unsigned long *addr)
147140 {
148141 	return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
149142 }
150143 
151
-static __inline__ int test_and_set_bit_lock(unsigned long nr,
152
-				       volatile unsigned long *addr)
144
+static inline int arch_test_and_set_bit_lock(unsigned long nr,
145
+					     volatile unsigned long *addr)
153146 {
154147 	return test_and_set_bits_lock(BIT_MASK(nr),
155148 				addr + BIT_WORD(nr)) != 0;
156149 }
157150 
158
-static __inline__ int test_and_clear_bit(unsigned long nr,
159
-					 volatile unsigned long *addr)
151
+static inline int arch_test_and_clear_bit(unsigned long nr,
152
+					  volatile unsigned long *addr)
160153 {
161154 	return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
162155 }
163156 
164
-static __inline__ int test_and_change_bit(unsigned long nr,
165
-					  volatile unsigned long *addr)
157
+static inline int arch_test_and_change_bit(unsigned long nr,
158
+					   volatile unsigned long *addr)
166159 {
167160 	return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
168161 }
169162 
170163 #ifdef CONFIG_PPC64
171
-static __inline__ unsigned long clear_bit_unlock_return_word(int nr,
172
-						volatile unsigned long *addr)
164
+static inline unsigned long
165
+clear_bit_unlock_return_word(int nr, volatile unsigned long *addr)
173166 {
174167 	unsigned long old, t;
175168 	unsigned long *p = (unsigned long *)addr + BIT_WORD(nr);
....@@ -179,7 +172,6 @@
179172 	PPC_RELEASE_BARRIER
180173 "1:"	PPC_LLARX(%0,0,%3,0) "\n"
181174 	"andc %1,%0,%2\n"
182
-	PPC405_ERR77(0,%3)
183175 	PPC_STLCX "%1,0,%3\n"
184176 	"bne- 1b\n"
185177 	: "=&r" (old), "=&r" (t)
....@@ -189,15 +181,18 @@
189181 	return old;
190182 }
191183 
192
-/* This is a special function for mm/filemap.c */
193
-#define clear_bit_unlock_is_negative_byte(nr, addr)			\
194
-	(clear_bit_unlock_return_word(nr, addr) & BIT_MASK(PG_waiters))
184
+/*
185
+ * This is a special function for mm/filemap.c
186
+ * Bit 7 corresponds to PG_waiters.
187
+ */
188
+#define arch_clear_bit_unlock_is_negative_byte(nr, addr)		\
189
+	(clear_bit_unlock_return_word(nr, addr) & BIT_MASK(7))
195190 
196191 #endif /* CONFIG_PPC64 */
197192 
198193 #include <asm-generic/bitops/non-atomic.h>
199194 
200
-static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
195
+static inline void arch___clear_bit_unlock(int nr, volatile unsigned long *addr)
201196 {
202197 	__asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
203198 	__clear_bit(nr, addr);
....@@ -219,7 +214,7 @@
219214  * fls: find last (most-significant) bit set.
220215  * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
221216  */
222
-static __inline__ int fls(unsigned int x)
217
+static inline int fls(unsigned int x)
223218 {
224219 	int lz;
225220 
....@@ -237,7 +232,7 @@
237232  * 32-bit fls calls.
238233  */
239234 #ifdef CONFIG_PPC64
240
-static __inline__ int fls64(__u64 x)
235
+static inline int fls64(__u64 x)
241236 {
242237 	int lz;
243238 
....@@ -262,6 +257,10 @@
262257 
263258 #include <asm-generic/bitops/find.h>
264259 
260
+/* wrappers that deal with KASAN instrumentation */
261
+#include <asm-generic/bitops/instrumented-atomic.h>
262
+#include <asm-generic/bitops/instrumented-lock.h>
263
+
265264 /* Little-endian versions */
266265 #include <asm-generic/bitops/le.h>
267266