stmmac read mac form eeprom

hc

2023-02-14 b625cdcd68479b3d540a915785b6d9809b52a2f8

 kernel/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
..
..
@@ -228,7 +228,7 @@
228
228
 			priv->clk_csr = STMMAC_CSR_100_150M;
229
229
 		else if ((clk_rate >= CSR_F_150M) && (clk_rate < CSR_F_250M))
230
230
 			priv->clk_csr = STMMAC_CSR_150_250M;
231
-		else if ((clk_rate >= CSR_F_250M) && (clk_rate <= CSR_F_300M))
231
+		else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M))
232
232
 			priv->clk_csr = STMMAC_CSR_250_300M;
233
233
 	}
234
234
 
..
..
@@ -508,7 +508,6 @@
508
508
 	}
509
509
 }
510
510
 
511
-#ifdef CONFIG_STMMAC_PTP
512
511
 /**
513
512
  *  stmmac_hwtstamp_set - control hardware timestamping.
514
513
  *  @dev: device pointer.
..
..
@@ -761,7 +760,6 @@
761
760
 	return copy_to_user(ifr->ifr_data, config,
762
761
 			    sizeof(*config)) ? -EFAULT : 0;
763
762
 }
764
-#endif /* CONFIG_STMMAC_PTP */
765
763
 
766
764
 /**
767
765
  * stmmac_init_ptp - init PTP
..
..
@@ -802,7 +800,7 @@
802
800
 
803
801
 static void stmmac_release_ptp(struct stmmac_priv *priv)
804
802
 {
805
-	if (priv->plat->clk_ptp_ref && IS_ENABLED(CONFIG_STMMAC_PTP))
803
+	if (priv->plat->clk_ptp_ref)
806
804
 		clk_disable_unprepare(priv->plat->clk_ptp_ref);
807
805
 	stmmac_ptp_unregister(priv);
808
806
 }
..
..
@@ -936,6 +934,23 @@
936
934
 	}
937
935
 }
938
936
 
937
+static void rtl8211F_led_control(struct phy_device *phydev)
938
+{
939
+	printk("ben debug:rtl8211F_led_control...1 \n");
940
+
941
+       	if(!phydev) return;
942
+       	if(phydev->phy_id!=0x001cc916) return; /* only for 8211E*/
943
+
944
+       	/*switch to extension page44*/
945
+	phy_write(phydev, 31, 0x0d04);
946
+//add hc 1000M --> orange   
947
+//	 100M  --> green
948
+	phy_write(phydev, 16, 0x6D02);  
949
+//add hc 1000M&100M  --> green
950
+//     	phy_write(phydev, 16, 0x6C0A); 
951
+	printk("ben debug:rtl8211F_led_control...2 \n");
952
+}
953
+
939
954
 /**
940
955
  * stmmac_init_phy - PHY initialization
941
956
  * @dev: net device structure
..
..
@@ -956,9 +971,6 @@
956
971
 	priv->oldlink = false;
957
972
 	priv->speed = SPEED_UNKNOWN;
958
973
 	priv->oldduplex = DUPLEX_UNKNOWN;
959
-
960
-	if (priv->plat->integrated_phy_power)
961
-		priv->plat->integrated_phy_power(priv->plat->bsp_priv, true);
962
974
 
963
975
 	if (priv->plat->phy_node) {
964
976
 		phydev = of_phy_connect(dev, priv->plat->phy_node,
..
..
@@ -1020,6 +1032,9 @@
1020
1032
 		phydev->irq = PHY_POLL;
1021
1033
 
1022
1034
 	phy_attached_info(phydev);
1035
+
1036
+	//add ben
1037
+	rtl8211F_led_control(phydev);
1023
1038
 	return 0;
1024
1039
 }
1025
1040
 
..
..
@@ -2159,7 +2174,8 @@
2159
2174
  */
2160
2175
 static void stmmac_check_ether_addr(struct stmmac_priv *priv)
2161
2176
 {
2162
-	if (!is_valid_ether_addr(priv->dev->dev_addr)) {
2177
+	//if (!is_valid_ether_addr(priv->dev->dev_addr)) {
2178
+	if (1) {
2163
2179
 		stmmac_get_umac_addr(priv, priv->hw, priv->dev->dev_addr, 0);
2164
2180
 		if (likely(priv->plat->get_eth_addr))
2165
2181
 			priv->plat->get_eth_addr(priv->plat->bsp_priv,
..
..
@@ -2552,7 +2568,7 @@
2552
2568
 
2553
2569
 	stmmac_mmc_setup(priv);
2554
2570
 
2555
-	if (IS_ENABLED(CONFIG_STMMAC_PTP) && init_ptp) {
2571
+	if (init_ptp) {
2556
2572
 		ret = clk_prepare_enable(priv->plat->clk_ptp_ref);
2557
2573
 		if (ret < 0)
2558
2574
 			netdev_warn(priv->dev, "failed to enable PTP reference clock: %d\n", ret);
..
..
@@ -2594,8 +2610,7 @@
2594
2610
 {
2595
2611
 	struct stmmac_priv *priv = netdev_priv(dev);
2596
2612
 
2597
-	if (IS_ENABLED(CONFIG_STMMAC_PTP))
2598
-		clk_disable_unprepare(priv->plat->clk_ptp_ref);
2613
+	clk_disable_unprepare(priv->plat->clk_ptp_ref);
2599
2614
 }
2600
2615
 
2601
2616
 /**
..
..
@@ -2733,9 +2748,6 @@
2733
2748
 	if (dev->phydev) {
2734
2749
 		phy_stop(dev->phydev);
2735
2750
 		phy_disconnect(dev->phydev);
2736
-		if (priv->plat->integrated_phy_power)
2737
-			priv->plat->integrated_phy_power(priv->plat->bsp_priv,
2738
-							 false);
2739
2751
 	}
2740
2752
 
2741
2753
 	stmmac_disable_all_queues(priv);
..
..
@@ -2766,8 +2778,7 @@
2766
2778
 
2767
2779
 	netif_carrier_off(dev);
2768
2780
 
2769
-	if (IS_ENABLED(CONFIG_STMMAC_PTP))
2770
-		stmmac_release_ptp(priv);
2781
+	stmmac_release_ptp(priv);
2771
2782
 
2772
2783
 	return 0;
2773
2784
 }
..
..
@@ -3746,6 +3757,7 @@
3746
3757
 	/* To handle GMAC own interrupts */
3747
3758
 	if ((priv->plat->has_gmac) || xmac) {
3748
3759
 		int status = stmmac_host_irq_status(priv, priv->hw, &priv->xstats);
3760
+		int mtl_status;
3749
3761
 
3750
3762
 		if (unlikely(status)) {
3751
3763
 			/* For LPI we need to save the tx status */
..
..
@@ -3756,8 +3768,17 @@
3756
3768
 		}
3757
3769
 
3758
3770
 		for (queue = 0; queue < queues_count; queue++) {
3759
-			status = stmmac_host_mtl_irq_status(priv, priv->hw,
3760
-							    queue);
3771
+			struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
3772
+
3773
+			mtl_status = stmmac_host_mtl_irq_status(priv, priv->hw,
3774
+								queue);
3775
+			if (mtl_status != -EINVAL)
3776
+				status |= mtl_status;
3777
+
3778
+			if (status & CORE_IRQ_MTL_RX_OVERFLOW)
3779
+				stmmac_set_rx_tail_ptr(priv, priv->ioaddr,
3780
+						       rx_q->rx_tail_addr,
3781
+						       queue);
3761
3782
 		}
3762
3783
 
3763
3784
 		/* PCS link status */
..
..
@@ -3811,14 +3832,12 @@
3811
3832
 			return -EINVAL;
3812
3833
 		ret = phy_mii_ioctl(dev->phydev, rq, cmd);
3813
3834
 		break;
3814
-#ifdef CONFIG_STMMAC_PTP
3815
3835
 	case SIOCSHWTSTAMP:
3816
3836
 		ret = stmmac_hwtstamp_set(dev, rq);
3817
3837
 		break;
3818
3838
 	case SIOCGHWTSTAMP:
3819
3839
 		ret = stmmac_hwtstamp_get(dev, rq);
3820
3840
 		break;
3821
-#endif
3822
3841
 	default:
3823
3842
 		break;
3824
3843
 	}
..
..
@@ -4565,13 +4584,10 @@
4565
4584
 		stmmac_pmt(priv, priv->hw, priv->wolopts);
4566
4585
 		priv->irq_wake = 1;
4567
4586
 	} else {
4568
-		if (priv->plat->integrated_phy_power)
4569
-			priv->plat->integrated_phy_power(priv->plat->bsp_priv,
4570
-							 false);
4571
4587
 		stmmac_mac_set(priv, priv->ioaddr, false);
4572
4588
 		pinctrl_pm_select_sleep_state(priv->device);
4573
4589
 		/* Disable clock in case of PWM is off */
4574
-		if (priv->plat->clk_ptp_ref && IS_ENABLED(CONFIG_STMMAC_PTP))
4590
+		if (priv->plat->clk_ptp_ref)
4575
4591
 			clk_disable_unprepare(priv->plat->clk_ptp_ref);
4576
4592
 		clk_disable_unprepare(priv->plat->pclk);
4577
4593
 		clk_disable_unprepare(priv->plat->stmmac_clk);
..
..
@@ -4608,8 +4624,6 @@
4608
4624
 		tx_q->cur_tx = 0;
4609
4625
 		tx_q->dirty_tx = 0;
4610
4626
 		tx_q->mss = 0;
4611
-
4612
-		netdev_tx_reset_queue(netdev_get_tx_queue(priv->dev, queue));
4613
4627
 	}
4614
4628
 }
4615
4629
 
..
..
@@ -4627,6 +4641,7 @@
4627
4641
 	if (!netif_running(ndev))
4628
4642
 		return 0;
4629
4643
 
4644
+	printk("troy test %s start .... \n",__func__);
4630
4645
 	/* Power Down bit, into the PM register, is cleared
4631
4646
 	 * automatically as soon as a magic packet or a Wake-up frame
4632
4647
 	 * is received. Anyway, it's better to manually clear
..
..
@@ -4643,14 +4658,11 @@
4643
4658
 		/* enable the clk previously disabled */
4644
4659
 		clk_prepare_enable(priv->plat->stmmac_clk);
4645
4660
 		clk_prepare_enable(priv->plat->pclk);
4646
-		if (priv->plat->clk_ptp_ref && IS_ENABLED(CONFIG_STMMAC_PTP))
4661
+		if (priv->plat->clk_ptp_ref)
4647
4662
 			clk_prepare_enable(priv->plat->clk_ptp_ref);
4648
4663
 		/* reset the phy so that it's ready */
4649
4664
 		if (priv->mii)
4650
4665
 			stmmac_mdio_reset(priv->mii);
4651
-		if (priv->plat->integrated_phy_power)
4652
-			priv->plat->integrated_phy_power(priv->plat->bsp_priv,
4653
-							 true);
4654
4666
 	}
4655
4667
 
4656
4668
 	mutex_lock(&priv->lock);
..
..
@@ -4672,6 +4684,8 @@
4672
4684
 
4673
4685
 	if (ndev->phydev)
4674
4686
 		phy_start(ndev->phydev);
4687
+	printk("troy test %s end .... \n",__func__);
4688
+	rtl8211F_led_control(ndev->phydev);
4675
4689
 
4676
4690
 	return 0;
4677
4691
 }