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86 | 86 | #define LPI_CTRL_STATUS_TLPIEN 0x00000001 /* Transmit LPI Entry */ |
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87 | 87 | |
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88 | 88 | /* GMAC HW ADDR regs */ |
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89 | | -#define GMAC_ADDR_HIGH(reg) ((reg > 15) ? 0x00000800 + (reg - 16) * 8 : \ |
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90 | | - 0x00000040 + (reg * 8)) |
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91 | | -#define GMAC_ADDR_LOW(reg) ((reg > 15) ? 0x00000804 + (reg - 16) * 8 : \ |
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92 | | - 0x00000044 + (reg * 8)) |
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| 89 | +#define GMAC_ADDR_HIGH(reg) (((reg > 15) ? 0x00000800 : 0x00000040) + \ |
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| 90 | + (reg * 8)) |
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| 91 | +#define GMAC_ADDR_LOW(reg) (((reg > 15) ? 0x00000804 : 0x00000044) + \ |
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| 92 | + (reg * 8)) |
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93 | 93 | #define GMAC_MAX_PERFECT_ADDRESSES 1 |
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94 | 94 | |
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95 | 95 | #define GMAC_PCS_BASE 0x000000c0 /* PCS register base */ |
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