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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/sound/soc/samsung/s3c2412-i2s.c
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..
@@ -1,20 +1,14 @@
1
-/* sound/soc/samsung/s3c2412-i2s.c
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- *
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- * ALSA Soc Audio Layer - S3C2412 I2S driver
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- *
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- * Copyright (c) 2006 Wolfson Microelectronics PLC.
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- *	Graeme Gregory graeme.gregory@wolfsonmicro.com
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- *	linux@wolfsonmicro.com
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- *
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- * Copyright (c) 2007, 2004-2005 Simtec Electronics
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- *	http://armlinux.simtec.co.uk/
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- *	Ben Dooks <ben@simtec.co.uk>
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- *
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- * This program is free software; you can redistribute  it and/or modify it
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- * under  the terms of  the GNU General  Public License as published by the
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- * Free Software Foundation;  either version 2 of the  License, or (at your
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- * option) any later version.
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- */
1
+// SPDX-License-Identifier: GPL-2.0+
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+//
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+// ALSA Soc Audio Layer - S3C2412 I2S driver
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+//
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+// Copyright (c) 2006 Wolfson Microelectronics PLC.
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+//	Graeme Gregory graeme.gregory@wolfsonmicro.com
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+//	linux@wolfsonmicro.com
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+//
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+// Copyright (c) 2007, 2004-2005 Simtec Electronics
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+//	http://armlinux.simtec.co.uk/
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+//	Ben Dooks <ben@simtec.co.uk>
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12
 
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 #include <linux/delay.h>
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14
 #include <linux/gpio.h>
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..
@@ -24,9 +18,6 @@
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18
 
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 #include <sound/soc.h>
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20
 #include <sound/pcm_params.h>
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-
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-#include <mach/gpio-samsung.h>
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-#include <plat/gpio-cfg.h>
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21
 
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 #include "dma.h"
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 #include "regs-i2s-v2.h"
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@@ -55,7 +46,7 @@
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 	snd_soc_dai_init_dma_data(dai, &s3c2412_i2s_pcm_stereo_out,
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 					&s3c2412_i2s_pcm_stereo_in);
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48
 
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-	ret = s3c_i2sv2_probe(dai, &s3c2412_i2s, S3C2410_PA_IIS);
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+	ret = s3c_i2sv2_probe(dai, &s3c2412_i2s);
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 	if (ret)
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 		return ret;
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52
 
..
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@@ -75,10 +66,6 @@
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 	ret = clk_prepare_enable(s3c2412_i2s.iis_cclk);
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 	if (ret)
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 		goto err;
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-
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-	/* Configure the I2S pins (GPE0...GPE4) in correct mode */
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-	s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2),
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-			      S3C_GPIO_PULL_NONE);
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69
 
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 	return 0;
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71
 
..
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@@ -123,6 +110,60 @@
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 	return 0;
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 }
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112
 
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+#ifdef CONFIG_PM
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+static int s3c2412_i2s_suspend(struct snd_soc_component *component)
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+{
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+	struct s3c_i2sv2_info *i2s = snd_soc_component_get_drvdata(component);
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+	u32 iismod;
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+
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+	if (component->active) {
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+		i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD);
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+		i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON);
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+		i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR);
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+
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+		/* some basic suspend checks */
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+
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+		iismod = readl(i2s->regs + S3C2412_IISMOD);
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+
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+		if (iismod & S3C2412_IISCON_RXDMA_ACTIVE)
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+			pr_warn("%s: RXDMA active?\n", __func__);
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+
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+		if (iismod & S3C2412_IISCON_TXDMA_ACTIVE)
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+			pr_warn("%s: TXDMA active?\n", __func__);
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+
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+		if (iismod & S3C2412_IISCON_IIS_ACTIVE)
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+			pr_warn("%s: IIS active\n", __func__);
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+	}
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+
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+	return 0;
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+}
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+
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+static int s3c2412_i2s_resume(struct snd_soc_component *component)
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+{
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+	struct s3c_i2sv2_info *i2s = snd_soc_component_get_drvdata(component);
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+
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+	pr_info("component_active %d, IISMOD %08x, IISCON %08x\n",
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+		component->active, i2s->suspend_iismod, i2s->suspend_iiscon);
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+
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+	if (component->active) {
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+		writel(i2s->suspend_iiscon, i2s->regs + S3C2412_IISCON);
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+		writel(i2s->suspend_iismod, i2s->regs + S3C2412_IISMOD);
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+		writel(i2s->suspend_iispsr, i2s->regs + S3C2412_IISPSR);
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+
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+		writel(S3C2412_IISFIC_RXFLUSH | S3C2412_IISFIC_TXFLUSH,
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+		       i2s->regs + S3C2412_IISFIC);
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+
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+		ndelay(250);
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+		writel(0x0, i2s->regs + S3C2412_IISFIC);
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+	}
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+
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+	return 0;
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+}
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+#else
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+#define s3c2412_i2s_suspend NULL
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+#define s3c2412_i2s_resume  NULL
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+#endif
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+
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 #define S3C2412_I2S_RATES \
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 	(SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
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 	SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
..
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@@ -152,6 +193,8 @@
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193
 
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 static const struct snd_soc_component_driver s3c2412_i2s_component = {
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 	.name		= "s3c2412-i2s",
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+	.suspend	= s3c2412_i2s_suspend,
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+	.resume		= s3c2412_i2s_resume,
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 };
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199
 
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 static int s3c2412_iis_dev_probe(struct platform_device *pdev)
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@@ -177,7 +220,7 @@
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220
 
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 	ret = samsung_asoc_dma_platform_register(&pdev->dev,
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 						 pdata->dma_filter,
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-						 NULL, NULL);
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+						 "tx", "rx", NULL);
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 	if (ret) {
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 		pr_err("failed to register the DMA: %d\n", ret);
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 		return ret;