add stmac read mac form eeprom

hc

2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/sound/soc/qcom/qdsp6/q6afe-dai.c
..
..
@@ -55,6 +55,48 @@
55
55
 		.remove = msm_dai_q6_dai_remove,			\
56
56
 	}
57
57
 
58
+#define Q6AFE_CDC_DMA_RX_DAI(did) {				\
59
+		.playback = {						\
60
+			.stream_name = #did" Playback",	\
61
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
62
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
63
+				SNDRV_PCM_RATE_176400,			\
64
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |		\
65
+				   SNDRV_PCM_FMTBIT_S24_LE |		\
66
+				   SNDRV_PCM_FMTBIT_S32_LE,		\
67
+			.channels_min = 1,				\
68
+			.channels_max = 8,				\
69
+			.rate_min = 8000,				\
70
+			.rate_max = 176400,				\
71
+		},							\
72
+		.name = #did,						\
73
+		.ops = &q6dma_ops,					\
74
+		.id = did,						\
75
+		.probe = msm_dai_q6_dai_probe,				\
76
+		.remove = msm_dai_q6_dai_remove,			\
77
+	}
78
+
79
+#define Q6AFE_CDC_DMA_TX_DAI(did) {				\
80
+		.capture = {						\
81
+			.stream_name = #did" Capture",		\
82
+			.rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
83
+				SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
84
+				SNDRV_PCM_RATE_176400,			\
85
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |		\
86
+				   SNDRV_PCM_FMTBIT_S24_LE |		\
87
+				   SNDRV_PCM_FMTBIT_S32_LE,		\
88
+			.channels_min = 1,				\
89
+			.channels_max = 8,				\
90
+			.rate_min = 8000,				\
91
+			.rate_max = 176400,				\
92
+		},							\
93
+		.name = #did,						\
94
+		.ops = &q6dma_ops,					\
95
+		.id = did,						\
96
+		.probe = msm_dai_q6_dai_probe,				\
97
+		.remove = msm_dai_q6_dai_remove,			\
98
+	}
99
+
58
100
 struct q6afe_dai_priv_data {
59
101
 	uint32_t sd_line_mask;
60
102
 	uint32_t sync_mode;
..
..
@@ -307,6 +349,90 @@
307
349
 
308
350
 	return 0;
309
351
 }
352
+
353
+static int q6dma_set_channel_map(struct snd_soc_dai *dai,
354
+				 unsigned int tx_num, unsigned int *tx_ch_mask,
355
+				 unsigned int rx_num, unsigned int *rx_ch_mask)
356
+{
357
+
358
+	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
359
+	struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
360
+	int ch_mask;
361
+	int rc = 0;
362
+
363
+	switch (dai->id) {
364
+	case WSA_CODEC_DMA_TX_0:
365
+	case WSA_CODEC_DMA_TX_1:
366
+	case WSA_CODEC_DMA_TX_2:
367
+	case VA_CODEC_DMA_TX_0:
368
+	case VA_CODEC_DMA_TX_1:
369
+	case VA_CODEC_DMA_TX_2:
370
+	case TX_CODEC_DMA_TX_0:
371
+	case TX_CODEC_DMA_TX_1:
372
+	case TX_CODEC_DMA_TX_2:
373
+	case TX_CODEC_DMA_TX_3:
374
+	case TX_CODEC_DMA_TX_4:
375
+	case TX_CODEC_DMA_TX_5:
376
+		if (!tx_ch_mask) {
377
+			dev_err(dai->dev, "tx slot not found\n");
378
+			return -EINVAL;
379
+		}
380
+
381
+		if (tx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
382
+			dev_err(dai->dev, "invalid tx num %d\n",
383
+				tx_num);
384
+			return -EINVAL;
385
+		}
386
+		ch_mask = *tx_ch_mask;
387
+
388
+		break;
389
+	case WSA_CODEC_DMA_RX_0:
390
+	case WSA_CODEC_DMA_RX_1:
391
+	case RX_CODEC_DMA_RX_0:
392
+	case RX_CODEC_DMA_RX_1:
393
+	case RX_CODEC_DMA_RX_2:
394
+	case RX_CODEC_DMA_RX_3:
395
+	case RX_CODEC_DMA_RX_4:
396
+	case RX_CODEC_DMA_RX_5:
397
+	case RX_CODEC_DMA_RX_6:
398
+	case RX_CODEC_DMA_RX_7:
399
+		/* rx */
400
+		if (!rx_ch_mask) {
401
+			dev_err(dai->dev, "rx slot not found\n");
402
+			return -EINVAL;
403
+		}
404
+		if (rx_num > AFE_PORT_MAX_AUDIO_CHAN_CNT) {
405
+			dev_err(dai->dev, "invalid rx num %d\n",
406
+				rx_num);
407
+			return -EINVAL;
408
+		}
409
+		ch_mask = *rx_ch_mask;
410
+
411
+		break;
412
+	default:
413
+		dev_err(dai->dev, "%s: invalid dai id 0x%x\n",
414
+			__func__, dai->id);
415
+		return -EINVAL;
416
+	}
417
+
418
+	cfg->active_channels_mask = ch_mask;
419
+
420
+	return rc;
421
+}
422
+
423
+static int q6dma_hw_params(struct snd_pcm_substream *substream,
424
+			   struct snd_pcm_hw_params *params,
425
+			   struct snd_soc_dai *dai)
426
+{
427
+	struct q6afe_dai_data *dai_data = dev_get_drvdata(dai->dev);
428
+	struct q6afe_cdc_dma_cfg *cfg = &dai_data->port_config[dai->id].dma_cfg;
429
+
430
+	cfg->bit_width = params_width(params);
431
+	cfg->sample_rate = params_rate(params);
432
+	cfg->num_channels = params_channels(params);
433
+
434
+	return 0;
435
+}
310
436
 static void q6afe_dai_shutdown(struct snd_pcm_substream *substream,
311
437
 				struct snd_soc_dai *dai)
312
438
 {
..
..
@@ -341,6 +467,7 @@
341
467
 
342
468
 	switch (dai->id) {
343
469
 	case HDMI_RX:
470
+	case DISPLAY_PORT_RX:
344
471
 		q6afe_hdmi_port_prepare(dai_data->port[dai->id],
345
472
 					&dai_data->port_config[dai->id].hdmi);
346
473
 		break;
..
..
@@ -360,6 +487,10 @@
360
487
 	case PRIMARY_TDM_RX_0 ... QUINARY_TDM_TX_7:
361
488
 		q6afe_tdm_port_prepare(dai_data->port[dai->id],
362
489
 					&dai_data->port_config[dai->id].tdm);
490
+		break;
491
+	case WSA_CODEC_DMA_RX_0 ... RX_CODEC_DMA_RX_7:
492
+		q6afe_cdc_dma_port_prepare(dai_data->port[dai->id],
493
+					   &dai_data->port_config[dai->id].dma_cfg);
363
494
 		break;
364
495
 	default:
365
496
 		return -EINVAL;
..
..
@@ -429,6 +560,7 @@
429
560
 					     freq, dir);
430
561
 	case Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT ... Q6AFE_LPASS_CLK_ID_QUI_MI2S_OSR:
431
562
 	case Q6AFE_LPASS_CLK_ID_MCLK_1 ... Q6AFE_LPASS_CLK_ID_INT_MCLK_1:
563
+	case Q6AFE_LPASS_CLK_ID_WSA_CORE_MCLK ... Q6AFE_LPASS_CLK_ID_VA_CORE_2X_MCLK:
432
564
 		return q6afe_port_set_sysclk(port, clk_id,
433
565
 					     Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
434
566
 					     Q6AFE_LPASS_CLK_ROOT_DEFAULT,
..
..
@@ -445,6 +577,8 @@
445
577
 
446
578
 static const struct snd_soc_dapm_route q6afe_dapm_routes[] = {
447
579
 	{"HDMI Playback", NULL, "HDMI_RX"},
580
+	{"Display Port Playback", NULL, "DISPLAY_PORT_RX"},
581
+	{"Slimbus Playback", NULL, "SLIMBUS_0_RX"},
448
582
 	{"Slimbus1 Playback", NULL, "SLIMBUS_1_RX"},
449
583
 	{"Slimbus2 Playback", NULL, "SLIMBUS_2_RX"},
450
584
 	{"Slimbus3 Playback", NULL, "SLIMBUS_3_RX"},
..
..
@@ -559,15 +693,38 @@
559
693
 	{"PRI_MI2S_TX", NULL, "Primary MI2S Capture"},
560
694
 	{"SEC_MI2S_TX", NULL, "Secondary MI2S Capture"},
561
695
 	{"QUAT_MI2S_TX", NULL, "Quaternary MI2S Capture"},
696
+
697
+	{"WSA_CODEC_DMA_RX_0 Playback", NULL, "WSA_CODEC_DMA_RX_0"},
698
+	{"WSA_CODEC_DMA_TX_0", NULL, "WSA_CODEC_DMA_TX_0 Capture"},
699
+	{"WSA_CODEC_DMA_RX_1 Playback", NULL, "WSA_CODEC_DMA_RX_1"},
700
+	{"WSA_CODEC_DMA_TX_1", NULL, "WSA_CODEC_DMA_TX_1 Capture"},
701
+	{"WSA_CODEC_DMA_TX_2", NULL, "WSA_CODEC_DMA_TX_2 Capture"},
702
+	{"VA_CODEC_DMA_TX_0", NULL, "VA_CODEC_DMA_TX_0 Capture"},
703
+	{"VA_CODEC_DMA_TX_1", NULL, "VA_CODEC_DMA_TX_1 Capture"},
704
+	{"VA_CODEC_DMA_TX_2", NULL, "VA_CODEC_DMA_TX_2 Capture"},
705
+	{"RX_CODEC_DMA_RX_0 Playback", NULL, "RX_CODEC_DMA_RX_0"},
706
+	{"TX_CODEC_DMA_TX_0", NULL, "TX_CODEC_DMA_TX_0 Capture"},
707
+	{"RX_CODEC_DMA_RX_1 Playback", NULL, "RX_CODEC_DMA_RX_1"},
708
+	{"TX_CODEC_DMA_TX_1", NULL, "TX_CODEC_DMA_TX_1 Capture"},
709
+	{"RX_CODEC_DMA_RX_2 Playback", NULL, "RX_CODEC_DMA_RX_2"},
710
+	{"TX_CODEC_DMA_TX_2", NULL, "TX_CODEC_DMA_TX_2 Capture"},
711
+	{"RX_CODEC_DMA_RX_3 Playback", NULL, "RX_CODEC_DMA_RX_3"},
712
+	{"TX_CODEC_DMA_TX_3", NULL, "TX_CODEC_DMA_TX_3 Capture"},
713
+	{"RX_CODEC_DMA_RX_4 Playback", NULL, "RX_CODEC_DMA_RX_4"},
714
+	{"TX_CODEC_DMA_TX_4", NULL, "TX_CODEC_DMA_TX_4 Capture"},
715
+	{"RX_CODEC_DMA_RX_5 Playback", NULL, "RX_CODEC_DMA_RX_5"},
716
+	{"TX_CODEC_DMA_TX_5", NULL, "TX_CODEC_DMA_TX_5 Capture"},
717
+	{"RX_CODEC_DMA_RX_6 Playback", NULL, "RX_CODEC_DMA_RX_6"},
718
+	{"RX_CODEC_DMA_RX_7 Playback", NULL, "RX_CODEC_DMA_RX_7"},
562
719
 };
563
720
 
564
-static struct snd_soc_dai_ops q6hdmi_ops = {
721
+static const struct snd_soc_dai_ops q6hdmi_ops = {
565
722
 	.prepare	= q6afe_dai_prepare,
566
723
 	.hw_params	= q6hdmi_hw_params,
567
724
 	.shutdown	= q6afe_dai_shutdown,
568
725
 };
569
726
 
570
-static struct snd_soc_dai_ops q6i2s_ops = {
727
+static const struct snd_soc_dai_ops q6i2s_ops = {
571
728
 	.prepare	= q6afe_dai_prepare,
572
729
 	.hw_params	= q6i2s_hw_params,
573
730
 	.set_fmt	= q6i2s_set_fmt,
..
..
@@ -575,20 +732,28 @@
575
732
 	.set_sysclk	= q6afe_mi2s_set_sysclk,
576
733
 };
577
734
 
578
-static struct snd_soc_dai_ops q6slim_ops = {
735
+static const struct snd_soc_dai_ops q6slim_ops = {
579
736
 	.prepare	= q6afe_dai_prepare,
580
737
 	.hw_params	= q6slim_hw_params,
581
738
 	.shutdown	= q6afe_dai_shutdown,
582
739
 	.set_channel_map = q6slim_set_channel_map,
583
740
 };
584
741
 
585
-static struct snd_soc_dai_ops q6tdm_ops = {
742
+static const struct snd_soc_dai_ops q6tdm_ops = {
586
743
 	.prepare	= q6afe_dai_prepare,
587
744
 	.shutdown	= q6afe_dai_shutdown,
588
745
 	.set_sysclk	= q6afe_mi2s_set_sysclk,
589
746
 	.set_tdm_slot     = q6tdm_set_tdm_slot,
590
747
 	.set_channel_map  = q6tdm_set_channel_map,
591
748
 	.hw_params        = q6tdm_hw_params,
749
+};
750
+
751
+static const struct snd_soc_dai_ops q6dma_ops = {
752
+	.prepare	= q6afe_dai_prepare,
753
+	.shutdown	= q6afe_dai_shutdown,
754
+	.set_sysclk	= q6afe_mi2s_set_sysclk,
755
+	.set_channel_map  = q6dma_set_channel_map,
756
+	.hw_params        = q6dma_hw_params,
592
757
 };
593
758
 
594
759
 static int msm_dai_q6_dai_probe(struct snd_soc_dai *dai)
..
..
@@ -1106,6 +1271,47 @@
1106
1271
 	Q6AFE_TDM_CAP_DAI("Quinary", 5, QUINARY_TDM_TX_5),
1107
1272
 	Q6AFE_TDM_CAP_DAI("Quinary", 6, QUINARY_TDM_TX_6),
1108
1273
 	Q6AFE_TDM_CAP_DAI("Quinary", 7, QUINARY_TDM_TX_7),
1274
+	{
1275
+		.playback = {
1276
+			.stream_name = "Display Port Playback",
1277
+			.rates = SNDRV_PCM_RATE_48000 |
1278
+				 SNDRV_PCM_RATE_96000 |
1279
+				 SNDRV_PCM_RATE_192000,
1280
+			.formats = SNDRV_PCM_FMTBIT_S16_LE |
1281
+				   SNDRV_PCM_FMTBIT_S24_LE,
1282
+			.channels_min = 2,
1283
+			.channels_max = 8,
1284
+			.rate_max =     192000,
1285
+			.rate_min =	48000,
1286
+		},
1287
+		.ops = &q6hdmi_ops,
1288
+		.id = DISPLAY_PORT_RX,
1289
+		.name = "DISPLAY_PORT",
1290
+		.probe = msm_dai_q6_dai_probe,
1291
+		.remove = msm_dai_q6_dai_remove,
1292
+	},
1293
+	Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_0),
1294
+	Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_0),
1295
+	Q6AFE_CDC_DMA_RX_DAI(WSA_CODEC_DMA_RX_1),
1296
+	Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_1),
1297
+	Q6AFE_CDC_DMA_TX_DAI(WSA_CODEC_DMA_TX_2),
1298
+	Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_0),
1299
+	Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_1),
1300
+	Q6AFE_CDC_DMA_TX_DAI(VA_CODEC_DMA_TX_2),
1301
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_0),
1302
+	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_0),
1303
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_1),
1304
+	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_1),
1305
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_2),
1306
+	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_2),
1307
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_3),
1308
+	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_3),
1309
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_4),
1310
+	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_4),
1311
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_5),
1312
+	Q6AFE_CDC_DMA_TX_DAI(TX_CODEC_DMA_TX_5),
1313
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_6),
1314
+	Q6AFE_CDC_DMA_RX_DAI(RX_CODEC_DMA_RX_7),
1109
1315
 };
1110
1316
 
1111
1317
 static int q6afe_of_xlate_dai_name(struct snd_soc_component *component,
..
..
@@ -1128,205 +1334,251 @@
1128
1334
 }
1129
1335
 
1130
1336
 static const struct snd_soc_dapm_widget q6afe_dai_widgets[] = {
1131
-	SND_SOC_DAPM_AIF_IN("HDMI_RX", NULL, 0, 0, 0, 0),
1132
-	SND_SOC_DAPM_AIF_IN("SLIMBUS_0_RX", NULL, 0, 0, 0, 0),
1133
-	SND_SOC_DAPM_AIF_IN("SLIMBUS_1_RX", NULL, 0, 0, 0, 0),
1134
-	SND_SOC_DAPM_AIF_IN("SLIMBUS_2_RX", NULL, 0, 0, 0, 0),
1135
-	SND_SOC_DAPM_AIF_IN("SLIMBUS_3_RX", NULL, 0, 0, 0, 0),
1136
-	SND_SOC_DAPM_AIF_IN("SLIMBUS_4_RX", NULL, 0, 0, 0, 0),
1137
-	SND_SOC_DAPM_AIF_IN("SLIMBUS_5_RX", NULL, 0, 0, 0, 0),
1138
-	SND_SOC_DAPM_AIF_IN("SLIMBUS_6_RX", NULL, 0, 0, 0, 0),
1139
-	SND_SOC_DAPM_AIF_OUT("SLIMBUS_0_TX", NULL, 0, 0, 0, 0),
1140
-	SND_SOC_DAPM_AIF_OUT("SLIMBUS_1_TX", NULL, 0, 0, 0, 0),
1141
-	SND_SOC_DAPM_AIF_OUT("SLIMBUS_2_TX", NULL, 0, 0, 0, 0),
1142
-	SND_SOC_DAPM_AIF_OUT("SLIMBUS_3_TX", NULL, 0, 0, 0, 0),
1143
-	SND_SOC_DAPM_AIF_OUT("SLIMBUS_4_TX", NULL, 0, 0, 0, 0),
1144
-	SND_SOC_DAPM_AIF_OUT("SLIMBUS_5_TX", NULL, 0, 0, 0, 0),
1145
-	SND_SOC_DAPM_AIF_OUT("SLIMBUS_6_TX", NULL, 0, 0, 0, 0),
1337
+	SND_SOC_DAPM_AIF_IN("HDMI_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1338
+	SND_SOC_DAPM_AIF_IN("SLIMBUS_0_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1339
+	SND_SOC_DAPM_AIF_IN("SLIMBUS_1_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1340
+	SND_SOC_DAPM_AIF_IN("SLIMBUS_2_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1341
+	SND_SOC_DAPM_AIF_IN("SLIMBUS_3_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1342
+	SND_SOC_DAPM_AIF_IN("SLIMBUS_4_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1343
+	SND_SOC_DAPM_AIF_IN("SLIMBUS_5_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1344
+	SND_SOC_DAPM_AIF_IN("SLIMBUS_6_RX", NULL, 0, SND_SOC_NOPM, 0, 0),
1345
+	SND_SOC_DAPM_AIF_OUT("SLIMBUS_0_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1346
+	SND_SOC_DAPM_AIF_OUT("SLIMBUS_1_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1347
+	SND_SOC_DAPM_AIF_OUT("SLIMBUS_2_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1348
+	SND_SOC_DAPM_AIF_OUT("SLIMBUS_3_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1349
+	SND_SOC_DAPM_AIF_OUT("SLIMBUS_4_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1350
+	SND_SOC_DAPM_AIF_OUT("SLIMBUS_5_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1351
+	SND_SOC_DAPM_AIF_OUT("SLIMBUS_6_TX", NULL, 0, SND_SOC_NOPM, 0, 0),
1146
1352
 	SND_SOC_DAPM_AIF_IN("QUAT_MI2S_RX", NULL,
1147
-						0, 0, 0, 0),
1353
+						0, SND_SOC_NOPM, 0, 0),
1148
1354
 	SND_SOC_DAPM_AIF_OUT("QUAT_MI2S_TX", NULL,
1149
-						0, 0, 0, 0),
1355
+						0, SND_SOC_NOPM, 0, 0),
1150
1356
 	SND_SOC_DAPM_AIF_IN("TERT_MI2S_RX", NULL,
1151
-						0, 0, 0, 0),
1357
+						0, SND_SOC_NOPM, 0, 0),
1152
1358
 	SND_SOC_DAPM_AIF_OUT("TERT_MI2S_TX", NULL,
1153
-						0, 0, 0, 0),
1359
+						0, SND_SOC_NOPM, 0, 0),
1154
1360
 	SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX", NULL,
1155
-			     0, 0, 0, 0),
1361
+			     0, SND_SOC_NOPM, 0, 0),
1156
1362
 	SND_SOC_DAPM_AIF_OUT("SEC_MI2S_TX", NULL,
1157
-						0, 0, 0, 0),
1363
+						0, SND_SOC_NOPM, 0, 0),
1158
1364
 	SND_SOC_DAPM_AIF_IN("SEC_MI2S_RX_SD1",
1159
1365
 			"Secondary MI2S Playback SD1",
1160
-			0, 0, 0, 0),
1366
+			0, SND_SOC_NOPM, 0, 0),
1161
1367
 	SND_SOC_DAPM_AIF_IN("PRI_MI2S_RX", NULL,
1162
-			     0, 0, 0, 0),
1368
+			     0, SND_SOC_NOPM, 0, 0),
1163
1369
 	SND_SOC_DAPM_AIF_OUT("PRI_MI2S_TX", NULL,
1164
-						0, 0, 0, 0),
1370
+						0, SND_SOC_NOPM, 0, 0),
1165
1371
 
1166
1372
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_0", NULL,
1167
-			     0, 0, 0, 0),
1373
+			     0, SND_SOC_NOPM, 0, 0),
1168
1374
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_1", NULL,
1169
-			     0, 0, 0, 0),
1375
+			     0, SND_SOC_NOPM, 0, 0),
1170
1376
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_2", NULL,
1171
-			     0, 0, 0, 0),
1377
+			     0, SND_SOC_NOPM, 0, 0),
1172
1378
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_3", NULL,
1173
-			     0, 0, 0, 0),
1379
+			     0, SND_SOC_NOPM, 0, 0),
1174
1380
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_4", NULL,
1175
-			     0, 0, 0, 0),
1381
+			     0, SND_SOC_NOPM, 0, 0),
1176
1382
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_5", NULL,
1177
-			     0, 0, 0, 0),
1383
+			     0, SND_SOC_NOPM, 0, 0),
1178
1384
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_6", NULL,
1179
-			     0, 0, 0, 0),
1385
+			     0, SND_SOC_NOPM, 0, 0),
1180
1386
 	SND_SOC_DAPM_AIF_IN("PRIMARY_TDM_RX_7", NULL,
1181
-			     0, 0, 0, 0),
1387
+			     0, SND_SOC_NOPM, 0, 0),
1182
1388
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_0", NULL,
1183
-						0, 0, 0, 0),
1389
+						0, SND_SOC_NOPM, 0, 0),
1184
1390
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_1", NULL,
1185
-						0, 0, 0, 0),
1391
+						0, SND_SOC_NOPM, 0, 0),
1186
1392
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_2", NULL,
1187
-						0, 0, 0, 0),
1393
+						0, SND_SOC_NOPM, 0, 0),
1188
1394
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_3", NULL,
1189
-						0, 0, 0, 0),
1395
+						0, SND_SOC_NOPM, 0, 0),
1190
1396
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_4", NULL,
1191
-						0, 0, 0, 0),
1397
+						0, SND_SOC_NOPM, 0, 0),
1192
1398
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_5", NULL,
1193
-						0, 0, 0, 0),
1399
+						0, SND_SOC_NOPM, 0, 0),
1194
1400
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_6", NULL,
1195
-						0, 0, 0, 0),
1401
+						0, SND_SOC_NOPM, 0, 0),
1196
1402
 	SND_SOC_DAPM_AIF_OUT("PRIMARY_TDM_TX_7", NULL,
1197
-						0, 0, 0, 0),
1403
+						0, SND_SOC_NOPM, 0, 0),
1198
1404
 
1199
1405
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_0", NULL,
1200
-			     0, 0, 0, 0),
1406
+			     0, SND_SOC_NOPM, 0, 0),
1201
1407
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_1", NULL,
1202
-			     0, 0, 0, 0),
1408
+			     0, SND_SOC_NOPM, 0, 0),
1203
1409
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_2", NULL,
1204
-			     0, 0, 0, 0),
1410
+			     0, SND_SOC_NOPM, 0, 0),
1205
1411
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_3", NULL,
1206
-			     0, 0, 0, 0),
1412
+			     0, SND_SOC_NOPM, 0, 0),
1207
1413
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_4", NULL,
1208
-			     0, 0, 0, 0),
1414
+			     0, SND_SOC_NOPM, 0, 0),
1209
1415
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_5", NULL,
1210
-			     0, 0, 0, 0),
1416
+			     0, SND_SOC_NOPM, 0, 0),
1211
1417
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_6", NULL,
1212
-			     0, 0, 0, 0),
1418
+			     0, SND_SOC_NOPM, 0, 0),
1213
1419
 	SND_SOC_DAPM_AIF_IN("SEC_TDM_RX_7", NULL,
1214
-			     0, 0, 0, 0),
1420
+			     0, SND_SOC_NOPM, 0, 0),
1215
1421
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_0", NULL,
1216
-						0, 0, 0, 0),
1422
+						0, SND_SOC_NOPM, 0, 0),
1217
1423
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_1", NULL,
1218
-						0, 0, 0, 0),
1424
+						0, SND_SOC_NOPM, 0, 0),
1219
1425
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_2", NULL,
1220
-						0, 0, 0, 0),
1426
+						0, SND_SOC_NOPM, 0, 0),
1221
1427
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_3", NULL,
1222
-						0, 0, 0, 0),
1428
+						0, SND_SOC_NOPM, 0, 0),
1223
1429
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_4", NULL,
1224
-						0, 0, 0, 0),
1430
+						0, SND_SOC_NOPM, 0, 0),
1225
1431
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_5", NULL,
1226
-						0, 0, 0, 0),
1432
+						0, SND_SOC_NOPM, 0, 0),
1227
1433
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_6", NULL,
1228
-						0, 0, 0, 0),
1434
+						0, SND_SOC_NOPM, 0, 0),
1229
1435
 	SND_SOC_DAPM_AIF_OUT("SEC_TDM_TX_7", NULL,
1230
-						0, 0, 0, 0),
1436
+						0, SND_SOC_NOPM, 0, 0),
1231
1437
 
1232
1438
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_0", NULL,
1233
-			     0, 0, 0, 0),
1439
+			     0, SND_SOC_NOPM, 0, 0),
1234
1440
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_1", NULL,
1235
-			     0, 0, 0, 0),
1441
+			     0, SND_SOC_NOPM, 0, 0),
1236
1442
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_2", NULL,
1237
-			     0, 0, 0, 0),
1443
+			     0, SND_SOC_NOPM, 0, 0),
1238
1444
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_3", NULL,
1239
-			     0, 0, 0, 0),
1445
+			     0, SND_SOC_NOPM, 0, 0),
1240
1446
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_4", NULL,
1241
-			     0, 0, 0, 0),
1447
+			     0, SND_SOC_NOPM, 0, 0),
1242
1448
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_5", NULL,
1243
-			     0, 0, 0, 0),
1449
+			     0, SND_SOC_NOPM, 0, 0),
1244
1450
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_6", NULL,
1245
-			     0, 0, 0, 0),
1451
+			     0, SND_SOC_NOPM, 0, 0),
1246
1452
 	SND_SOC_DAPM_AIF_IN("TERT_TDM_RX_7", NULL,
1247
-			     0, 0, 0, 0),
1453
+			     0, SND_SOC_NOPM, 0, 0),
1248
1454
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_0", NULL,
1249
-						0, 0, 0, 0),
1455
+						0, SND_SOC_NOPM, 0, 0),
1250
1456
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_1", NULL,
1251
-						0, 0, 0, 0),
1457
+						0, SND_SOC_NOPM, 0, 0),
1252
1458
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_2", NULL,
1253
-						0, 0, 0, 0),
1459
+						0, SND_SOC_NOPM, 0, 0),
1254
1460
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_3", NULL,
1255
-						0, 0, 0, 0),
1461
+						0, SND_SOC_NOPM, 0, 0),
1256
1462
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_4", NULL,
1257
-						0, 0, 0, 0),
1463
+						0, SND_SOC_NOPM, 0, 0),
1258
1464
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_5", NULL,
1259
-						0, 0, 0, 0),
1465
+						0, SND_SOC_NOPM, 0, 0),
1260
1466
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_6", NULL,
1261
-						0, 0, 0, 0),
1467
+						0, SND_SOC_NOPM, 0, 0),
1262
1468
 	SND_SOC_DAPM_AIF_OUT("TERT_TDM_TX_7", NULL,
1263
-						0, 0, 0, 0),
1469
+						0, SND_SOC_NOPM, 0, 0),
1264
1470
 
1265
1471
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_0", NULL,
1266
-			     0, 0, 0, 0),
1472
+			     0, SND_SOC_NOPM, 0, 0),
1267
1473
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_1", NULL,
1268
-			     0, 0, 0, 0),
1474
+			     0, SND_SOC_NOPM, 0, 0),
1269
1475
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_2", NULL,
1270
-			     0, 0, 0, 0),
1476
+			     0, SND_SOC_NOPM, 0, 0),
1271
1477
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_3", NULL,
1272
-			     0, 0, 0, 0),
1478
+			     0, SND_SOC_NOPM, 0, 0),
1273
1479
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_4", NULL,
1274
-			     0, 0, 0, 0),
1480
+			     0, SND_SOC_NOPM, 0, 0),
1275
1481
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_5", NULL,
1276
-			     0, 0, 0, 0),
1482
+			     0, SND_SOC_NOPM, 0, 0),
1277
1483
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_6", NULL,
1278
-			     0, 0, 0, 0),
1484
+			     0, SND_SOC_NOPM, 0, 0),
1279
1485
 	SND_SOC_DAPM_AIF_IN("QUAT_TDM_RX_7", NULL,
1280
-			     0, 0, 0, 0),
1486
+			     0, SND_SOC_NOPM, 0, 0),
1281
1487
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_0", NULL,
1282
-						0, 0, 0, 0),
1488
+						0, SND_SOC_NOPM, 0, 0),
1283
1489
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_1", NULL,
1284
-						0, 0, 0, 0),
1490
+						0, SND_SOC_NOPM, 0, 0),
1285
1491
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_2", NULL,
1286
-						0, 0, 0, 0),
1492
+						0, SND_SOC_NOPM, 0, 0),
1287
1493
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_3", NULL,
1288
-						0, 0, 0, 0),
1494
+						0, SND_SOC_NOPM, 0, 0),
1289
1495
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_4", NULL,
1290
-						0, 0, 0, 0),
1496
+						0, SND_SOC_NOPM, 0, 0),
1291
1497
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_5", NULL,
1292
-						0, 0, 0, 0),
1498
+						0, SND_SOC_NOPM, 0, 0),
1293
1499
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_6", NULL,
1294
-						0, 0, 0, 0),
1500
+						0, SND_SOC_NOPM, 0, 0),
1295
1501
 	SND_SOC_DAPM_AIF_OUT("QUAT_TDM_TX_7", NULL,
1296
-						0, 0, 0, 0),
1502
+						0, SND_SOC_NOPM, 0, 0),
1297
1503
 
1298
1504
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_0", NULL,
1299
-			     0, 0, 0, 0),
1505
+			     0, SND_SOC_NOPM, 0, 0),
1300
1506
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_1", NULL,
1301
-			     0, 0, 0, 0),
1507
+			     0, SND_SOC_NOPM, 0, 0),
1302
1508
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_2", NULL,
1303
-			     0, 0, 0, 0),
1509
+			     0, SND_SOC_NOPM, 0, 0),
1304
1510
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_3", NULL,
1305
-			     0, 0, 0, 0),
1511
+			     0, SND_SOC_NOPM, 0, 0),
1306
1512
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_4", NULL,
1307
-			     0, 0, 0, 0),
1513
+			     0, SND_SOC_NOPM, 0, 0),
1308
1514
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_5", NULL,
1309
-			     0, 0, 0, 0),
1515
+			     0, SND_SOC_NOPM, 0, 0),
1310
1516
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_6", NULL,
1311
-			     0, 0, 0, 0),
1517
+			     0, SND_SOC_NOPM, 0, 0),
1312
1518
 	SND_SOC_DAPM_AIF_IN("QUIN_TDM_RX_7", NULL,
1313
-			     0, 0, 0, 0),
1519
+			     0, SND_SOC_NOPM, 0, 0),
1314
1520
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_0", NULL,
1315
-						0, 0, 0, 0),
1521
+						0, SND_SOC_NOPM, 0, 0),
1316
1522
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_1", NULL,
1317
-						0, 0, 0, 0),
1523
+						0, SND_SOC_NOPM, 0, 0),
1318
1524
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_2", NULL,
1319
-						0, 0, 0, 0),
1525
+						0, SND_SOC_NOPM, 0, 0),
1320
1526
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_3", NULL,
1321
-						0, 0, 0, 0),
1527
+						0, SND_SOC_NOPM, 0, 0),
1322
1528
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_4", NULL,
1323
-						0, 0, 0, 0),
1529
+						0, SND_SOC_NOPM, 0, 0),
1324
1530
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_5", NULL,
1325
-						0, 0, 0, 0),
1531
+						0, SND_SOC_NOPM, 0, 0),
1326
1532
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_6", NULL,
1327
-						0, 0, 0, 0),
1533
+						0, SND_SOC_NOPM, 0, 0),
1328
1534
 	SND_SOC_DAPM_AIF_OUT("QUIN_TDM_TX_7", NULL,
1329
-						0, 0, 0, 0),
1535
+						0, SND_SOC_NOPM, 0, 0),
1536
+	SND_SOC_DAPM_AIF_OUT("DISPLAY_PORT_RX", "NULL", 0, SND_SOC_NOPM, 0, 0),
1537
+
1538
+	SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_0", "NULL",
1539
+		0, SND_SOC_NOPM, 0, 0),
1540
+	SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_0", "NULL",
1541
+		 0, SND_SOC_NOPM, 0, 0),
1542
+	SND_SOC_DAPM_AIF_IN("WSA_CODEC_DMA_RX_1", "NULL",
1543
+		0, SND_SOC_NOPM, 0, 0),
1544
+	SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_1", "NULL",
1545
+		 0, SND_SOC_NOPM, 0, 0),
1546
+	SND_SOC_DAPM_AIF_OUT("WSA_CODEC_DMA_TX_2", "NULL",
1547
+		 0, SND_SOC_NOPM, 0, 0),
1548
+	SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_0", "NULL",
1549
+		 0, SND_SOC_NOPM, 0, 0),
1550
+	SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_1", "NULL",
1551
+		 0, SND_SOC_NOPM, 0, 0),
1552
+	SND_SOC_DAPM_AIF_OUT("VA_CODEC_DMA_TX_2", "NULL",
1553
+		 0, SND_SOC_NOPM, 0, 0),
1554
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_0", "NULL",
1555
+		0, SND_SOC_NOPM, 0, 0),
1556
+	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_0", "NULL",
1557
+		 0, SND_SOC_NOPM, 0, 0),
1558
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_1", "NULL",
1559
+		0, SND_SOC_NOPM, 0, 0),
1560
+	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_1", "NULL",
1561
+		 0, SND_SOC_NOPM, 0, 0),
1562
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_2", "NULL",
1563
+		0, SND_SOC_NOPM, 0, 0),
1564
+	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_2", "NULL",
1565
+		 0, SND_SOC_NOPM, 0, 0),
1566
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_3", "NULL",
1567
+		0, SND_SOC_NOPM, 0, 0),
1568
+	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_3", "NULL",
1569
+		 0, SND_SOC_NOPM, 0, 0),
1570
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_4", "NULL",
1571
+		0, SND_SOC_NOPM, 0, 0),
1572
+	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_4", "NULL",
1573
+		 0, SND_SOC_NOPM, 0, 0),
1574
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_5", "NULL",
1575
+		0, SND_SOC_NOPM, 0, 0),
1576
+	SND_SOC_DAPM_AIF_OUT("TX_CODEC_DMA_TX_5", "NULL",
1577
+		 0, SND_SOC_NOPM, 0, 0),
1578
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_6", "NULL",
1579
+		0, SND_SOC_NOPM, 0, 0),
1580
+	SND_SOC_DAPM_AIF_IN("RX_CODEC_DMA_RX_7", "NULL",
1581
+		0, SND_SOC_NOPM, 0, 0),
1330
1582
 };
1331
1583
 
1332
1584
 static const struct snd_soc_component_driver q6afe_dai_component = {
..
..
@@ -1437,11 +1689,13 @@
1437
1689
 					  q6afe_dais, ARRAY_SIZE(q6afe_dais));
1438
1690
 }
1439
1691
 
1692
+#ifdef CONFIG_OF
1440
1693
 static const struct of_device_id q6afe_dai_device_id[] = {
1441
1694
 	{ .compatible = "qcom,q6afe-dais" },
1442
1695
 	{},
1443
1696
 };
1444
1697
 MODULE_DEVICE_TABLE(of, q6afe_dai_device_id);
1698
+#endif
1445
1699
 
1446
1700
 static struct platform_driver q6afe_dai_platform_driver = {
1447
1701
 	.driver = {