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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/sound/soc/codecs/wm8958-dsp2.c
..
..
@@ -1,13 +1,10 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * wm8958-dsp2.c  --  WM8958 DSP2 support
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  *
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  * Copyright 2011 Wolfson Microelectronics plc
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  *
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  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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8
  */
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9
 
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 #include <linux/module.h>
..
..
@@ -27,6 +24,8 @@
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24
 #include <linux/mfd/wm8994/registers.h>
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 #include <linux/mfd/wm8994/pdata.h>
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 #include <linux/mfd/wm8994/gpio.h>
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+
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+#include <asm/unaligned.h>
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29
 
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 #include "wm8994.h"
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..
..
@@ -61,18 +60,15 @@
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 	}
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 	if (memcmp(fw->data, "WMFW", 4) != 0) {
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-		memcpy(&data32, fw->data, sizeof(data32));
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-		data32 = be32_to_cpu(data32);
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+		data32 = get_unaligned_be32(fw->data);
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 		dev_err(component->dev, "%s: firmware has bad file magic %08x\n",
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 			name, data32);
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 		goto err;
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 	}
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68
 
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-	memcpy(&data32, fw->data + 4, sizeof(data32));
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-	len = be32_to_cpu(data32);
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+	len = get_unaligned_be32(fw->data + 4);
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+	data32 = get_unaligned_be32(fw->data + 8);
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-	memcpy(&data32, fw->data + 8, sizeof(data32));
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-	data32 = be32_to_cpu(data32);
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 	if ((data32 >> 24) & 0xff) {
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 		dev_err(component->dev, "%s: unsupported firmware version %d\n",
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 			name, (data32 >> 24) & 0xff);
..
..
@@ -90,9 +86,8 @@
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 	}
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 	if (check) {
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-		memcpy(&data64, fw->data + 24, sizeof(u64));
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-		dev_info(component->dev, "%s timestamp %llx\n",
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-			 name, be64_to_cpu(data64));
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+		data64 = get_unaligned_be64(fw->data + 24);
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+		dev_info(component->dev, "%s timestamp %llx\n",  name, data64);
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 	} else {
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 		snd_soc_component_write(component, 0x102, 0x2);
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 		snd_soc_component_write(component, 0x900, 0x2);
..
..
@@ -107,8 +102,7 @@
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 			goto err;
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 		}
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104
 
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-		memcpy(&data32, data + 4, sizeof(data32));
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-		block_len = be32_to_cpu(data32);
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+		block_len = get_unaligned_be32(data + 4);
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 		if (block_len + 8 > len) {
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 			dev_err(component->dev, "%zd byte block longer than file\n",
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 				block_len);
..
..
@@ -119,8 +113,7 @@
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 			goto err;
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 		}
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-		memcpy(&data32, data, sizeof(data32));
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-		data32 = be32_to_cpu(data32);
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+		data32 = get_unaligned_be32(data);
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117
 
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 		switch ((data32 >> 24) & 0xff) {
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119
 		case WM_FW_BLOCK_INFO:
..
..
@@ -199,7 +192,7 @@
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 	int i;
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193
 
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 	/* If the DSP is already running then noop */
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-	if (snd_soc_component_read32(component, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
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+	if (snd_soc_component_read(component, WM8958_DSP2_PROGRAM) & WM8958_DSP2_ENA)
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 		return;
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197
 
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 	/* If we have MBC firmware download it */
..
..
@@ -331,7 +324,7 @@
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 static void wm8958_dsp_apply(struct snd_soc_component *component, int path, int start)
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 {
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 	struct wm8994_priv *wm8994 = snd_soc_component_get_drvdata(component);
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-	int pwr_reg = snd_soc_component_read32(component, WM8994_POWER_MANAGEMENT_5);
327
+	int pwr_reg = snd_soc_component_read(component, WM8994_POWER_MANAGEMENT_5);
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328
 	int ena, reg, aif;
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329
 
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 	switch (path) {
..
..
@@ -359,7 +352,7 @@
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 	if (!pwr_reg)
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353
 		ena = 0;
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354
 
362
-	reg = snd_soc_component_read32(component, WM8958_DSP2_PROGRAM);
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+	reg = snd_soc_component_read(component, WM8958_DSP2_PROGRAM);
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356
 
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 	dev_dbg(component->dev, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
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358
 		path, wm8994->dsp_active, start, pwr_reg, reg);
..
..
@@ -370,9 +363,9 @@
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 			return;
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364
 
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 		/* If either AIFnCLK is not yet enabled postpone */
373
-		if (!(snd_soc_component_read32(component, WM8994_AIF1_CLOCKING_1)
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+		if (!(snd_soc_component_read(component, WM8994_AIF1_CLOCKING_1)
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367
 		      & WM8994_AIF1CLK_ENA_MASK) &&
375
-		    !(snd_soc_component_read32(component, WM8994_AIF2_CLOCKING_1)
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+		    !(snd_soc_component_read(component, WM8994_AIF2_CLOCKING_1)
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369
 		      & WM8994_AIF2CLK_ENA_MASK))
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 			return;
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371
 
..
..
@@ -467,7 +460,7 @@
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 	int reg;
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461
 
469
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 	/* Don't allow on the fly reconfiguration */
470
-	reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
463
+	reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
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464
 	if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
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465
 		return -EBUSY;
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466
 
..
..
@@ -537,7 +530,7 @@
537
530
 
538
531
 	wm8958_dsp_apply(component, mbc, wm8994->mbc_ena[mbc]);
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532
 
540
-	return 0;
533
+	return 1;
541
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 }
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535
 
543
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 #define WM8958_MBC_SWITCH(xname, xval) {\
..
..
@@ -557,7 +550,7 @@
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 	int reg;
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551
 
559
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 	/* Don't allow on the fly reconfiguration */
560
-	reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
553
+	reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
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554
 	if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
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555
 		return -EBUSY;
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556
 
..
..
@@ -590,7 +583,7 @@
590
583
 	int reg;
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584
 
592
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 	/* Don't allow on the fly reconfiguration */
593
-	reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
586
+	reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
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 	if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
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 		return -EBUSY;
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589
 
..
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@@ -663,7 +656,7 @@
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656
 
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 	wm8958_dsp_apply(component, vss, wm8994->vss_ena[vss]);
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658
 
666
-	return 0;
659
+	return 1;
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 }
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661
 
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..
..
@@ -737,7 +730,7 @@
737
730
 
738
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 	wm8958_dsp_apply(component, hpf % 3, ucontrol->value.integer.value[0]);
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732
 
740
-	return 0;
733
+	return 1;
741
734
 }
742
735
 
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 #define WM8958_HPF_SWITCH(xname, xval) {\
..
..
@@ -757,7 +750,7 @@
757
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 	int reg;
758
751
 
759
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 	/* Don't allow on the fly reconfiguration */
760
-	reg = snd_soc_component_read32(component, WM8994_CLOCKING_1);
753
+	reg = snd_soc_component_read(component, WM8994_CLOCKING_1);
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754
 	if (reg < 0 || reg & WM8958_DSP2CLK_ENA)
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755
 		return -EBUSY;
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756
 
..
..
@@ -831,7 +824,7 @@
831
824
 
832
825
 	wm8958_dsp_apply(component, eq, ucontrol->value.integer.value[0]);
833
826
 
834
-	return 0;
827
+	return 1;
835
828
 }
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829
 
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 #define WM8958_ENH_EQ_SWITCH(xname, xval) {\