forked from ~ljy/RK356X_SDK_RELEASE
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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/sound/soc/codecs/es8323.c
....@@ -17,7 +17,6 @@
1717 #include <linux/i2c.h>
1818 #include <linux/platform_device.h>
1919 #include <linux/slab.h>
20
-#include <linux/of_gpio.h>
2120 #include <sound/core.h>
2221 #include <sound/pcm.h>
2322 #include <sound/pcm_params.h>
....@@ -26,13 +25,12 @@
2625 #include <sound/soc-dapm.h>
2726 #include <sound/initval.h>
2827 #include <linux/proc_fs.h>
29
-#include <linux/gpio.h>
30
-#include <linux/interrupt.h>
31
-#include <linux/irq.h>
3228 #include "es8323.h"
3329 
34
-#define ES8323_CODEC_SET_SPK	1
35
-#define ES8323_CODEC_SET_HP	2
30
+#define NR_SUPPORTED_MCLK_LRCK_RATIOS 5
31
+static const unsigned int supported_mclk_lrck_ratios[NR_SUPPORTED_MCLK_LRCK_RATIOS] = {
32
+	256, 384, 512, 768, 1024
33
+};
3634 
3735 #define es8323_DEF_VOL	0x1b
3836 
....@@ -90,37 +88,12 @@
9088 /* codec private data */
9189 struct es8323_priv {
9290 	unsigned int sysclk;
91
+	unsigned int allowed_rates[NR_SUPPORTED_MCLK_LRCK_RATIOS];
9392 	struct clk *mclk;
94
-	struct snd_pcm_hw_constraint_list *sysclk_constraints;
93
+	struct snd_pcm_hw_constraint_list sysclk_constraints;
9594 	struct snd_soc_component *component;
9695 	struct regmap *regmap;
97
-
98
-	struct gpio_desc *spk_ctl_gpio;
99
-	struct gpio_desc *hp_det_gpio;
100
-
101
-	bool muted;
10296 };
103
-
104
-static int es8323_set_gpio(struct es8323_priv *es8323, int gpio, bool level)
105
-{
106
-	if ((gpio & ES8323_CODEC_SET_SPK) && es8323->spk_ctl_gpio)
107
-		gpiod_set_value(es8323->spk_ctl_gpio, level);
108
-
109
-	return 0;
110
-}
111
-
112
-static irqreturn_t hp_det_irq_handler(int irq, void *dev_id)
113
-{
114
-	struct es8323_priv *es8323 = dev_id;
115
-
116
-	if (es8323->muted == 0) {
117
-		if (gpiod_get_value(es8323->hp_det_gpio))
118
-			es8323_set_gpio(es8323, ES8323_CODEC_SET_SPK, 0);
119
-		else
120
-			es8323_set_gpio(es8323, ES8323_CODEC_SET_SPK, 1);
121
-	}
122
-	return IRQ_HANDLED;
123
-}
12497 
12598 static int es8323_reset(struct snd_soc_component *component)
12699 {
....@@ -135,6 +108,11 @@
135108 static const unsigned int es8323_line_values[] = {
136109 	0, 1, 3
137110 };
111
+
112
+static const char * const es8323_pga_sell[] = {"Line 1L", "Line 2L", "DifferentialL"};
113
+static const char * const es8323_pga_selr[] = {"Line 1R", "Line 2R", "DifferentialR"};
114
+static const char * const es8323_lin_sell[] = {"Line 1L", "Line 2L", "NC", "MicL"};
115
+static const char * const es8323_lin_selr[] = {"Line 1R", "Line 2R", "NC", "MicR"};
138116 
139117 static const char * const stereo_3d_txt[] = {
140118 	"No 3D  ", "Level 1", "Level 2",
....@@ -166,11 +144,18 @@
166144 	"Line 1", "Line 2"
167145 };
168146 
147
+SOC_VALUE_ENUM_SINGLE_DECL(es8323_left_dac_enum, ES8323_ADCCONTROL2, 6, 3, es8323_pga_sell, es8323_line_values);
148
+SOC_VALUE_ENUM_SINGLE_DECL(es8323_right_dac_enum, ES8323_ADCCONTROL2, 4, 3, es8323_pga_selr, es8323_line_values);
149
+static SOC_ENUM_SINGLE_DECL(es8323_diff_enum, ES8323_ADCCONTROL3, 7, es8323_diff_sel);
150
+static SOC_ENUM_SINGLE_DECL(es8323_llin_enum, ES8323_DACCONTROL16, 3, es8323_lin_sell);
151
+static SOC_ENUM_SINGLE_DECL(es8323_rlin_enum, ES8323_DACCONTROL16, 0, es8323_lin_selr);
152
+static SOC_ENUM_SINGLE_DECL(es8323_mono_enum, ES8323_ADCCONTROL3, 3, es8323_mono_mux);
153
+
169154 static const struct soc_enum es8323_enum[] = {
170155 	SOC_VALUE_ENUM_SINGLE(ES8323_DACCONTROL16, 3, 7, ARRAY_SIZE(es8323_line_texts), es8323_line_texts, es8323_line_values),	/* LLINE */
171156 	SOC_VALUE_ENUM_SINGLE(ES8323_DACCONTROL16, 0, 7, ARRAY_SIZE(es8323_line_texts), es8323_line_texts, es8323_line_values),	/* RLINE */
172
-	SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 6, 3, ARRAY_SIZE(es8323_line_texts), es8323_line_texts, es8323_line_values),	/* Left PGA Mux */
173
-	SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 4, 3, ARRAY_SIZE(es8323_line_texts), es8323_line_texts, es8323_line_values),	/* Right PGA Mux */
157
+	SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 6, 3, ARRAY_SIZE(es8323_pga_sell), es8323_line_texts, es8323_line_values),	/* Left PGA Mux */
158
+	SOC_VALUE_ENUM_SINGLE(ES8323_ADCCONTROL2, 4, 3, ARRAY_SIZE(es8323_pga_sell), es8323_line_texts, es8323_line_values),	/* Right PGA Mux */
174159 	SOC_ENUM_SINGLE(ES8323_DACCONTROL7, 2, 8, stereo_3d_txt),	/* stereo-3d */
175160 	SOC_ENUM_SINGLE(ES8323_ADCCONTROL10, 6, 4, alc_func_txt),	/* alc func */
176161 	SOC_ENUM_SINGLE(ES8323_ADCCONTROL14, 1, 2, ng_type_txt),	/* noise gate type */
....@@ -180,11 +165,15 @@
180165 	SOC_ENUM_SINGLE(ES8323_ADCCONTROL3, 7, 2, es8323_diff_sel),
181166 };
182167 
183
-static const DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
184168 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9600, 50, 1);
185169 static const DECLARE_TLV_DB_SCALE(dac_tlv, -9600, 50, 1);
186170 static const DECLARE_TLV_DB_SCALE(out_tlv, -4500, 150, 0);
187
-static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
171
+static const DECLARE_TLV_DB_SCALE(bypass_tlv, 0, 300, 0);
172
+static const DECLARE_TLV_DB_SCALE(bypass_tlv2, -15, 300, 0);
173
+
174
+static const struct snd_kcontrol_new es8323_left_dac_mux_controls = SOC_DAPM_ENUM("Route", es8323_left_dac_enum);
175
+static const struct snd_kcontrol_new es8323_right_dac_mux_controls = SOC_DAPM_ENUM("Route", es8323_right_dac_enum);
176
+static const struct snd_kcontrol_new es8323_diffmux_controls = SOC_DAPM_ENUM("Route2", es8323_diff_enum);
188177 
189178 static const struct snd_kcontrol_new es8323_snd_controls[] = {
190179 	SOC_ENUM("3D Mode", es8323_enum[4]),
....@@ -201,39 +190,34 @@
201190 	SOC_SINGLE("ALC Capture NG Switch", ES8323_ADCCONTROL14, 0, 1, 0),
202191 	SOC_SINGLE("ZC Timeout Switch", ES8323_ADCCONTROL13, 6, 1, 0),
203192 	SOC_DOUBLE_R_TLV("Capture Digital Volume", ES8323_ADCCONTROL8,
204
-			 ES8323_ADCCONTROL9, 0, 255, 1, adc_tlv),
193
+			 ES8323_ADCCONTROL9, 0, 192, 1, adc_tlv),
205194 	SOC_SINGLE("Capture Mute", ES8323_ADCCONTROL7, 2, 1, 0),
206
-	SOC_SINGLE_TLV("Left Channel Capture Volume", ES8323_ADCCONTROL1, 4, 15,
195
+	SOC_SINGLE_TLV("Left Channel Capture Volume", ES8323_ADCCONTROL1, 4, 8,
207196 		       0, bypass_tlv),
208197 	SOC_SINGLE_TLV("Right Channel Capture Volume", ES8323_ADCCONTROL1, 0,
209
-		       15, 0, bypass_tlv),
198
+		       8, 0, bypass_tlv),
210199 	SOC_ENUM("Playback De-emphasis", es8323_enum[7]),
211200 	SOC_ENUM("Capture Polarity", es8323_enum[8]),
212201 	SOC_DOUBLE_R_TLV("PCM Volume", ES8323_DACCONTROL4, ES8323_DACCONTROL5,
213
-			 0, 255, 1, dac_tlv),
202
+			 0, 192, 1, dac_tlv),
214203 	SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", ES8323_DACCONTROL17, 3,
215
-		       7, 1, bypass_tlv),
204
+		       7, 1, bypass_tlv2),
216205 	SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", ES8323_DACCONTROL20,
217
-		       3, 7, 1, bypass_tlv),
206
+		       3, 7, 1, bypass_tlv2),
218207 	SOC_DOUBLE_R_TLV("Output 1 Playback Volume", ES8323_DACCONTROL24,
219
-			 ES8323_DACCONTROL25, 0, 64, 0, out_tlv),
208
+			 ES8323_DACCONTROL25, 0, 33, 0, out_tlv),
220209 	SOC_DOUBLE_R_TLV("Output 2 Playback Volume", ES8323_DACCONTROL26,
221
-			 ES8323_DACCONTROL27, 0, 64, 0, out_tlv),
210
+			 ES8323_DACCONTROL27, 0, 33, 0, out_tlv),
222211 };
223212 
224213 static const struct snd_kcontrol_new es8323_left_line_controls =
225
-SOC_DAPM_ENUM("Route", es8323_enum[0]);
214
+SOC_DAPM_ENUM("LLIN Mux", es8323_llin_enum);
226215 
227216 static const struct snd_kcontrol_new es8323_right_line_controls =
228
-SOC_DAPM_ENUM("Route", es8323_enum[1]);
229
-
230
-/* Left PGA Mux */
231
-static const struct snd_kcontrol_new es8323_left_pga_controls =
232
-SOC_DAPM_ENUM("Route", es8323_enum[2]);
233
-
234
-/* Right PGA Mux */
235
-static const struct snd_kcontrol_new es8323_right_pga_controls =
236
-SOC_DAPM_ENUM("Route", es8323_enum[3]);
217
+SOC_DAPM_ENUM("RLIN Mux", es8323_rlin_enum);
218
+/* Mono ADC Mux */
219
+static const struct snd_kcontrol_new es8323_monomux_controls =
220
+SOC_DAPM_ENUM("Mono Mux", es8323_mono_enum);
237221 
238222 /* Left Mixer */
239223 static const struct snd_kcontrol_new es8323_left_mixer_controls[] = {
....@@ -247,20 +231,15 @@
247231 	SOC_DAPM_SINGLE("Right Bypass Switch", ES8323_DACCONTROL20, 6, 1, 0),
248232 };
249233 
250
-/* Differential Mux */
251
-static const struct snd_kcontrol_new es8323_diffmux_controls =
252
-SOC_DAPM_ENUM("Route", es8323_enum[10]);
253
-
254
-/* Mono ADC Mux */
255
-static const struct snd_kcontrol_new es8323_monomux_controls =
256
-SOC_DAPM_ENUM("Route", es8323_enum[9]);
257
-
258234 static const struct snd_soc_dapm_widget es8323_dapm_widgets[] = {
259235 	SND_SOC_DAPM_INPUT("LINPUT1"),
260236 	SND_SOC_DAPM_INPUT("LINPUT2"),
261237 	SND_SOC_DAPM_INPUT("RINPUT1"),
262238 	SND_SOC_DAPM_INPUT("RINPUT2"),
263
-
239
+	SND_SOC_DAPM_MUX("Left PGA Mux", SND_SOC_NOPM, 0, 0,
240
+			 &es8323_left_dac_mux_controls),
241
+	SND_SOC_DAPM_MUX("Right PGA Mux", SND_SOC_NOPM, 0, 0,
242
+			 &es8323_right_dac_mux_controls),
264243 	SND_SOC_DAPM_MICBIAS("Mic Bias", ES8323_ADCPOWER, 3, 1),
265244 
266245 	SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
....@@ -271,11 +250,6 @@
271250 	SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
272251 			 &es8323_monomux_controls),
273252 
274
-	SND_SOC_DAPM_MUX("Left PGA Mux", ES8323_ADCPOWER, 7, 1,
275
-			 &es8323_left_pga_controls),
276
-	SND_SOC_DAPM_MUX("Right PGA Mux", ES8323_ADCPOWER, 6, 1,
277
-			 &es8323_right_pga_controls),
278
-
279253 	SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
280254 			 &es8323_left_line_controls),
281255 	SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
....@@ -285,8 +259,11 @@
285259 	SND_SOC_DAPM_ADC("Left ADC", "Left Capture", ES8323_ADCPOWER, 5, 1),
286260 
287261 	/* gModify.Cmmt Implement when suspend/startup */
288
-	SND_SOC_DAPM_DAC("Right DAC", "Right Playback", ES8323_DACPOWER, 7, 0),
289
-	SND_SOC_DAPM_DAC("Left DAC", "Left Playback", ES8323_DACPOWER, 6, 0),
262
+	SND_SOC_DAPM_DAC("Right DAC", "Right Playback", ES8323_DACPOWER, 6, 1),
263
+	SND_SOC_DAPM_DAC("Left DAC", "Left Playback", ES8323_DACPOWER, 7, 1),
264
+
265
+	SND_SOC_DAPM_AIF_OUT("I2S OUT", "Capture",  0, SND_SOC_NOPM, 0, 0),
266
+	SND_SOC_DAPM_AIF_IN("I2S IN", "Playback", 0, SND_SOC_NOPM, 0, 0),
290267 
291268 	SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
292269 			   &es8323_left_mixer_controls[0],
....@@ -294,7 +271,8 @@
294271 	SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
295272 			   &es8323_right_mixer_controls[0],
296273 			   ARRAY_SIZE(es8323_right_mixer_controls)),
297
-
274
+	SND_SOC_DAPM_PGA("Right ADC Power", ES8323_ADCPOWER, 6, 1, NULL, 0),
275
+	SND_SOC_DAPM_PGA("Left ADC Power", ES8323_ADCPOWER, 7, 1, NULL, 0),
298276 	SND_SOC_DAPM_PGA("Right Out 2", ES8323_DACPOWER, 2, 0, NULL, 0),
299277 	SND_SOC_DAPM_PGA("Left Out 2", ES8323_DACPOWER, 3, 0, NULL, 0),
300278 	SND_SOC_DAPM_PGA("Right Out 1", ES8323_DACPOWER, 4, 0, NULL, 0),
....@@ -310,43 +288,45 @@
310288 };
311289 
312290 static const struct snd_soc_dapm_route audio_map[] = {
313
-	{"Left Line Mux", "NULL", "LINPUT1"},
314
-	{"Left Line Mux", "NULL", "LINPUT2"},
315
-	{"Left Line Mux", "NULL", "Left PGA Mux"},
291
+	{"Left PGA Mux", "Line 1L", "LINPUT1"},
292
+	{"Left PGA Mux", "Line 2L", "LINPUT2"},
293
+	{"Left PGA Mux", "DifferentialL", "Differential Mux"},
316294 
317
-	{"Right Line Mux", "NULL", "RINPUT1"},
318
-	{"Right Line Mux", "NULL", "RINPUT2"},
319
-	{"Right Line Mux", "NULL", "Right PGA Mux"},
295
+	{"Right PGA Mux", "Line 1R", "RINPUT1"},
296
+	{"Right PGA Mux", "Line 2R", "RINPUT2"},
297
+	{"Right PGA Mux", "DifferentialR", "Differential Mux"},
320298 
321
-	{"Left PGA Mux", "LAMP", "LINPUT1"},
322
-	{"Left PGA Mux", "LAMP", "LINPUT2"},
323
-	{"Left PGA Mux", "LAMP", "Differential Mux"},
299
+	{"Differential Mux", "Line 1", "LINPUT1"},
300
+	{"Differential Mux", "Line 1", "RINPUT1"},
301
+	{"Differential Mux", "Line 2", "LINPUT2"},
302
+	{"Differential Mux", "Line 2", "RINPUT2"},
324303 
325
-	{"Right PGA Mux", "RAMP", "RINPUT1"},
326
-	{"Right PGA Mux", "RAMP", "RINPUT2"},
327
-	{"Right PGA Mux", "RAMP", "Differential Mux"},
328
-
329
-	{"Differential Mux", "LAMP", "LINPUT1"},
330
-	{"Differential Mux", "RAMP", "RINPUT1"},
331
-	{"Differential Mux", "LAMP", "LINPUT2"},
332
-	{"Differential Mux", "RAMP", "RINPUT2"},
333
-
304
+	{"Left ADC Mux", "Stereo", "Right PGA Mux"},
334305 	{"Left ADC Mux", "Stereo", "Left PGA Mux"},
335306 	{"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
336307 
308
+	{"Right ADC Mux", "Stereo", "Left PGA Mux"},
337309 	{"Right ADC Mux", "Stereo", "Right PGA Mux"},
338310 	{"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
339311 
340
-	{"Left ADC", NULL, "Left ADC Mux"},
341
-	{"Right ADC", NULL, "Right ADC Mux"},
312
+	{"Left ADC Power", NULL, "Left ADC Mux"},
313
+	{"Right ADC Power", NULL, "Right ADC Mux"},
314
+	{"Left ADC", NULL, "Left ADC Power"},
315
+	{"Right ADC", NULL, "Right ADC Power"},
342316 
343
-	{"Left Line Mux", "LAMP", "LINPUT1"},
344
-	{"Left Line Mux", "LAMP", "LINPUT2"},
345
-	{"Left Line Mux", "LAMP", "Left PGA Mux"},
317
+	{"I2S OUT", NULL, "Left ADC"},
318
+	{"I2S OUT", NULL, "Right ADC"},
346319 
347
-	{"Right Line Mux", "RAMP", "RINPUT1"},
348
-	{"Right Line Mux", "RAMP", "RINPUT2"},
349
-	{"Right Line Mux", "RAMP", "Right PGA Mux"},
320
+	{"Left Line Mux", "Line 1L", "LINPUT1"},
321
+	{"Left Line Mux", "Line 2L", "LINPUT2"},
322
+	{"Left Line Mux", "MicL", "Left PGA Mux"},
323
+
324
+	{"Right Line Mux", "Line 1R", "RINPUT1"},
325
+	{"Right Line Mux", "Line 2R", "RINPUT2"},
326
+	{"Right Line Mux", "MicR", "Right PGA Mux"},
327
+
328
+	{"Right DAC", NULL, "I2S IN"},
329
+	{"Left DAC", NULL, "I2S IN"},
350330 
351331 	{"Left Mixer", "Left Playback Switch", "Left DAC"},
352332 	{"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
....@@ -376,6 +356,8 @@
376356 /* codec hifi mclk clock divider coefficients */
377357 static const struct _coeff_div coeff_div[] = {
378358 	/* 8k */
359
+	{2048000, 8000, 256, 0x2, 0x0},
360
+	{4096000, 8000, 512, 0x4, 0x0},
379361 	{12288000, 8000, 1536, 0xa, 0x0},
380362 	{11289600, 8000, 1408, 0x9, 0x0},
381363 	{18432000, 8000, 2304, 0xc, 0x0},
....@@ -388,6 +370,8 @@
388370 	{12000000, 11025, 1088, 0x9, 0x1},
389371 
390372 	/* 16k */
373
+	{4096000, 16000, 256, 0x2, 0x0},
374
+	{8192000, 16000, 512, 0x4, 0x0},
391375 	{12288000, 16000, 768, 0x6, 0x0},
392376 	{18432000, 16000, 1152, 0x8, 0x0},
393377 	{12000000, 16000, 750, 0x7, 0x1},
....@@ -398,6 +382,8 @@
398382 	{12000000, 22050, 544, 0x6, 0x1},
399383 
400384 	/* 32k */
385
+	{8192000, 32000, 256, 0x2, 0x0},
386
+	{16384000, 32000, 512, 0x4, 0x0},
401387 	{12288000, 32000, 384, 0x3, 0x0},
402388 	{18432000, 32000, 576, 0x5, 0x0},
403389 	{12000000, 32000, 375, 0x4, 0x1},
....@@ -435,35 +421,6 @@
435421 	return -EINVAL;
436422 }
437423 
438
-/* The set of rates we can generate from the above for each SYSCLK */
439
-static unsigned int rates_12288[] = {
440
-	8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
441
-};
442
-
443
-static struct snd_pcm_hw_constraint_list constraints_12288 = {
444
-	.count = ARRAY_SIZE(rates_12288),
445
-	.list = rates_12288,
446
-};
447
-
448
-static unsigned int rates_112896[] = {
449
-	8000, 11025, 22050, 44100,
450
-};
451
-
452
-static struct snd_pcm_hw_constraint_list constraints_112896 = {
453
-	.count = ARRAY_SIZE(rates_112896),
454
-	.list = rates_112896,
455
-};
456
-
457
-static unsigned int rates_12[] = {
458
-	8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
459
-	48000, 88235, 96000,
460
-};
461
-
462
-static struct snd_pcm_hw_constraint_list constraints_12 = {
463
-	.count = ARRAY_SIZE(rates_12),
464
-	.list = rates_12,
465
-};
466
-
467424 /*
468425  * Note that this should be called from init rather than from hw_params.
469426  */
....@@ -472,31 +429,35 @@
472429 {
473430 	struct snd_soc_component *component = codec_dai->component;
474431 	struct es8323_priv *es8323 = snd_soc_component_get_drvdata(component);
432
+	int i, ret;
433
+	int count = 0;
475434 
476
-	switch (freq) {
477
-	case 11289600:
478
-	case 18432000:
479
-	case 22579200:
480
-	case 36864000:
481
-		es8323->sysclk_constraints = &constraints_112896;
482
-		es8323->sysclk = freq;
483
-		return 0;
435
+	es8323->sysclk = freq;
436
+	if (freq == 0) {
437
+		es8323->sysclk_constraints.list = NULL;
438
+		es8323->sysclk_constraints.count = 0;
484439 
485
-	case 12288000:
486
-	case 16934400:
487
-	case 24576000:
488
-	case 33868800:
489
-		es8323->sysclk_constraints = &constraints_12288;
490
-		es8323->sysclk = freq;
491
-		return 0;
492
-
493
-	case 12000000:
494
-	case 24000000:
495
-		es8323->sysclk_constraints = &constraints_12;
496
-		es8323->sysclk = freq;
497440 		return 0;
498441 	}
499
-	return -EINVAL;
442
+
443
+	ret = clk_set_rate(es8323->mclk, freq);
444
+	if (ret)
445
+		return ret;
446
+
447
+	/* Limit supported sample rates to ones that can be autodetected
448
+	 * by the codec running in slave mode.
449
+	 */
450
+	for (i = 0; i < NR_SUPPORTED_MCLK_LRCK_RATIOS; i++) {
451
+		const unsigned int ratio = supported_mclk_lrck_ratios[i];
452
+
453
+		if (freq % ratio == 0)
454
+			es8323->allowed_rates[count++] = freq / ratio;
455
+	}
456
+
457
+	es8323->sysclk_constraints.list = es8323->allowed_rates;
458
+	es8323->sysclk_constraints.count = count;
459
+
460
+	return 0;
500461 }
501462 
502463 static int es8323_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
....@@ -506,9 +467,9 @@
506467 	u8 adciface = 0;
507468 	u8 daciface = 0;
508469 
509
-	iface = snd_soc_component_read32(component, ES8323_IFACE);
510
-	adciface = snd_soc_component_read32(component, ES8323_ADC_IFACE);
511
-	daciface = snd_soc_component_read32(component, ES8323_DAC_IFACE);
470
+	iface = snd_soc_component_read(component, ES8323_IFACE);
471
+	adciface = snd_soc_component_read(component, ES8323_ADC_IFACE);
472
+	daciface = snd_soc_component_read(component, ES8323_DAC_IFACE);
512473 
513474 	/* set master/slave audio interface */
514475 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
....@@ -576,22 +537,6 @@
576537 static int es8323_pcm_startup(struct snd_pcm_substream *substream,
577538 			      struct snd_soc_dai *dai)
578539 {
579
-	struct snd_soc_component *component = dai->component;
580
-	struct es8323_priv *es8323 = snd_soc_component_get_drvdata(component);
581
-
582
-	/* The set of sample rates that can be supported depends on the
583
-	 * MCLK supplied to the CODEC - enforce this.
584
-	 */
585
-	if (!es8323->sysclk) {
586
-		dev_err(component->dev,
587
-			"No MCLK configured, call set_sysclk() on init\n");
588
-		return -EINVAL;
589
-	}
590
-
591
-	snd_pcm_hw_constraint_list(substream->runtime, 0,
592
-				   SNDRV_PCM_HW_PARAM_RATE,
593
-				   es8323->sysclk_constraints);
594
-
595540 	return 0;
596541 }
597542 
....@@ -601,11 +546,27 @@
601546 {
602547 	struct snd_soc_component *component = dai->component;
603548 	struct es8323_priv *es8323 = snd_soc_component_get_drvdata(component);
604
-	u16 srate = snd_soc_component_read32(component, ES8323_IFACE) & 0x80;
605
-	u16 adciface = snd_soc_component_read32(component, ES8323_ADC_IFACE) & 0xE3;
606
-	u16 daciface = snd_soc_component_read32(component, ES8323_DAC_IFACE) & 0xC7;
549
+	u16 srate = snd_soc_component_read(component, ES8323_IFACE) & 0x80;
550
+	u16 adciface = snd_soc_component_read(component, ES8323_ADC_IFACE) & 0xE3;
551
+	u16 daciface = snd_soc_component_read(component, ES8323_DAC_IFACE) & 0xC7;
607552 	int coeff;
553
+	int i;
608554 
555
+	/* Validate supported sample rates that are autodetected from MCLK */
556
+	for (i = 0; i < NR_SUPPORTED_MCLK_LRCK_RATIOS; i++) {
557
+		const unsigned int ratio = supported_mclk_lrck_ratios[i];
558
+
559
+		if (es8323->sysclk % ratio != 0)
560
+			continue;
561
+		if (es8323->sysclk / ratio == params_rate(params))
562
+			break;
563
+	}
564
+	if (i == NR_SUPPORTED_MCLK_LRCK_RATIOS) {
565
+		dev_err(component->dev,
566
+			"Unsupported sample rate %dHz with %dHz MCLK\n",
567
+			params_rate(params), es8323->sysclk);
568
+		return -EINVAL;
569
+	}
609570 	coeff = get_coeff(es8323->sysclk, params_rate(params));
610571 	if (coeff < 0) {
611572 		coeff = get_coeff(es8323->sysclk / 2, params_rate(params));
....@@ -653,25 +614,8 @@
653614 	return 0;
654615 }
655616 
656
-static int es8323_mute(struct snd_soc_dai *dai, int mute)
617
+static int es8323_mute(struct snd_soc_dai *dai, int mute, int stream)
657618 {
658
-	struct snd_soc_component *component = dai->component;
659
-	struct es8323_priv *es8323 = snd_soc_component_get_drvdata(component);
660
-
661
-	es8323->muted = mute;
662
-	if (mute) {
663
-		es8323_set_gpio(es8323, ES8323_CODEC_SET_SPK, 0);
664
-		usleep_range(18000, 20000);
665
-		snd_soc_component_write(component, ES8323_DACCONTROL3, 0x06);
666
-	} else {
667
-		snd_soc_component_write(component, ES8323_DACCONTROL3, 0x02);
668
-		snd_soc_component_write(component, 0x30, es8323_DEF_VOL);
669
-		snd_soc_component_write(component, 0x31, es8323_DEF_VOL);
670
-		msleep(50);
671
-		if (!gpiod_get_value(es8323->hp_det_gpio))
672
-			es8323_set_gpio(es8323, ES8323_CODEC_SET_SPK, 1);
673
-		usleep_range(18000, 20000);
674
-	}
675619 	return 0;
676620 }
677621 
....@@ -711,8 +655,6 @@
711655 		snd_soc_component_write(component, ES8323_ADCPOWER, 0x59);
712656 		break;
713657 	case SND_SOC_BIAS_OFF:
714
-		if (es8323->mclk)
715
-			clk_disable_unprepare(es8323->mclk);
716658 		dev_dbg(component->dev, "%s off\n", __func__);
717659 		snd_soc_component_write(component, ES8323_ADCPOWER, 0xFF);
718660 		snd_soc_component_write(component, ES8323_DACPOWER, 0xC0);
....@@ -735,7 +677,8 @@
735677 	.hw_params = es8323_pcm_hw_params,
736678 	.set_fmt = es8323_set_dai_fmt,
737679 	.set_sysclk = es8323_set_dai_sysclk,
738
-	.digital_mute = es8323_mute,
680
+	.mute_stream = es8323_mute,
681
+	.no_capture_mute = 1,
739682 };
740683 
741684 static struct snd_soc_dai_driver es8323_dai = {
....@@ -760,32 +703,35 @@
760703 
761704 static int es8323_suspend(struct snd_soc_component *component)
762705 {
706
+	struct es8323_priv *es8323 = snd_soc_component_get_drvdata(component);
707
+
763708 	snd_soc_component_write(component, 0x19, 0x06);
764709 	snd_soc_component_write(component, 0x30, 0x00);
765710 	snd_soc_component_write(component, 0x31, 0x00);
766
-	snd_soc_component_write(component, ES8323_DACCONTROL17, 0x38);
767
-	snd_soc_component_write(component, ES8323_DACCONTROL20, 0x38);
768
-	snd_soc_component_write(component, ES8323_DACPOWER, 0x00);
769
-	snd_soc_component_write(component, ES8323_DACPOWER, 0xc0);
770711 	snd_soc_component_write(component, ES8323_ADCPOWER, 0xFF);
712
+	snd_soc_component_write(component, ES8323_DACPOWER, 0xc0);
771713 	snd_soc_component_write(component, ES8323_CHIPPOWER, 0xF3);
772
-	snd_soc_component_write(component, 0x2b, 0x9c);
773
-	snd_soc_component_write(component, 0x00, 0x06);
714
+	snd_soc_component_write(component, 0x00, 0x00);
774715 	snd_soc_component_write(component, 0x01, 0x58);
716
+	snd_soc_component_write(component, 0x2b, 0x9c);
775717 	usleep_range(18000, 20000);
718
+	regcache_cache_only(es8323->regmap, true);
719
+	regcache_mark_dirty(es8323->regmap);
776720 	return 0;
777721 }
778722 
779723 static int es8323_resume(struct snd_soc_component *component)
780724 {
725
+	struct es8323_priv *es8323 = snd_soc_component_get_drvdata(component);
726
+
727
+	regcache_cache_only(es8323->regmap, false);
728
+	snd_soc_component_cache_sync(component);
781729 	snd_soc_component_write(component, 0x2b, 0x80);
782730 	snd_soc_component_write(component, 0x01, 0x50);
783
-	snd_soc_component_write(component, 0x00, 0x16);
731
+	snd_soc_component_write(component, 0x00, 0x32);
784732 	snd_soc_component_write(component, ES8323_CHIPPOWER, 0x00);
785733 	snd_soc_component_write(component, ES8323_DACPOWER, 0x0c);
786734 	snd_soc_component_write(component, ES8323_ADCPOWER, 0x59);
787
-	snd_soc_component_write(component, ES8323_DACCONTROL17, 0xb8);
788
-	snd_soc_component_write(component, ES8323_DACCONTROL20, 0xb8);
789735 	snd_soc_component_write(component, 0x31, es8323_DEF_VOL);
790736 	snd_soc_component_write(component, 0x30, es8323_DEF_VOL);
791737 	snd_soc_component_write(component, 0x19, 0x02);
....@@ -805,59 +751,53 @@
805751 	ret = clk_prepare_enable(es8323->mclk);
806752 	if (ret)
807753 		return ret;
754
+	es8323->component = component;
808755 
809756 	ret = es8323_reset(component);
810757 	if (ret < 0) {
811758 		dev_err(component->dev, "Failed to issue reset\n");
759
+		clk_disable_unprepare(es8323->mclk);
812760 		return ret;
813761 	}
814
-	usleep_range(18000, 20000);
815
-	snd_soc_component_write(component, 0x02, 0xf3);
762
+
763
+	snd_soc_component_write(component, 0x01, 0x60);
764
+	snd_soc_component_write(component, 0x02, 0xF3);
765
+	snd_soc_component_write(component, 0x02, 0xF0);
816766 	snd_soc_component_write(component, 0x2B, 0x80);
817
-	snd_soc_component_write(component, 0x08, 0x00);	/* ES8388 salve */
818
-	snd_soc_component_write(component, 0x00, 0x15);
819
-	snd_soc_component_write(component, 0x01, 0x50);	/* PLAYBACK & RECORD Mode,EnRefr=1 */
820
-	snd_soc_component_write(component, 0x03, 0x59);	/* pdn_ana=0,ibiasgen_pdn=0 */
821
-	snd_soc_component_write(component, 0x05, 0x00);	/* pdn_ana=0,ibiasgen_pdn=0 */
822
-	snd_soc_component_write(component, 0x06, 0x00);	/* pdn_ana=0,ibiasgen_pdn=0 */
823
-	snd_soc_component_write(component, 0x07, 0x7c);
824
-	snd_soc_component_write(component, 0x09, 0x88);	/* ADC L/R PGA =  +24dB */
825
-	snd_soc_component_write(component, 0x0a, 0xf0);	/* ADC INPUT=LIN2/RIN2 */
826
-	snd_soc_component_write(component, 0x0b, 0x80);	/* ADC INPUT=LIN2/RIN2 */
827
-	snd_soc_component_write(component, 0x0C, 0x4c);	/* I2S-24BIT */
828
-	snd_soc_component_write(component, 0x0d, 0x02);	/* MCLK/LRCK=256 */
829
-	snd_soc_component_write(component, 0x10, 0x00);	/* ADC Left Volume=0db */
830
-	snd_soc_component_write(component, 0x11, 0x00);	/* ADC Right Volume=0db */
831
-	snd_soc_component_write(component, 0x12, 0xea);	/* ALC stereo MAXGAIN: 35.5dB,  MINGAIN: +6dB (Record Volume increased!) */
767
+	snd_soc_component_write(component, 0x00, 0x36);
768
+	snd_soc_component_write(component, 0x08, 0x00);
769
+	snd_soc_component_write(component, 0x04, 0x00);
770
+	snd_soc_component_write(component, 0x06, 0xC3);
771
+	snd_soc_component_write(component, 0x19, 0x02);
772
+	snd_soc_component_write(component, 0x09, 0x00);
773
+	snd_soc_component_write(component, 0x0A, 0x00);
774
+	snd_soc_component_write(component, 0x0B, 0x02);
775
+	snd_soc_component_write(component, 0x0C, 0x4C);
776
+	snd_soc_component_write(component, 0x0D, 0x02);
777
+	snd_soc_component_write(component, 0x10, 0x00);
778
+	snd_soc_component_write(component, 0x11, 0x00);
779
+	snd_soc_component_write(component, 0x12, 0xea);
832780 	snd_soc_component_write(component, 0x13, 0xc0);
833781 	snd_soc_component_write(component, 0x14, 0x05);
834782 	snd_soc_component_write(component, 0x15, 0x06);
835783 	snd_soc_component_write(component, 0x16, 0x53);
836
-	snd_soc_component_write(component, 0x17, 0x18);	/* I2S-16BIT */
784
+
785
+	snd_soc_component_write(component, 0x17, 0x18);
837786 	snd_soc_component_write(component, 0x18, 0x02);
838
-	snd_soc_component_write(component, 0x1A, 0x0A);	/* DAC VOLUME=0DB */
839
-	snd_soc_component_write(component, 0x1B, 0x0A);
840
-	snd_soc_component_write(component, 0x26, 0x12);	/* Left DAC TO Left IXER */
841
-	snd_soc_component_write(component, 0x27, 0xb8);	/* Left DAC TO Left MIXER */
842
-	snd_soc_component_write(component, 0x28, 0x38);
843
-	snd_soc_component_write(component, 0x29, 0x38);
844
-	snd_soc_component_write(component, 0x2A, 0xb8);
845
-	snd_soc_component_write(component, 0x02, 0x00);	/* START DLL and state-machine,START DSM */
846
-	snd_soc_component_write(component, 0x19, 0x02);	/* SOFT RAMP RATE=32LRCKS/STEP,Enable ZERO-CROSS CHECK,DAC MUTE */
847
-	snd_soc_component_write(component, 0x04, 0x0c);	/* pdn_ana=0,ibiasgen_pdn=0 */
787
+	snd_soc_component_write(component, 0x1A, 0x00);
788
+	snd_soc_component_write(component, 0x1B, 0x00);
789
+	snd_soc_component_write(component, 0x27, 0xB8);
790
+	snd_soc_component_write(component, 0x2A, 0xB8);
791
+	snd_soc_component_write(component, 0x35, 0xA0);
848792 	usleep_range(18000, 20000);
849
-	snd_soc_component_write(component, 0x2e, 0x00);
850
-	snd_soc_component_write(component, 0x2f, 0x00);
851
-	snd_soc_component_write(component, 0x30, 0x08);
852
-	snd_soc_component_write(component, 0x31, 0x08);
793
+	snd_soc_component_write(component, 0x2E, 0x1E);
794
+	snd_soc_component_write(component, 0x2F, 0x1E);
795
+	snd_soc_component_write(component, 0x30, 0x1E);
796
+	snd_soc_component_write(component, 0x31, 0x1E);
797
+	snd_soc_component_write(component, 0x03, 0x09);
798
+	snd_soc_component_write(component, 0x02, 0x00);
853799 	usleep_range(18000, 20000);
854
-	snd_soc_component_write(component, 0x30, 0x0f);
855
-	snd_soc_component_write(component, 0x31, 0x0f);
856
-	usleep_range(18000, 20000);
857
-	snd_soc_component_write(component, 0x30, 0x18);
858
-	snd_soc_component_write(component, 0x31, 0x18);
859
-	usleep_range(18000, 20000);
860
-	snd_soc_component_write(component, 0x04, 0x2c);	/* pdn_ana=0,ibiasgen_pdn=0 */
800
+	snd_soc_component_write(component, 0x04, 0x3C);
861801 
862802 	es8323_set_bias_level(component, SND_SOC_BIAS_STANDBY);
863803 	return 0;
....@@ -874,6 +814,12 @@
874814 	.suspend = es8323_suspend,
875815 	.resume = es8323_resume,
876816 	.set_bias_level = es8323_set_bias_level,
817
+	.dapm_widgets		= es8323_dapm_widgets,
818
+	.num_dapm_widgets	= ARRAY_SIZE(es8323_dapm_widgets),
819
+	.dapm_routes		= audio_map,
820
+	.num_dapm_routes	= ARRAY_SIZE(audio_map),
821
+	.controls		= es8323_snd_controls,
822
+	.num_controls		= ARRAY_SIZE(es8323_snd_controls),
877823 };
878824 
879825 static const struct regmap_config es8323_regmap_config = {
....@@ -883,7 +829,8 @@
883829 	.cache_type	= REGCACHE_RBTREE,
884830 	.reg_defaults	= es8323_reg_defaults,
885831 	.num_reg_defaults = ARRAY_SIZE(es8323_reg_defaults),
886
-	.use_single_rw	= true,
832
+	.use_single_read = true,
833
+	.use_single_write = true,
887834 };
888835 
889836 static int es8323_i2c_probe(struct i2c_client *i2c,
....@@ -891,7 +838,6 @@
891838 {
892839 	struct es8323_priv *es8323;
893840 	int ret = -1;
894
-	int hp_irq = 0;
895841 	struct i2c_adapter *adapter = to_i2c_adapter(i2c->dev.parent);
896842 	char reg;
897843 
....@@ -918,34 +864,16 @@
918864 		return ret;
919865 	}
920866 
921
-	es8323->spk_ctl_gpio = devm_gpiod_get_optional(&i2c->dev,
922
-						       "spk-con-gpio",
923
-						       GPIOD_OUT_LOW);
924
-	if (IS_ERR(es8323->spk_ctl_gpio))
925
-		return PTR_ERR(es8323->spk_ctl_gpio);
926
-
927
-	es8323->hp_det_gpio = devm_gpiod_get_optional(&i2c->dev, "hp-det-gpio", GPIOD_IN);
928
-	if (IS_ERR(es8323->hp_det_gpio))
929
-		return PTR_ERR(es8323->hp_det_gpio);
930
-
931
-	hp_irq = gpiod_to_irq(es8323->hp_det_gpio);
932
-
933
-	if (hp_irq) {
934
-		ret = devm_request_threaded_irq(&i2c->dev, hp_irq, NULL,
935
-						hp_det_irq_handler,
936
-						IRQ_TYPE_EDGE_BOTH |
937
-						IRQF_ONESHOT,
938
-						"ES8323", es8323);
939
-		if (ret < 0) {
940
-			dev_err(&i2c->dev, "request_irq failed: %d\n", ret);
941
-			return ret;
942
-		}
943
-	}
944
-
945867 	ret = devm_snd_soc_register_component(&i2c->dev,
946868 					      &soc_codec_dev_es8323,
947869 					      &es8323_dai, 1);
948870 	return ret;
871
+}
872
+
873
+static int es8323_i2c_remove(struct i2c_client *client)
874
+{
875
+	snd_soc_unregister_component(&client->dev);
876
+	return 0;
949877 }
950878 
951879 static const struct i2c_device_id es8323_i2c_id[] = {
....@@ -955,23 +883,20 @@
955883 
956884 MODULE_DEVICE_TABLE(i2c, es8323_i2c_id);
957885 
958
-void es8323_i2c_shutdown(struct i2c_client *client)
886
+static void es8323_i2c_shutdown(struct i2c_client *client)
959887 {
960888 	struct es8323_priv *es8323 = i2c_get_clientdata(client);
961
-	struct snd_soc_component *component = es8323->component;
962889 
963
-	es8323_set_gpio(es8323, ES8323_CODEC_SET_SPK, 0);
964
-	mdelay(20);
965
-	snd_soc_component_write(component, ES8323_CONTROL2, 0x58);
966
-	snd_soc_component_write(component, ES8323_CONTROL1, 0x32);
967
-	snd_soc_component_write(component, ES8323_CHIPPOWER, 0xf3);
968
-	snd_soc_component_write(component, ES8323_DACPOWER, 0xc0);
890
+	regmap_write(es8323->regmap, ES8323_CONTROL2, 0x58);
891
+	regmap_write(es8323->regmap, ES8323_CONTROL1, 0x32);
892
+	regmap_write(es8323->regmap, ES8323_CHIPPOWER, 0xf3);
893
+	regmap_write(es8323->regmap, ES8323_DACPOWER, 0xc0);
969894 	mdelay(50);
970
-	snd_soc_component_write(component, ES8323_DACCONTROL26, 0x00);
971
-	snd_soc_component_write(component, ES8323_DACCONTROL27, 0x00);
895
+	regmap_write(es8323->regmap, ES8323_DACCONTROL26, 0x00);
896
+	regmap_write(es8323->regmap, ES8323_DACCONTROL27, 0x00);
972897 	mdelay(50);
973
-	snd_soc_component_write(component, ES8323_CONTROL1, 0x30);
974
-	snd_soc_component_write(component, ES8323_CONTROL1, 0x34);
898
+	regmap_write(es8323->regmap, ES8323_CONTROL1, 0x30);
899
+	regmap_write(es8323->regmap, ES8323_CONTROL1, 0x34);
975900 }
976901 
977902 static const struct of_device_id es8323_of_match[] = {
....@@ -987,6 +912,7 @@
987912 		},
988913 	.shutdown = es8323_i2c_shutdown,
989914 	.probe = es8323_i2c_probe,
915
+	.remove = es8323_i2c_remove,
990916 	.id_table = es8323_i2c_id,
991917 };
992918 module_i2c_driver(es8323_i2c_driver);