~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,3 +1,4 @@
	1	+// SPDX-License-Identifier: GPL-2.0-or-later
1	2	/*
2	3	*
3	4	* hda_intel.c - Implementation of primary alsa driver code base
..	..	@@ -8,20 +9,6 @@
8	9	* Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9	10	* PeiSen Hou <pshou@realtek.com.tw>
10	11	*
11		- * This program is free software; you can redistribute it and/or modify it
12		- * under the terms of the GNU General Public License as published by the Free
13		- * Software Foundation; either version 2 of the License, or (at your option)
14		- * any later version.
15		- *
16		- * This program is distributed in the hope that it will be useful, but WITHOUT
17		- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18		- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19		- * more details.
20		- *
21		- * You should have received a copy of the GNU General Public License along with
22		- * this program; if not, write to the Free Software Foundation, Inc., 59
23		- * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24		- *
25	12	* CONTACTS:
26	13	*
27	14	* Matt Jared matt.jared@intel.com
..	..	@@ -31,7 +18,6 @@
31	18	* CHANGES:
32	19	*
33	20	* 2004.12.01 Major rewrite by tiwai, merged the work of pshou
34		- *
35	21	*/
36	22
37	23	#include <linux/delay.h>
..	..	@@ -49,10 +35,11 @@
49	35	#include <linux/clocksource.h>
50	36	#include <linux/time.h>
51	37	#include <linux/completion.h>
	38	+#include <linux/acpi.h>
	39	+#include <linux/pgtable.h>
52	40
53	41	#ifdef CONFIG_X86
54	42	/* for snoop control */
55		-#include <asm/pgtable.h>
56	43	#include <asm/set_memory.h>
57	44	#include <asm/cpufeature.h>
58	45	#endif
..	..	@@ -60,10 +47,11 @@
60	47	#include <sound/initval.h>
61	48	#include <sound/hdaudio.h>
62	49	#include <sound/hda_i915.h>
	50	+#include <sound/intel-dsp-config.h>
63	51	#include <linux/vgaarb.h>
64	52	#include <linux/vga_switcheroo.h>
65	53	#include <linux/firmware.h>
66		-#include "hda_codec.h"
	54	+#include <sound/hda_codec.h>
67	55	#include "hda_controller.h"
68	56	#include "hda_intel.h"
69	57
..	..	@@ -98,8 +86,6 @@
98	86	#define INTEL_SCH_HDA_DEVC 0x78
99	87	#define INTEL_SCH_HDA_DEVC_NOSNOOP (0x1<<11)
100	88
101		-/* Define IN stream 0 FIFO size offset in VIA controller */
102		-#define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
103	89	/* Define VIA HD Audio Device ID*/
104	90	#define VIA_HDAC_DEVICE_ID 0x3288
105	91
..	..	@@ -139,6 +125,7 @@
139	125	static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
140	126	CONFIG_SND_HDA_INPUT_BEEP_MODE};
141	127	#endif
	128	+static bool dmic_detect = 1;
142	129
143	130	module_param_array(index, int, NULL, 0444);
144	131	MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
..	..	@@ -173,6 +160,10 @@
173	160	MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
174	161	"(0=off, 1=on) (default=1).");
175	162	#endif
	163	+module_param(dmic_detect, bool, 0444);
	164	+MODULE_PARM_DESC(dmic_detect, "Allow DSP driver selection (bypass this driver) "
	165	+ "(0=off, 1=on) (default=1); "
	166	+ "deprecated, use snd-intel-dspcfg.dsp_driver option instead");
176	167
177	168	#ifdef CONFIG_PM
178	169	static int param_set_xint(const char val, const struct kernel_param kp);
..	..	@@ -189,7 +180,7 @@
189	180
190	181	static bool pm_blacklist = true;
191	182	module_param(pm_blacklist, bool, 0644);
192		-MODULE_PARM_DESC(pm_blacklist, "Enable power-management blacklist");
	183	+MODULE_PARM_DESC(pm_blacklist, "Enable power-management denylist");
193	184
194	185	/* reset the HD-audio controller in power save mode.
195	186	* this may give more power-saving, but will take longer time to
..	..	@@ -281,6 +272,7 @@
281	272	AZX_DRIVER_CTX,
282	273	AZX_DRIVER_CTHDA,
283	274	AZX_DRIVER_CMEDIA,
	275	+ AZX_DRIVER_ZHAOXIN,
284	276	AZX_DRIVER_GENERIC,
285	277	AZX_NUM_DRIVERS, /* keep this as last entry */
286	278	};
..	..	@@ -311,38 +303,35 @@
311	303	#define AZX_DCAPS_INTEL_HASWELL \
312	304	(/AZX_DCAPS_ALIGN_BUFSIZE \|/ AZX_DCAPS_COUNT_LPIB_DELAY \|\
313	305	AZX_DCAPS_PM_RUNTIME \| AZX_DCAPS_I915_COMPONENT \|\
314		- AZX_DCAPS_I915_POWERWELL \| AZX_DCAPS_SNOOP_TYPE(SCH))
	306	+ AZX_DCAPS_SNOOP_TYPE(SCH))
315	307
316	308	/* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
317	309	#define AZX_DCAPS_INTEL_BROADWELL \
318	310	(/AZX_DCAPS_ALIGN_BUFSIZE \|/ AZX_DCAPS_POSFIX_LPIB \|\
319	311	AZX_DCAPS_PM_RUNTIME \| AZX_DCAPS_I915_COMPONENT \|\
320		- AZX_DCAPS_I915_POWERWELL \| AZX_DCAPS_SNOOP_TYPE(SCH))
	312	+ AZX_DCAPS_SNOOP_TYPE(SCH))
321	313
322	314	#define AZX_DCAPS_INTEL_BAYTRAIL \
323		- (AZX_DCAPS_INTEL_PCH_BASE \| AZX_DCAPS_I915_COMPONENT \|\
324		- AZX_DCAPS_I915_POWERWELL)
	315	+ (AZX_DCAPS_INTEL_PCH_BASE \| AZX_DCAPS_I915_COMPONENT)
325	316
326	317	#define AZX_DCAPS_INTEL_BRASWELL \
327	318	(AZX_DCAPS_INTEL_PCH_BASE \| AZX_DCAPS_PM_RUNTIME \|\
328		- AZX_DCAPS_I915_COMPONENT \| AZX_DCAPS_I915_POWERWELL)
	319	+ AZX_DCAPS_I915_COMPONENT)
329	320
330	321	#define AZX_DCAPS_INTEL_SKYLAKE \
331	322	(AZX_DCAPS_INTEL_PCH_BASE \| AZX_DCAPS_PM_RUNTIME \|\
332		- AZX_DCAPS_SYNC_WRITE \|\
333		- AZX_DCAPS_SEPARATE_STREAM_TAG \| AZX_DCAPS_I915_COMPONENT \|\
334		- AZX_DCAPS_I915_POWERWELL)
	323	+ AZX_DCAPS_SEPARATE_STREAM_TAG \| AZX_DCAPS_I915_COMPONENT)
335	324
336		-#define AZX_DCAPS_INTEL_BROXTON AZX_DCAPS_INTEL_SKYLAKE
	325	+#define AZX_DCAPS_INTEL_BROXTON AZX_DCAPS_INTEL_SKYLAKE
337	326
338	327	/* quirks for ATI SB / AMD Hudson */
339	328	#define AZX_DCAPS_PRESET_ATI_SB \
340		- (AZX_DCAPS_NO_TCSEL \| AZX_DCAPS_SYNC_WRITE \| AZX_DCAPS_POSFIX_LPIB \|\
	329	+ (AZX_DCAPS_NO_TCSEL \| AZX_DCAPS_POSFIX_LPIB \|\
341	330	AZX_DCAPS_SNOOP_TYPE(ATI))
342	331
343	332	/* quirks for ATI/AMD HDMI */
344	333	#define AZX_DCAPS_PRESET_ATI_HDMI \
345		- (AZX_DCAPS_NO_TCSEL \| AZX_DCAPS_SYNC_WRITE \| AZX_DCAPS_POSFIX_LPIB\|\
	334	+ (AZX_DCAPS_NO_TCSEL \| AZX_DCAPS_POSFIX_LPIB\|\
346	335	AZX_DCAPS_NO_MSI64)
347	336
348	337	/* quirks for ATI HDMI with snoop off */
..	..	@@ -351,8 +340,9 @@
351	340
352	341	/* quirks for AMD SB */
353	342	#define AZX_DCAPS_PRESET_AMD_SB \
354		- (AZX_DCAPS_NO_TCSEL \| AZX_DCAPS_SYNC_WRITE \| AZX_DCAPS_AMD_WORKAROUND \|\
355		- AZX_DCAPS_SNOOP_TYPE(ATI) \| AZX_DCAPS_PM_RUNTIME)
	343	+ (AZX_DCAPS_NO_TCSEL \| AZX_DCAPS_AMD_WORKAROUND \|\
	344	+ AZX_DCAPS_SNOOP_TYPE(ATI) \| AZX_DCAPS_PM_RUNTIME \|\
	345	+ AZX_DCAPS_RETRY_PROBE)
356	346
357	347	/* quirks for Nvidia */
358	348	#define AZX_DCAPS_PRESET_NVIDIA \
..	..	@@ -369,7 +359,7 @@
369	359	*/
370	360	#ifdef SUPPORT_VGA_SWITCHEROO
371	361	#define use_vga_switcheroo(chip) ((chip)->use_vga_switcheroo)
372		-#define needs_eld_notify_link(chip) ((chip)->need_eld_notify_link)
	362	+#define needs_eld_notify_link(chip) ((chip)->bus.keep_power)
373	363	#else
374	364	#define use_vga_switcheroo(chip) 0
375	365	#define needs_eld_notify_link(chip) false
..	..	@@ -378,13 +368,15 @@
378	368	#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) \|\| \
379	369	((pci)->device == 0x0c0c) \|\| \
380	370	((pci)->device == 0x0d0c) \|\| \
381		- ((pci)->device == 0x160c))
	371	+ ((pci)->device == 0x160c) \|\| \
	372	+ ((pci)->device == 0x490d) \|\| \
	373	+ ((pci)->device == 0x4f90) \|\| \
	374	+ ((pci)->device == 0x4f91) \|\| \
	375	+ ((pci)->device == 0x4f92))
382	376
383	377	#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
384		-#define IS_CFL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa348)
385		-#define IS_CNL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9dc8)
386	378
387		-static char *driver_short_names[] = {
	379	+static const char * const driver_short_names[] = {
388	380	[AZX_DRIVER_ICH] = "HDA Intel",
389	381	[AZX_DRIVER_PCH] = "HDA Intel PCH",
390	382	[AZX_DRIVER_SCH] = "HDA Intel MID",
..	..	@@ -401,63 +393,9 @@
401	393	[AZX_DRIVER_CTX] = "HDA Creative",
402	394	[AZX_DRIVER_CTHDA] = "HDA Creative",
403	395	[AZX_DRIVER_CMEDIA] = "HDA C-Media",
	396	+ [AZX_DRIVER_ZHAOXIN] = "HDA Zhaoxin",
404	397	[AZX_DRIVER_GENERIC] = "HD-Audio Generic",
405	398	};
406		-
407		-#ifdef CONFIG_X86
408		-static void __mark_pages_wc(struct azx chip, struct snd_dma_buffer dmab, bool on)
409		-{
410		- int pages;
411		-
412		- if (azx_snoop(chip))
413		- return;
414		- if (!dmab \|\| !dmab->area \|\| !dmab->bytes)
415		- return;
416		-
417		-#ifdef CONFIG_SND_DMA_SGBUF
418		- if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
419		- struct snd_sg_buf *sgbuf = dmab->private_data;
420		- if (!chip->uc_buffer)
421		- return; /* deal with only CORB/RIRB buffers */
422		- if (on)
423		- set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
424		- else
425		- set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
426		- return;
427		- }
428		-#endif
429		-
430		- pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
431		- if (on)
432		- set_memory_wc((unsigned long)dmab->area, pages);
433		- else
434		- set_memory_wb((unsigned long)dmab->area, pages);
435		-}
436		-
437		-static inline void mark_pages_wc(struct azx chip, struct snd_dma_buffer buf,
438		- bool on)
439		-{
440		- __mark_pages_wc(chip, buf, on);
441		-}
442		-static inline void mark_runtime_wc(struct azx chip, struct azx_dev azx_dev,
443		- struct snd_pcm_substream *substream, bool on)
444		-{
445		- if (azx_dev->wc_marked != on) {
446		- __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
447		- azx_dev->wc_marked = on;
448		- }
449		-}
450		-#else
451		-/* NOP for other archs */
452		-static inline void mark_pages_wc(struct azx chip, struct snd_dma_buffer buf,
453		- bool on)
454		-{
455		-}
456		-static inline void mark_runtime_wc(struct azx chip, struct azx_dev azx_dev,
457		- struct snd_pcm_substream *substream, bool on)
458		-{
459		-}
460		-#endif
461	399
462	400	static int azx_acquire_irq(struct azx *chip, int do_disconnect);
463	401	static void set_default_power_save(struct azx *chip);
..	..	@@ -565,7 +503,7 @@
565	503	static int intel_get_lctl_scf(struct azx *chip)
566	504	{
567	505	struct hdac_bus *bus = azx_bus(chip);
568		- static int preferred_bits[] = { 2, 3, 1, 4, 5 };
	506	+ static const int preferred_bits[] = { 2, 3, 1, 4, 5 };
569	507	u32 val, t;
570	508	int i;
571	509
..	..	@@ -651,8 +589,7 @@
651	589	struct pci_dev *pci = chip->pci;
652	590	u32 val;
653	591
654		- if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
655		- snd_hdac_set_codec_wakeup(bus, true);
	592	+ snd_hdac_set_codec_wakeup(bus, true);
656	593	if (chip->driver_type == AZX_DRIVER_SKL) {
657	594	pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
658	595	val = val & ~INTEL_HDA_CGCTL_MISCBDCGE;
..	..	@@ -664,8 +601,8 @@
664	601	val = val \| INTEL_HDA_CGCTL_MISCBDCGE;
665	602	pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
666	603	}
667		- if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
668		- snd_hdac_set_codec_wakeup(bus, false);
	604	+
	605	+ snd_hdac_set_codec_wakeup(bus, false);
669	606
670	607	/* reduce dma latency to avoid noise */
671	608	if (IS_BXT(pci))
..	..	@@ -727,13 +664,8 @@
727	664	return 0;
728	665	}
729	666
730		-/* Enable/disable i915 display power for the link */
731		-static int azx_intel_link_power(struct azx *chip, bool enable)
732		-{
733		- struct hdac_bus *bus = azx_bus(chip);
734		-
735		- return snd_hdac_display_power(bus, enable);
736		-}
	667	+#define display_power(chip, enable) \
	668	+ snd_hdac_display_power(azx_bus(chip), HDA_CODEC_IDX_CONTROLLER, enable)
737	669
738	670	/*
739	671	* Check whether the current DMA position is acceptable for updating
..	..	@@ -885,6 +817,7 @@
885	817	return -1;
886	818	}
887	819	bus->irq = chip->pci->irq;
	820	+ chip->card->sync_irq = bus->irq;
888	821	pci_intx(chip->pci, !chip->msi);
889	822	return 0;
890	823	}
..	..	@@ -910,11 +843,7 @@
910	843	mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
911	844	mod_dma_pos %= azx_dev->core.period_bytes;
912	845
913		- /* azx_dev->fifo_size can't get FIFO size of in stream.
914		- * Get from base address + offset.
915		- */
916		- fifo_size = readw(azx_bus(chip)->remap_addr +
917		- VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
	846	+ fifo_size = azx_stream(azx_dev)->fifo_size - 1;
918	847
919	848	if (azx_dev->insufficient) {
920	849	/* Link position never gather than FIFO size */
..	..	@@ -989,30 +918,23 @@
989	918	return substream->runtime->delay;
990	919	}
991	920
992		-static unsigned int azx_skl_get_dpib_pos(struct azx *chip,
993		- struct azx_dev *azx_dev)
	921	+static void __azx_shutdown_chip(struct azx *chip, bool skip_link_reset)
994	922	{
995		- return _snd_hdac_chip_readl(azx_bus(chip),
996		- AZX_REG_VS_SDXDPIB_XBASE +
997		- (AZX_REG_VS_SDXDPIB_XINTERVAL *
998		- azx_dev->core.index));
999		-}
1000		-
1001		-/* get the current DMA position with correction on SKL+ chips */
1002		-static unsigned int azx_get_pos_skl(struct azx chip, struct azx_dev azx_dev)
1003		-{
1004		- /* DPIB register gives a more accurate position for playback */
1005		- if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1006		- return azx_skl_get_dpib_pos(chip, azx_dev);
1007		-
1008		- /* read of DPIB fetches the actual posbuf */
1009		- azx_skl_get_dpib_pos(chip, azx_dev);
1010		- return azx_get_pos_posbuf(chip, azx_dev);
	923	+ azx_stop_chip(chip);
	924	+ if (!skip_link_reset)
	925	+ azx_enter_link_reset(chip);
	926	+ azx_clear_irq_pending(chip);
	927	+ display_power(chip, false);
1011	928	}
1012	929
1013	930	#ifdef CONFIG_PM
1014	931	static DEFINE_MUTEX(card_list_lock);
1015	932	static LIST_HEAD(card_list);
	933	+
	934	+static void azx_shutdown_chip(struct azx *chip)
	935	+{
	936	+ __azx_shutdown_chip(chip, false);
	937	+}
1016	938
1017	939	static void azx_add_card_list(struct azx *chip)
1018	940	{
..	..	@@ -1051,45 +973,111 @@
1051	973	mutex_unlock(&card_list_lock);
1052	974	return 0;
1053	975	}
1054		-#else
1055		-#define azx_add_card_list(chip) /* NOP */
1056		-#define azx_del_card_list(chip) /* NOP */
1057		-#endif /* CONFIG_PM */
1058	976
1059		-#ifdef CONFIG_PM_SLEEP
1060	977	/*
1061	978	* power management
1062	979	*/
	980	+static bool azx_is_pm_ready(struct snd_card *card)
	981	+{
	982	+ struct azx *chip;
	983	+ struct hda_intel *hda;
	984	+
	985	+ if (!card)
	986	+ return false;
	987	+ chip = card->private_data;
	988	+ hda = container_of(chip, struct hda_intel, chip);
	989	+ if (chip->disabled \|\| hda->init_failed \|\| !chip->running)
	990	+ return false;
	991	+ return true;
	992	+}
	993	+
	994	+static void __azx_runtime_resume(struct azx *chip)
	995	+{
	996	+ struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
	997	+ struct hdac_bus *bus = azx_bus(chip);
	998	+ struct hda_codec *codec;
	999	+ int status;
	1000	+
	1001	+ display_power(chip, true);
	1002	+ if (hda->need_i915_power)
	1003	+ snd_hdac_i915_set_bclk(bus);
	1004	+
	1005	+ /* Read STATESTS before controller reset */
	1006	+ status = azx_readw(chip, STATESTS);
	1007	+
	1008	+ azx_init_pci(chip);
	1009	+ hda_intel_init_chip(chip, true);
	1010	+
	1011	+ /* Avoid codec resume if runtime resume is for system suspend */
	1012	+ if (!chip->pm_prepared) {
	1013	+ list_for_each_codec(codec, &chip->bus) {
	1014	+ if (codec->relaxed_resume)
	1015	+ continue;
	1016	+
	1017	+ if (codec->forced_resume \|\| (status & (1 << codec->addr)))
	1018	+ pm_request_resume(hda_codec_dev(codec));
	1019	+ }
	1020	+ }
	1021	+
	1022	+ /* power down again for link-controlled chips */
	1023	+ if (!hda->need_i915_power)
	1024	+ display_power(chip, false);
	1025	+}
	1026	+
	1027	+#ifdef CONFIG_PM_SLEEP
	1028	+static int azx_prepare(struct device *dev)
	1029	+{
	1030	+ struct snd_card *card = dev_get_drvdata(dev);
	1031	+ struct azx *chip;
	1032	+
	1033	+ if (!azx_is_pm_ready(card))
	1034	+ return 0;
	1035	+
	1036	+ chip = card->private_data;
	1037	+ chip->pm_prepared = 1;
	1038	+ snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
	1039	+
	1040	+ flush_work(&azx_bus(chip)->unsol_work);
	1041	+
	1042	+ /* HDA controller always requires different WAKEEN for runtime suspend
	1043	+ * and system suspend, so don't use direct-complete here.
	1044	+ */
	1045	+ return 0;
	1046	+}
	1047	+
	1048	+static void azx_complete(struct device *dev)
	1049	+{
	1050	+ struct snd_card *card = dev_get_drvdata(dev);
	1051	+ struct azx *chip;
	1052	+
	1053	+ if (!azx_is_pm_ready(card))
	1054	+ return;
	1055	+
	1056	+ chip = card->private_data;
	1057	+ snd_power_change_state(card, SNDRV_CTL_POWER_D0);
	1058	+ chip->pm_prepared = 0;
	1059	+}
	1060	+
1063	1061	static int azx_suspend(struct device *dev)
1064	1062	{
1065	1063	struct snd_card *card = dev_get_drvdata(dev);
1066	1064	struct azx *chip;
1067		- struct hda_intel *hda;
1068	1065	struct hdac_bus *bus;
1069	1066
1070		- if (!card)
	1067	+ if (!azx_is_pm_ready(card))
1071	1068	return 0;
1072	1069
1073	1070	chip = card->private_data;
1074		- hda = container_of(chip, struct hda_intel, chip);
1075		- if (chip->disabled \|\| hda->init_failed \|\| !chip->running)
1076		- return 0;
1077		-
1078	1071	bus = azx_bus(chip);
1079		- snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1080		- azx_clear_irq_pending(chip);
1081		- azx_stop_chip(chip);
1082		- azx_enter_link_reset(chip);
	1072	+ azx_shutdown_chip(chip);
1083	1073	if (bus->irq >= 0) {
1084	1074	free_irq(bus->irq, chip);
1085	1075	bus->irq = -1;
	1076	+ chip->card->sync_irq = -1;
1086	1077	}
1087	1078
1088	1079	if (chip->msi)
1089	1080	pci_disable_msi(chip->pci);
1090		- if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1091		- && hda->need_i915_power)
1092		- snd_hdac_display_power(bus, false);
1093	1081
1094	1082	trace_azx_suspend(chip);
1095	1083	return 0;
..	..	@@ -1097,42 +1085,20 @@
1097	1085
1098	1086	static int azx_resume(struct device *dev)
1099	1087	{
1100		- struct pci_dev *pci = to_pci_dev(dev);
1101	1088	struct snd_card *card = dev_get_drvdata(dev);
1102	1089	struct azx *chip;
1103		- struct hda_intel *hda;
1104		- struct hdac_bus *bus;
1105	1090
1106		- if (!card)
	1091	+ if (!azx_is_pm_ready(card))
1107	1092	return 0;
1108	1093
1109	1094	chip = card->private_data;
1110		- hda = container_of(chip, struct hda_intel, chip);
1111		- bus = azx_bus(chip);
1112		- if (chip->disabled \|\| hda->init_failed \|\| !chip->running)
1113		- return 0;
1114		-
1115		- if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1116		- snd_hdac_display_power(bus, true);
1117		- if (hda->need_i915_power)
1118		- snd_hdac_i915_set_bclk(bus);
1119		- }
1120		-
1121	1095	if (chip->msi)
1122		- if (pci_enable_msi(pci) < 0)
	1096	+ if (pci_enable_msi(chip->pci) < 0)
1123	1097	chip->msi = 0;
1124	1098	if (azx_acquire_irq(chip, 1) < 0)
1125	1099	return -EIO;
1126		- azx_init_pci(chip);
1127	1100
1128		- hda_intel_init_chip(chip, true);
1129		-
1130		- /* power down again for link-controlled chips */
1131		- if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
1132		- !hda->need_i915_power)
1133		- snd_hdac_display_power(bus, false);
1134		-
1135		- snd_power_change_state(card, SNDRV_CTL_POWER_D0);
	1101	+ __azx_runtime_resume(chip);
1136	1102
1137	1103	trace_azx_resume(chip);
1138	1104	return 0;
..	..	@@ -1147,6 +1113,8 @@
1147	1113	struct azx *chip = card->private_data;
1148	1114	struct pci_dev *pci = to_pci_dev(dev);
1149	1115
	1116	+ if (!azx_is_pm_ready(card))
	1117	+ return 0;
1150	1118	if (chip->driver_type == AZX_DRIVER_SKL)
1151	1119	pci_set_power_state(pci, PCI_D3hot);
1152	1120
..	..	@@ -1159,6 +1127,8 @@
1159	1127	struct azx *chip = card->private_data;
1160	1128	struct pci_dev *pci = to_pci_dev(dev);
1161	1129
	1130	+ if (!azx_is_pm_ready(card))
	1131	+ return 0;
1162	1132	if (chip->driver_type == AZX_DRIVER_SKL)
1163	1133	pci_set_power_state(pci, PCI_D0);
1164	1134
..	..	@@ -1166,35 +1136,19 @@
1166	1136	}
1167	1137	#endif /* CONFIG_PM_SLEEP */
1168	1138
1169		-#ifdef CONFIG_PM
1170	1139	static int azx_runtime_suspend(struct device *dev)
1171	1140	{
1172	1141	struct snd_card *card = dev_get_drvdata(dev);
1173	1142	struct azx *chip;
1174		- struct hda_intel *hda;
1175	1143
1176		- if (!card)
	1144	+ if (!azx_is_pm_ready(card))
1177	1145	return 0;
1178		-
1179	1146	chip = card->private_data;
1180		- hda = container_of(chip, struct hda_intel, chip);
1181		- if (chip->disabled \|\| hda->init_failed)
1182		- return 0;
1183		-
1184		- if (!azx_has_pm_runtime(chip))
1185		- return 0;
1186	1147
1187	1148	/* enable controller wake up event */
1188		- azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) \|
1189		- STATESTS_INT_MASK);
	1149	+ azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) \| STATESTS_INT_MASK);
1190	1150
1191		- azx_stop_chip(chip);
1192		- azx_enter_link_reset(chip);
1193		- azx_clear_irq_pending(chip);
1194		- if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1195		- && hda->need_i915_power)
1196		- snd_hdac_display_power(azx_bus(chip), false);
1197		-
	1151	+ azx_shutdown_chip(chip);
1198	1152	trace_azx_runtime_suspend(chip);
1199	1153	return 0;
1200	1154	}
..	..	@@ -1203,50 +1157,14 @@
1203	1157	{
1204	1158	struct snd_card *card = dev_get_drvdata(dev);
1205	1159	struct azx *chip;
1206		- struct hda_intel *hda;
1207		- struct hdac_bus *bus;
1208		- struct hda_codec *codec;
1209		- int status;
1210	1160
1211		- if (!card)
	1161	+ if (!azx_is_pm_ready(card))
1212	1162	return 0;
1213		-
1214	1163	chip = card->private_data;
1215		- hda = container_of(chip, struct hda_intel, chip);
1216		- bus = azx_bus(chip);
1217		- if (chip->disabled \|\| hda->init_failed)
1218		- return 0;
1219		-
1220		- if (!azx_has_pm_runtime(chip))
1221		- return 0;
1222		-
1223		- if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1224		- snd_hdac_display_power(bus, true);
1225		- if (hda->need_i915_power)
1226		- snd_hdac_i915_set_bclk(bus);
1227		- }
1228		-
1229		- /* Read STATESTS before controller reset */
1230		- status = azx_readw(chip, STATESTS);
1231		-
1232		- azx_init_pci(chip);
1233		- hda_intel_init_chip(chip, true);
1234		-
1235		- if (status) {
1236		- list_for_each_codec(codec, &chip->bus)
1237		- if (status & (1 << codec->addr))
1238		- schedule_delayed_work(&codec->jackpoll_work,
1239		- codec->jackpoll_interval);
1240		- }
	1164	+ __azx_runtime_resume(chip);
1241	1165
1242	1166	/* disable controller Wake Up event*/
1243		- azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
1244		- ~STATESTS_INT_MASK);
1245		-
1246		- /* power down again for link-controlled chips */
1247		- if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
1248		- !hda->need_i915_power)
1249		- snd_hdac_display_power(bus, false);
	1167	+ azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) & ~STATESTS_INT_MASK);
1250	1168
1251	1169	trace_azx_runtime_resume(chip);
1252	1170	return 0;
..	..	@@ -1271,7 +1189,7 @@
1271	1189	return -EBUSY;
1272	1190
1273	1191	/* ELD notification gets broken when HD-audio bus is off */
1274		- if (needs_eld_notify_link(hda))
	1192	+ if (needs_eld_notify_link(chip))
1275	1193	return -EBUSY;
1276	1194
1277	1195	return 0;
..	..	@@ -1280,6 +1198,8 @@
1280	1198	static const struct dev_pm_ops azx_pm = {
1281	1199	SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
1282	1200	#ifdef CONFIG_PM_SLEEP
	1201	+ .prepare = azx_prepare,
	1202	+ .complete = azx_complete,
1283	1203	.freeze_noirq = azx_freeze_noirq,
1284	1204	.thaw_noirq = azx_thaw_noirq,
1285	1205	#endif
..	..	@@ -1288,6 +1208,8 @@
1288	1208
1289	1209	#define AZX_PM_OPS &azx_pm
1290	1210	#else
	1211	+#define azx_add_card_list(chip) /* NOP */
	1212	+#define azx_del_card_list(chip) /* NOP */
1291	1213	#define AZX_PM_OPS NULL
1292	1214	#endif /* CONFIG_PM */
1293	1215
..	..	@@ -1319,10 +1241,8 @@
1319	1241	if (!disabled) {
1320	1242	dev_info(chip->card->dev,
1321	1243	"Start delayed initialization\n");
1322		- if (azx_probe_continue(chip) < 0) {
	1244	+ if (azx_probe_continue(chip) < 0)
1323	1245	dev_err(chip->card->dev, "initialization error\n");
1324		- hda->init_failed = true;
1325		- }
1326	1246	}
1327	1247	} else {
1328	1248	dev_info(chip->card->dev, "%s via vga_switcheroo\n",
..	..	@@ -1380,7 +1300,7 @@
1380	1300	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1381	1301	struct hda_codec *codec;
1382	1302
1383		- if (hda->use_vga_switcheroo && !hda->need_eld_notify_link) {
	1303	+ if (hda->use_vga_switcheroo && !needs_eld_notify_link(chip)) {
1384	1304	list_for_each_codec(codec, &chip->bus)
1385	1305	codec->auto_runtime_pm = 1;
1386	1306	/* reset the power save setup */
..	..	@@ -1394,10 +1314,9 @@
1394	1314	{
1395	1315	struct snd_card *card = pci_get_drvdata(pci);
1396	1316	struct azx *chip = card->private_data;
1397		- struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1398	1317
1399	1318	if (client_id == VGA_SWITCHEROO_DIS)
1400		- hda->need_eld_notify_link = 0;
	1319	+ chip->bus.keep_power = 0;
1401	1320	setup_vga_switcheroo_runtime_pm(chip);
1402	1321	}
1403	1322
..	..	@@ -1405,11 +1324,17 @@
1405	1324	{
1406	1325	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1407	1326	struct pci_dev *p = get_bound_vga(chip->pci);
	1327	+ struct pci_dev *parent;
1408	1328	if (p) {
1409	1329	dev_info(chip->card->dev,
1410	1330	"Handle vga_switcheroo audio client\n");
1411	1331	hda->use_vga_switcheroo = 1;
1412		- hda->need_eld_notify_link = 1; /* cleared in gpu_bound op */
	1332	+
	1333	+ /* cleared in either gpu_bound op or codec probe, or when its
	1334	+ * upstream port has _PR3 (i.e. dGPU).
	1335	+ */
	1336	+ parent = pci_upstream_bridge(p);
	1337	+ chip->bus.keep_power = parent ? !pci_pr3_present(parent) : 1;
1413	1338	chip->driver_caps \|= AZX_DCAPS_PM_RUNTIME;
1414	1339	pci_dev_put(p);
1415	1340	}
..	..	@@ -1450,11 +1375,14 @@
1450	1375	/*
1451	1376	* destructor
1452	1377	*/
1453		-static int azx_free(struct azx *chip)
	1378	+static void azx_free(struct azx *chip)
1454	1379	{
1455	1380	struct pci_dev *pci = chip->pci;
1456	1381	struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1457	1382	struct hdac_bus *bus = azx_bus(chip);
	1383	+
	1384	+ if (hda->freed)
	1385	+ return;
1458	1386
1459	1387	if (azx_has_pm_runtime(chip) && chip->running)
1460	1388	pm_runtime_get_noresume(&pci->dev);
..	..	@@ -1495,16 +1423,12 @@
1495	1423	#ifdef CONFIG_SND_HDA_PATCH_LOADER
1496	1424	release_firmware(chip->fw);
1497	1425	#endif
	1426	+ display_power(chip, false);
1498	1427
1499		- if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1500		- if (hda->need_i915_power)
1501		- snd_hdac_display_power(bus, false);
1502		- }
1503	1428	if (chip->driver_caps & AZX_DCAPS_I915_COMPONENT)
1504	1429	snd_hdac_i915_exit(bus);
1505		- kfree(hda);
1506	1430
1507		- return 0;
	1431	+ hda->freed = 1;
1508	1432	}
1509	1433
1510	1434	static int azx_dev_disconnect(struct snd_device *device)
..	..	@@ -1520,10 +1444,48 @@
1520	1444
1521	1445	static int azx_dev_free(struct snd_device *device)
1522	1446	{
1523		- return azx_free(device->device_data);
	1447	+ azx_free(device->device_data);
	1448	+ return 0;
1524	1449	}
1525	1450
1526	1451	#ifdef SUPPORT_VGA_SWITCHEROO
	1452	+#ifdef CONFIG_ACPI
	1453	+/* ATPX is in the integrated GPU's namespace */
	1454	+static bool atpx_present(void)
	1455	+{
	1456	+ struct pci_dev *pdev = NULL;
	1457	+ acpi_handle dhandle, atpx_handle;
	1458	+ acpi_status status;
	1459	+
	1460	+ while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
	1461	+ dhandle = ACPI_HANDLE(&pdev->dev);
	1462	+ if (dhandle) {
	1463	+ status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
	1464	+ if (!ACPI_FAILURE(status)) {
	1465	+ pci_dev_put(pdev);
	1466	+ return true;
	1467	+ }
	1468	+ }
	1469	+ }
	1470	+ while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
	1471	+ dhandle = ACPI_HANDLE(&pdev->dev);
	1472	+ if (dhandle) {
	1473	+ status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
	1474	+ if (!ACPI_FAILURE(status)) {
	1475	+ pci_dev_put(pdev);
	1476	+ return true;
	1477	+ }
	1478	+ }
	1479	+ }
	1480	+ return false;
	1481	+}
	1482	+#else
	1483	+static bool atpx_present(void)
	1484	+{
	1485	+ return false;
	1486	+}
	1487	+#endif
	1488	+
1527	1489	/*
1528	1490	* Check of disabled HDMI controller by vga_switcheroo
1529	1491	*/
..	..	@@ -1535,6 +1497,22 @@
1535	1497	switch (pci->vendor) {
1536	1498	case PCI_VENDOR_ID_ATI:
1537	1499	case PCI_VENDOR_ID_AMD:
	1500	+ if (pci->devfn == 1) {
	1501	+ p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
	1502	+ pci->bus->number, 0);
	1503	+ if (p) {
	1504	+ /* ATPX is in the integrated GPU's ACPI namespace
	1505	+ * rather than the dGPU's namespace. However,
	1506	+ * the dGPU is the one who is involved in
	1507	+ * vgaswitcheroo.
	1508	+ */
	1509	+ if (((p->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
	1510	+ atpx_present())
	1511	+ return p;
	1512	+ pci_dev_put(p);
	1513	+ }
	1514	+ }
	1515	+ break;
1538	1516	case PCI_VENDOR_ID_NVIDIA:
1539	1517	if (pci->devfn == 1) {
1540	1518	p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
..	..	@@ -1565,9 +1543,9 @@
1565	1543	#endif /* SUPPORT_VGA_SWITCHEROO */
1566	1544
1567	1545	/*
1568		- * white/black-listing for position_fix
	1546	+ * allow/deny-listing for position_fix
1569	1547	*/
1570		-static struct snd_pci_quirk position_fix_list[] = {
	1548	+static const struct snd_pci_quirk position_fix_list[] = {
1571	1549	SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1572	1550	SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1573	1551	SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
..	..	@@ -1630,13 +1608,13 @@
1630	1608
1631	1609	static void assign_position_fix(struct azx *chip, int fix)
1632	1610	{
1633		- static azx_get_pos_callback_t callbacks[] = {
	1611	+ static const azx_get_pos_callback_t callbacks[] = {
1634	1612	[POS_FIX_AUTO] = NULL,
1635	1613	[POS_FIX_LPIB] = azx_get_pos_lpib,
1636	1614	[POS_FIX_POSBUF] = azx_get_pos_posbuf,
1637	1615	[POS_FIX_VIACOMBO] = azx_via_get_position,
1638	1616	[POS_FIX_COMBO] = azx_get_pos_lpib,
1639		- [POS_FIX_SKL] = azx_get_pos_skl,
	1617	+ [POS_FIX_SKL] = azx_get_pos_posbuf,
1640	1618	[POS_FIX_FIFO] = azx_get_pos_fifo,
1641	1619	};
1642	1620
..	..	@@ -1658,9 +1636,9 @@
1658	1636	}
1659	1637
1660	1638	/*
1661		- * black-lists for probe_mask
	1639	+ * deny-lists for probe_mask
1662	1640	*/
1663		-static struct snd_pci_quirk probe_mask_list[] = {
	1641	+static const struct snd_pci_quirk probe_mask_list[] = {
1664	1642	/* Thinkpad often breaks the controller communication when accessing
1665	1643	* to the non-working (or non-existing) modem codec slot.
1666	1644	*/
..	..	@@ -1707,9 +1685,9 @@
1707	1685	}
1708	1686
1709	1687	/*
1710		- * white/black-list for enable_msi
	1688	+ * allow/deny-list for enable_msi
1711	1689	*/
1712		-static struct snd_pci_quirk msi_black_list[] = {
	1690	+static const struct snd_pci_quirk msi_deny_list[] = {
1713	1691	SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1714	1692	SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1715	1693	SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
..	..	@@ -1732,7 +1710,7 @@
1732	1710	return;
1733	1711	}
1734	1712	chip->msi = 1; /* enable MSI as default */
1735		- q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
	1713	+ q = snd_pci_quirk_lookup(chip->pci, msi_deny_list);
1736	1714	if (q) {
1737	1715	dev_info(chip->card->dev,
1738	1716	"msi for device %04x:%04x set to %d\n",
..	..	@@ -1788,7 +1766,7 @@
1788	1766
1789	1767	static void azx_probe_work(struct work_struct *work)
1790	1768	{
1791		- struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
	1769	+ struct hda_intel *hda = container_of(work, struct hda_intel, probe_work.work);
1792	1770	azx_probe_continue(&hda->chip);
1793	1771	}
1794	1772
..	..	@@ -1815,14 +1793,13 @@
1815	1793	/*
1816	1794	* constructor
1817	1795	*/
1818		-static const struct hdac_io_ops pci_hda_io_ops;
1819	1796	static const struct hda_controller_ops pci_hda_ops;
1820	1797
1821	1798	static int azx_create(struct snd_card card, struct pci_dev pci,
1822	1799	int dev, unsigned int driver_caps,
1823	1800	struct azx **rchip)
1824	1801	{
1825		- static struct snd_device_ops ops = {
	1802	+ static const struct snd_device_ops ops = {
1826	1803	.dev_disconnect = azx_dev_disconnect,
1827	1804	.dev_free = azx_dev_free,
1828	1805	};
..	..	@@ -1836,7 +1813,7 @@
1836	1813	if (err < 0)
1837	1814	return err;
1838	1815
1839		- hda = kzalloc(sizeof(*hda), GFP_KERNEL);
	1816	+ hda = devm_kzalloc(&pci->dev, sizeof(*hda), GFP_KERNEL);
1840	1817	if (!hda) {
1841	1818	pci_disable_device(pci);
1842	1819	return -ENOMEM;
..	..	@@ -1851,7 +1828,8 @@
1851	1828	chip->driver_type = driver_caps & 0xff;
1852	1829	check_msi(chip);
1853	1830	chip->dev_index = dev;
1854		- chip->jackpoll_ms = jackpoll_ms;
	1831	+ if (jackpoll_ms[dev] >= 50 && jackpoll_ms[dev] <= 60000)
	1832	+ chip->jackpoll_interval = msecs_to_jiffies(jackpoll_ms[dev]);
1855	1833	INIT_LIST_HEAD(&chip->pcm_list);
1856	1834	INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1857	1835	INIT_LIST_HEAD(&hda->list);
..	..	@@ -1872,20 +1850,19 @@
1872	1850	else
1873	1851	chip->bdl_pos_adj = bdl_pos_adj[dev];
1874	1852
1875		- /* Workaround for a communication error on CFL (bko#199007) and CNL */
1876		- if (IS_CFL(pci) \|\| IS_CNL(pci))
1877		- chip->polling_mode = 1;
1878		-
1879		- err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
	1853	+ err = azx_bus_init(chip, model[dev]);
1880	1854	if (err < 0) {
1881		- kfree(hda);
1882	1855	pci_disable_device(pci);
1883	1856	return err;
1884	1857	}
1885	1858
	1859	+ /* use the non-cached pages in non-snoop mode */
	1860	+ if (!azx_snoop(chip))
	1861	+ azx_bus(chip)->dma_type = SNDRV_DMA_TYPE_DEV_UC;
	1862	+
1886	1863	if (chip->driver_type == AZX_DRIVER_NVIDIA) {
1887	1864	dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
1888		- chip->bus.needs_damn_long_delay = 1;
	1865	+ chip->bus.core.needs_damn_long_delay = 1;
1889	1866	}
1890	1867
1891	1868	check_probe_mask(chip, dev);
..	..	@@ -1898,7 +1875,7 @@
1898	1875	}
1899	1876
1900	1877	/* continue probing in work context as may trigger request module */
1901		- INIT_WORK(&hda->probe_work, azx_probe_work);
	1878	+ INIT_DELAYED_WORK(&hda->probe_work, azx_probe_work);
1902	1879
1903	1880	*rchip = chip;
1904	1881
..	..	@@ -1963,7 +1940,6 @@
1963	1940	}
1964	1941
1965	1942	pci_set_master(pci);
1966		- synchronize_irq(bus->irq);
1967	1943
1968	1944	gcap = azx_readw(chip, GCAP);
1969	1945	dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
..	..	@@ -2065,8 +2041,7 @@
2065	2041	/* initialize chip */
2066	2042	azx_init_pci(chip);
2067	2043
2068		- if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
2069		- snd_hdac_i915_set_bclk(bus);
	2044	+ snd_hdac_i915_set_bclk(bus);
2070	2045
2071	2046	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
2072	2047
..	..	@@ -2107,41 +2082,6 @@
2107	2082	}
2108	2083	#endif
2109	2084
2110		-/*
2111		- * HDA controller ops.
2112		- */
2113		-
2114		-/* PCI register access. */
2115		-static void pci_azx_writel(u32 value, u32 __iomem *addr)
2116		-{
2117		- writel(value, addr);
2118		-}
2119		-
2120		-static u32 pci_azx_readl(u32 __iomem *addr)
2121		-{
2122		- return readl(addr);
2123		-}
2124		-
2125		-static void pci_azx_writew(u16 value, u16 __iomem *addr)
2126		-{
2127		- writew(value, addr);
2128		-}
2129		-
2130		-static u16 pci_azx_readw(u16 __iomem *addr)
2131		-{
2132		- return readw(addr);
2133		-}
2134		-
2135		-static void pci_azx_writeb(u8 value, u8 __iomem *addr)
2136		-{
2137		- writeb(value, addr);
2138		-}
2139		-
2140		-static u8 pci_azx_readb(u8 __iomem *addr)
2141		-{
2142		- return readb(addr);
2143		-}
2144		-
2145	2085	static int disable_msi_reset_irq(struct azx *chip)
2146	2086	{
2147	2087	struct hdac_bus *bus = azx_bus(chip);
..	..	@@ -2149,6 +2089,7 @@
2149	2089
2150	2090	free_irq(bus->irq, chip);
2151	2091	bus->irq = -1;
	2092	+ chip->card->sync_irq = -1;
2152	2093	pci_disable_msi(chip->pci);
2153	2094	chip->msi = 0;
2154	2095	err = azx_acquire_irq(chip, 1);
..	..	@@ -2156,55 +2097,6 @@
2156	2097	return err;
2157	2098
2158	2099	return 0;
2159		-}
2160		-
2161		-/* DMA page allocation helpers. */
2162		-static int dma_alloc_pages(struct hdac_bus *bus,
2163		- int type,
2164		- size_t size,
2165		- struct snd_dma_buffer *buf)
2166		-{
2167		- struct azx *chip = bus_to_azx(bus);
2168		- int err;
2169		-
2170		- err = snd_dma_alloc_pages(type,
2171		- bus->dev,
2172		- size, buf);
2173		- if (err < 0)
2174		- return err;
2175		- mark_pages_wc(chip, buf, true);
2176		- return 0;
2177		-}
2178		-
2179		-static void dma_free_pages(struct hdac_bus bus, struct snd_dma_buffer buf)
2180		-{
2181		- struct azx *chip = bus_to_azx(bus);
2182		-
2183		- mark_pages_wc(chip, buf, false);
2184		- snd_dma_free_pages(buf);
2185		-}
2186		-
2187		-static int substream_alloc_pages(struct azx *chip,
2188		- struct snd_pcm_substream *substream,
2189		- size_t size)
2190		-{
2191		- struct azx_dev *azx_dev = get_azx_dev(substream);
2192		- int ret;
2193		-
2194		- mark_runtime_wc(chip, azx_dev, substream, false);
2195		- ret = snd_pcm_lib_malloc_pages(substream, size);
2196		- if (ret < 0)
2197		- return ret;
2198		- mark_runtime_wc(chip, azx_dev, substream, true);
2199		- return 0;
2200		-}
2201		-
2202		-static int substream_free_pages(struct azx *chip,
2203		- struct snd_pcm_substream *substream)
2204		-{
2205		- struct azx_dev *azx_dev = get_azx_dev(substream);
2206		- mark_runtime_wc(chip, azx_dev, substream, false);
2207		- return snd_pcm_lib_free_pages(substream);
2208	2100	}
2209	2101
2210	2102	static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
..	..	@@ -2218,22 +2110,11 @@
2218	2110	#endif
2219	2111	}
2220	2112
2221		-static const struct hdac_io_ops pci_hda_io_ops = {
2222		- .reg_writel = pci_azx_writel,
2223		- .reg_readl = pci_azx_readl,
2224		- .reg_writew = pci_azx_writew,
2225		- .reg_readw = pci_azx_readw,
2226		- .reg_writeb = pci_azx_writeb,
2227		- .reg_readb = pci_azx_readb,
2228		- .dma_alloc_pages = dma_alloc_pages,
2229		- .dma_free_pages = dma_free_pages,
2230		-};
2231		-
2232		-/* Blacklist for skipping the whole probe:
	2113	+/* Denylist for skipping the whole probe:
2233	2114	* some HD-audio PCI entries are exposed without any codecs, and such devices
2234	2115	* should be ignored from the beginning.
2235	2116	*/
2236		-static const struct pci_device_id driver_blacklist[] = {
	2117	+static const struct pci_device_id driver_denylist[] = {
2237	2118	{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1043, 0x874f) }, /* ASUS ROG Zenith II / Strix */
2238	2119	{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1462, 0xcb59) }, /* MSI TRX40 Creator */
2239	2120	{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1462, 0xcb60) }, /* MSI TRX40 */
..	..	@@ -2242,11 +2123,8 @@
2242	2123
2243	2124	static const struct hda_controller_ops pci_hda_ops = {
2244	2125	.disable_msi_reset_irq = disable_msi_reset_irq,
2245		- .substream_alloc_pages = substream_alloc_pages,
2246		- .substream_free_pages = substream_free_pages,
2247	2126	.pcm_mmap_prepare = pcm_mmap_prepare,
2248	2127	.position_check = azx_position_check,
2249		- .link_power = azx_intel_link_power,
2250	2128	};
2251	2129
2252	2130	static int azx_probe(struct pci_dev *pci,
..	..	@@ -2259,8 +2137,8 @@
2259	2137	bool schedule_probe;
2260	2138	int err;
2261	2139
2262		- if (pci_match_id(driver_blacklist, pci)) {
2263		- dev_info(&pci->dev, "Skipping the blacklisted device\n");
	2140	+ if (pci_match_id(driver_denylist, pci)) {
	2141	+ dev_info(&pci->dev, "Skipping the device on the denylist\n");
2264	2142	return -ENODEV;
2265	2143	}
2266	2144
..	..	@@ -2269,6 +2147,19 @@
2269	2147	if (!enable[dev]) {
2270	2148	dev++;
2271	2149	return -ENOENT;
	2150	+ }
	2151	+
	2152	+ /*
	2153	+ * stop probe if another Intel's DSP driver should be activated
	2154	+ */
	2155	+ if (dmic_detect) {
	2156	+ err = snd_intel_dsp_driver_probe(pci);
	2157	+ if (err != SND_INTEL_DSP_DRIVER_ANY && err != SND_INTEL_DSP_DRIVER_LEGACY) {
	2158	+ dev_dbg(&pci->dev, "HDAudio driver not selected, aborting probe\n");
	2159	+ return -ENODEV;
	2160	+ }
	2161	+ } else {
	2162	+ dev_warn(&pci->dev, "dmic_detect option is deprecated, pass snd-intel-dspcfg.dsp_driver=1 option instead\n");
2272	2163	}
2273	2164
2274	2165	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
..	..	@@ -2319,7 +2210,7 @@
2319	2210	#endif
2320	2211
2321	2212	if (schedule_probe)
2322		- schedule_work(&hda->probe_work);
	2213	+ schedule_delayed_work(&hda->probe_work, 0);
2323	2214
2324	2215	dev++;
2325	2216	if (chip->disabled)
..	..	@@ -2338,7 +2229,7 @@
2338	2229	* So we keep a list of devices where we disable powersaving as its known
2339	2230	* to causes problems on these devices.
2340	2231	*/
2341		-static struct snd_pci_quirk power_save_blacklist[] = {
	2232	+static const struct snd_pci_quirk power_save_denylist[] = {
2342	2233	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
2343	2234	SND_PCI_QUIRK(0x1849, 0xc892, "Asrock B85M-ITX", 0),
2344	2235	/* https://bugzilla.redhat.com/show_bug.cgi?id=1525104 */
..	..	@@ -2382,9 +2273,9 @@
2382	2273	if (pm_blacklist) {
2383	2274	const struct snd_pci_quirk *q;
2384	2275
2385		- q = snd_pci_quirk_lookup(chip->pci, power_save_blacklist);
	2276	+ q = snd_pci_quirk_lookup(chip->pci, power_save_denylist);
2386	2277	if (q && val) {
2387		- dev_info(chip->card->dev, "device %04x:%04x is on the power_save blacklist, forcing power_save to 0\n",
	2278	+ dev_info(chip->card->dev, "device %04x:%04x is on the power_save denylist, forcing power_save to 0\n",
2388	2279	q->subvendor, q->subdevice);
2389	2280	val = 0;
2390	2281	}
..	..	@@ -2394,7 +2285,7 @@
2394	2285	}
2395	2286
2396	2287	/* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
2397		-static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
	2288	+static const unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
2398	2289	[AZX_DRIVER_NVIDIA] = 8,
2399	2290	[AZX_DRIVER_TERA] = 1,
2400	2291	};
..	..	@@ -2406,6 +2297,11 @@
2406	2297	struct pci_dev *pci = chip->pci;
2407	2298	int dev = chip->dev_index;
2408	2299	int err;
	2300	+
	2301	+ if (chip->disabled \|\| hda->init_failed)
	2302	+ return -EIO;
	2303	+ if (hda->probe_retry)
	2304	+ goto probe_retry;
2409	2305
2410	2306	to_hda_bus(bus)->bus_probing = 1;
2411	2307	hda->probe_continued = 1;
..	..	@@ -2425,10 +2321,13 @@
2425	2321	goto out_free;
2426	2322	} else {
2427	2323	/* don't bother any longer */
2428		- chip->driver_caps &=
2429		- ~(AZX_DCAPS_I915_COMPONENT \| AZX_DCAPS_I915_POWERWELL);
	2324	+ chip->driver_caps &= ~AZX_DCAPS_I915_COMPONENT;
2430	2325	}
2431	2326	}
	2327	+
	2328	+ /* HSW/BDW controllers need this power */
	2329	+ if (CONTROLLER_IN_GPU(pci))
	2330	+ hda->need_i915_power = 1;
2432	2331	}
2433	2332
2434	2333	/* Request display power well for the HDA controller or codec. For
..	..	@@ -2436,18 +2335,7 @@
2436	2335	* this power. For other platforms, like Baytrail/Braswell, only the
2437	2336	* display codec needs the power and it can be released after probe.
2438	2337	*/
2439		- if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
2440		- /* HSW/BDW controllers need this power */
2441		- if (CONTROLLER_IN_GPU(pci))
2442		- hda->need_i915_power = 1;
2443		-
2444		- err = snd_hdac_display_power(bus, true);
2445		- if (err < 0) {
2446		- dev_err(chip->card->dev,
2447		- "Cannot turn on display power on i915\n");
2448		- goto i915_power_fail;
2449		- }
2450		- }
	2338	+ display_power(chip, true);
2451	2339
2452	2340	err = azx_first_init(chip);
2453	2341	if (err < 0)
..	..	@@ -2476,10 +2364,20 @@
2476	2364	#endif
2477	2365	}
2478	2366	#endif
	2367	+
	2368	+ probe_retry:
2479	2369	if (bus->codec_mask && !(probe_only[dev] & 1)) {
2480	2370	err = azx_codec_configure(chip);
2481		- if (err < 0)
	2371	+ if (err) {
	2372	+ if ((chip->driver_caps & AZX_DCAPS_RETRY_PROBE) &&
	2373	+ ++hda->probe_retry < 60) {
	2374	+ schedule_delayed_work(&hda->probe_work,
	2375	+ msecs_to_jiffies(1000));
	2376	+ return 0; /* keep things up */
	2377	+ }
	2378	+ dev_err(chip->card->dev, "Cannot probe codecs, giving up\n");
2482	2379	goto out_free;
	2380	+ }
2483	2381	}
2484	2382
2485	2383	err = snd_card_register(chip->card);
..	..	@@ -2495,20 +2393,23 @@
2495	2393
2496	2394	if (azx_has_pm_runtime(chip)) {
2497	2395	pm_runtime_use_autosuspend(&pci->dev);
	2396	+ pm_runtime_allow(&pci->dev);
2498	2397	pm_runtime_put_autosuspend(&pci->dev);
2499	2398	}
2500	2399
2501	2400	out_free:
2502		- if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
2503		- && !hda->need_i915_power)
2504		- snd_hdac_display_power(bus, false);
	2401	+ if (err < 0) {
	2402	+ pci_set_drvdata(pci, NULL);
	2403	+ snd_card_free(chip->card);
	2404	+ return err;
	2405	+ }
2505	2406
2506		-i915_power_fail:
2507		- if (err < 0)
2508		- hda->init_failed = 1;
	2407	+ if (!hda->need_i915_power)
	2408	+ display_power(chip, false);
2509	2409	complete_all(&hda->probe_wait);
2510	2410	to_hda_bus(bus)->bus_probing = 0;
2511		- return err;
	2411	+ hda->probe_retry = 0;
	2412	+ return 0;
2512	2413	}
2513	2414
2514	2415	static void azx_remove(struct pci_dev *pci)
..	..	@@ -2533,7 +2434,7 @@
2533	2434	* device during cancel_work_sync() call.
2534	2435	*/
2535	2436	device_unlock(&pci->dev);
2536		- cancel_work_sync(&hda->probe_work);
	2437	+ cancel_delayed_work_sync(&hda->probe_work);
2537	2438	device_lock(&pci->dev);
2538	2439
2539	2440	snd_card_free(card);
..	..	@@ -2549,7 +2450,7 @@
2549	2450	return;
2550	2451	chip = card->private_data;
2551	2452	if (chip && chip->running)
2552		- azx_stop_chip(chip);
	2453	+ __azx_shutdown_chip(chip, true);
2553	2454	}
2554	2455
2555	2456	/* PCI IDs */
..	..	@@ -2609,8 +2510,57 @@
2609	2510	/* Cannonlake */
2610	2511	{ PCI_DEVICE(0x8086, 0x9dc8),
2611	2512	.driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2513	+ /* CometLake-LP */
	2514	+ { PCI_DEVICE(0x8086, 0x02C8),
	2515	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2516	+ /* CometLake-H */
	2517	+ { PCI_DEVICE(0x8086, 0x06C8),
	2518	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2519	+ { PCI_DEVICE(0x8086, 0xf1c8),
	2520	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2521	+ /* CometLake-S */
	2522	+ { PCI_DEVICE(0x8086, 0xa3f0),
	2523	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2524	+ /* CometLake-R */
	2525	+ { PCI_DEVICE(0x8086, 0xf0c8),
	2526	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
2612	2527	/* Icelake */
2613	2528	{ PCI_DEVICE(0x8086, 0x34c8),
	2529	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2530	+ /* Icelake-H */
	2531	+ { PCI_DEVICE(0x8086, 0x3dc8),
	2532	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2533	+ /* Jasperlake */
	2534	+ { PCI_DEVICE(0x8086, 0x38c8),
	2535	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2536	+ { PCI_DEVICE(0x8086, 0x4dc8),
	2537	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2538	+ /* Tigerlake */
	2539	+ { PCI_DEVICE(0x8086, 0xa0c8),
	2540	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2541	+ /* Tigerlake-H */
	2542	+ { PCI_DEVICE(0x8086, 0x43c8),
	2543	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2544	+ /* DG1 */
	2545	+ { PCI_DEVICE(0x8086, 0x490d),
	2546	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2547	+ /* DG2 */
	2548	+ { PCI_DEVICE(0x8086, 0x4f90),
	2549	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2550	+ { PCI_DEVICE(0x8086, 0x4f91),
	2551	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2552	+ { PCI_DEVICE(0x8086, 0x4f92),
	2553	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2554	+ /* Alderlake-S */
	2555	+ { PCI_DEVICE(0x8086, 0x7ad0),
	2556	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2557	+ /* Alderlake-P */
	2558	+ { PCI_DEVICE(0x8086, 0x51c8),
	2559	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2560	+ /* Elkhart Lake */
	2561	+ { PCI_DEVICE(0x8086, 0x4b55),
	2562	+ .driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
	2563	+ { PCI_DEVICE(0x8086, 0x4b58),
2614	2564	.driver_data = AZX_DRIVER_SKL \| AZX_DCAPS_INTEL_SKYLAKE},
2615	2565	/* Broxton-P(Apollolake) */
2616	2566	{ PCI_DEVICE(0x8086, 0x5a98),
..	..	@@ -2634,9 +2584,12 @@
2634	2584	/* 5 Series/3400 */
2635	2585	{ PCI_DEVICE(0x8086, 0x3b56),
2636	2586	.driver_data = AZX_DRIVER_SCH \| AZX_DCAPS_INTEL_PCH_NOPM },
	2587	+ { PCI_DEVICE(0x8086, 0x3b57),
	2588	+ .driver_data = AZX_DRIVER_SCH \| AZX_DCAPS_INTEL_PCH_NOPM },
2637	2589	/* Poulsbo */
2638	2590	{ PCI_DEVICE(0x8086, 0x811b),
2639		- .driver_data = AZX_DRIVER_SCH \| AZX_DCAPS_INTEL_PCH_BASE },
	2591	+ .driver_data = AZX_DRIVER_SCH \| AZX_DCAPS_INTEL_PCH_BASE \|
	2592	+ AZX_DCAPS_POSFIX_LPIB },
2640	2593	/* Oaktrail */
2641	2594	{ PCI_DEVICE(0x8086, 0x080a),
2642	2595	.driver_data = AZX_DRIVER_SCH \| AZX_DCAPS_INTEL_PCH_BASE },
..	..	@@ -2764,13 +2717,44 @@
2764	2717	{ PCI_DEVICE(0x1002, 0xaac8),
2765	2718	.driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS },
2766	2719	{ PCI_DEVICE(0x1002, 0xaad8),
2767		- .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS },
2768		- { PCI_DEVICE(0x1002, 0xaae8),
2769		- .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS },
	2720	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2721	+ AZX_DCAPS_PM_RUNTIME },
2770	2722	{ PCI_DEVICE(0x1002, 0xaae0),
2771		- .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS },
	2723	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2724	+ AZX_DCAPS_PM_RUNTIME },
	2725	+ { PCI_DEVICE(0x1002, 0xaae8),
	2726	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2727	+ AZX_DCAPS_PM_RUNTIME },
2772	2728	{ PCI_DEVICE(0x1002, 0xaaf0),
2773		- .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS },
	2729	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2730	+ AZX_DCAPS_PM_RUNTIME },
	2731	+ { PCI_DEVICE(0x1002, 0xaaf8),
	2732	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2733	+ AZX_DCAPS_PM_RUNTIME },
	2734	+ { PCI_DEVICE(0x1002, 0xab00),
	2735	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2736	+ AZX_DCAPS_PM_RUNTIME },
	2737	+ { PCI_DEVICE(0x1002, 0xab08),
	2738	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2739	+ AZX_DCAPS_PM_RUNTIME },
	2740	+ { PCI_DEVICE(0x1002, 0xab10),
	2741	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2742	+ AZX_DCAPS_PM_RUNTIME },
	2743	+ { PCI_DEVICE(0x1002, 0xab18),
	2744	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2745	+ AZX_DCAPS_PM_RUNTIME },
	2746	+ { PCI_DEVICE(0x1002, 0xab20),
	2747	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2748	+ AZX_DCAPS_PM_RUNTIME },
	2749	+ { PCI_DEVICE(0x1002, 0xab28),
	2750	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2751	+ AZX_DCAPS_PM_RUNTIME },
	2752	+ { PCI_DEVICE(0x1002, 0xab30),
	2753	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2754	+ AZX_DCAPS_PM_RUNTIME },
	2755	+ { PCI_DEVICE(0x1002, 0xab38),
	2756	+ .driver_data = AZX_DRIVER_ATIHDMI_NS \| AZX_DCAPS_PRESET_ATI_HDMI_NS \|
	2757	+ AZX_DCAPS_PM_RUNTIME },
2774	2758	/* VIA VT8251/VT8237A */
2775	2759	{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
2776	2760	/* VIA GFX VT7122/VX900 */
..	..	@@ -2830,6 +2814,8 @@
2830	2814	.class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2831	2815	.class_mask = 0xffffff,
2832	2816	.driver_data = AZX_DRIVER_GENERIC \| AZX_DCAPS_PRESET_ATI_HDMI },
	2817	+ /* Zhaoxin */
	2818	+ { PCI_DEVICE(0x1d17, 0x3288), .driver_data = AZX_DRIVER_ZHAOXIN },
2833	2819	{ 0, }
2834	2820	};
2835	2821	MODULE_DEVICE_TABLE(pci, azx_ids);