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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/include/linux/spi/spi.h
....@@ -12,6 +12,9 @@
1212 #include <linux/kthread.h>
1313 #include <linux/completion.h>
1414 #include <linux/scatterlist.h>
15
+#include <linux/gpio/consumer.h>
16
+#include <linux/ptp_clock_kernel.h>
17
+#include <linux/android_kabi.h>
1518 
1619 struct dma_chan;
1720 struct property_entry;
....@@ -89,6 +92,22 @@
8992 	SPI_STATISTICS_ADD_TO_FIELD(stats, field, 1)
9093 
9194 /**
95
+ * struct spi_delay - SPI delay information
96
+ * @value: Value for the delay
97
+ * @unit: Unit for the delay
98
+ */
99
+struct spi_delay {
100
+#define SPI_DELAY_UNIT_USECS	0
101
+#define SPI_DELAY_UNIT_NSECS	1
102
+#define SPI_DELAY_UNIT_SCK	2
103
+	u16	value;
104
+	u8	unit;
105
+};
106
+
107
+extern int spi_delay_to_ns(struct spi_delay *_delay, struct spi_transfer *xfer);
108
+extern int spi_delay_exec(struct spi_delay *_delay, struct spi_transfer *xfer);
109
+
110
+/**
92111  * struct spi_device - Controller side proxy for an SPI slave device
93112  * @dev: Driver model representation of the device.
94113  * @controller: SPI controller used with the device.
....@@ -108,6 +127,7 @@
108127  *	This may be changed by the device's driver, or left at the
109128  *	default (0) indicating protocol words are eight bit bytes.
110129  *	The spi_transfer.bits_per_word can override this for each transfer.
130
+ * @rt: Make the pump thread real time priority.
111131  * @irq: Negative, or the number passed to request_irq() to receive
112132  *	interrupts from this device.
113133  * @controller_state: Controller's runtime state
....@@ -116,8 +136,15 @@
116136  * @modalias: Name of the driver to use with this device, or an alias
117137  *	for that name.  This appears in the sysfs "modalias" attribute
118138  *	for driver coldplugging, and in uevents used for hotplugging
119
- * @cs_gpio: gpio number of the chipselect line (optional, -ENOENT when
139
+ * @driver_override: If the name of a driver is written to this attribute, then
140
+ *	the device will bind to the named driver and only the named driver.
141
+ * @cs_gpio: LEGACY: gpio number of the chipselect line (optional, -ENOENT when
142
+ *	not using a GPIO line) use cs_gpiod in new drivers by opting in on
143
+ *	the spi_master.
144
+ * @cs_gpiod: gpio descriptor of the chipselect line (optional, NULL when
120145  *	not using a GPIO line)
146
+ * @word_delay: delay to be inserted between consecutive
147
+ *	words of a transfer
121148  *
122149  * @statistics: statistics for the spi_device
123150  *
....@@ -137,7 +164,8 @@
137164 	u32			max_speed_hz;
138165 	u8			chip_select;
139166 	u8			bits_per_word;
140
-	u16			mode;
167
+	bool			rt;
168
+	u32			mode;
141169 #define	SPI_CPHA	0x01			/* clock phase */
142170 #define	SPI_CPOL	0x02			/* clock polarity */
143171 #define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
....@@ -154,16 +182,24 @@
154182 #define	SPI_TX_QUAD	0x200			/* transmit with 4 wires */
155183 #define	SPI_RX_DUAL	0x400			/* receive with 2 wires */
156184 #define	SPI_RX_QUAD	0x800			/* receive with 4 wires */
157
-#define SPI_CS_WORD	0x1000			/* toggle cs after each word */
185
+#define	SPI_CS_WORD	0x1000			/* toggle cs after each word */
186
+#define	SPI_TX_OCTAL	0x2000			/* transmit with 8 wires */
187
+#define	SPI_RX_OCTAL	0x4000			/* receive with 8 wires */
188
+#define	SPI_3WIRE_HIZ	0x8000			/* high impedance turnaround */
158189 	int			irq;
159190 	void			*controller_state;
160191 	void			*controller_data;
161192 	char			modalias[SPI_NAME_SIZE];
162193 	const char		*driver_override;
163
-	int			cs_gpio;	/* chip select gpio */
194
+	int			cs_gpio;	/* LEGACY: chip select gpio */
195
+	struct gpio_desc	*cs_gpiod;	/* chip select gpio desc */
196
+	struct spi_delay	word_delay; /* inter-word delay */
164197 
165198 	/* the statistics */
166199 	struct spi_statistics	statistics;
200
+
201
+	ANDROID_KABI_RESERVE(1);
202
+	ANDROID_KABI_RESERVE(2);
167203 
168204 	/*
169205 	 * likely need more hooks for more protocol options affecting how
....@@ -249,6 +285,8 @@
249285 	int			(*remove)(struct spi_device *spi);
250286 	void			(*shutdown)(struct spi_device *spi);
251287 	struct device_driver	driver;
288
+
289
+	ANDROID_KABI_RESERVE(1);
252290 };
253291 
254292 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
....@@ -297,6 +335,7 @@
297335  *	every chipselect is connected to a slave.
298336  * @dma_alignment: SPI controller constraint on DMA buffers alignment.
299337  * @mode_bits: flags understood by this controller driver
338
+ * @buswidth_override_bits: flags to override for this controller driver
300339  * @bits_per_word_mask: A mask indicating which values of bits_per_word are
301340  *	supported by the driver. Bit n indicates that a bits_per_word n+1 is
302341  *	supported. If set, the SPI core will reject any transfer with an
....@@ -319,12 +358,14 @@
319358  *	must fail if an unrecognized or unsupported mode is requested.
320359  *	It's always safe to call this unless transfers are pending on
321360  *	the device whose settings are being modified.
361
+ * @set_cs_timing: optional hook for SPI devices to request SPI master
362
+ * controller for configuring specific CS setup time, hold time and inactive
363
+ * delay interms of clock counts
322364  * @transfer: adds a message to the controller's transfer queue.
323365  * @cleanup: frees controller-specific state
324366  * @can_dma: determine whether this controller supports DMA
325367  * @queued: whether this controller is providing an internal message queue
326
- * @kworker: thread struct for message pump
327
- * @kworker_task: pointer to task for message pump kworker thread
368
+ * @kworker: pointer to thread struct for message pump
328369  * @pump_messages: work struct for scheduling work to the message pump
329370  * @queue_lock: spinlock to syncronise access to message queue
330371  * @queue: message queue
....@@ -333,6 +374,8 @@
333374  * @cur_msg_prepared: spi_prepare_message was called for the currently
334375  *                    in-flight message
335376  * @cur_msg_mapped: message has been mapped for DMA
377
+ * @last_cs_enable: was enable true on the last call to set_cs.
378
+ * @last_cs_mode_high: was (mode & SPI_CS_HIGH) true on the last call to set_cs.
336379  * @xfer_completion: used by core transfer_one_message()
337380  * @busy: message pump is busy
338381  * @running: message pump is running
....@@ -352,12 +395,14 @@
352395  * @unprepare_transfer_hardware: there are currently no more messages on the
353396  *	queue so the subsystem notifies the driver that it may relax the
354397  *	hardware by issuing this call
398
+ *
355399  * @set_cs: set the logic level of the chip select line.  May be called
356400  *          from interrupt context.
357401  * @prepare_message: set up the controller to transfer a single message,
358402  *                   for example doing DMA mapping.  Called from threaded
359403  *                   context.
360404  * @transfer_one: transfer a single spi_transfer.
405
+ *
361406  *                  - return 0 if the transfer is finished,
362407  *                  - return 1 if the transfer is still in progress. When
363408  *                    the driver is finished with this transfer it must
....@@ -373,9 +418,28 @@
373418  *	     controller has native support for memory like operations.
374419  * @unprepare_message: undo any work done by prepare_message().
375420  * @slave_abort: abort the ongoing transfer request on an SPI slave controller
376
- * @cs_gpios: Array of GPIOs to use as chip select lines; one per CS
377
- *	number. Any individual value may be -ENOENT for CS lines that
421
+ * @cs_setup: delay to be introduced by the controller after CS is asserted
422
+ * @cs_hold: delay to be introduced by the controller before CS is deasserted
423
+ * @cs_inactive: delay to be introduced by the controller after CS is
424
+ *	deasserted. If @cs_change_delay is used from @spi_transfer, then the
425
+ *	two delays will be added up.
426
+ * @cs_gpios: LEGACY: array of GPIO descs to use as chip select lines; one per
427
+ *	CS number. Any individual value may be -ENOENT for CS lines that
428
+ *	are not GPIOs (driven by the SPI controller itself). Use the cs_gpiods
429
+ *	in new drivers.
430
+ * @cs_gpiods: Array of GPIO descs to use as chip select lines; one per CS
431
+ *	number. Any individual value may be NULL for CS lines that
378432  *	are not GPIOs (driven by the SPI controller itself).
433
+ * @use_gpio_descriptors: Turns on the code in the SPI core to parse and grab
434
+ *	GPIO descriptors rather than using global GPIO numbers grabbed by the
435
+ *	driver. This will fill in @cs_gpiods and @cs_gpios should not be used,
436
+ *	and SPI devices will have the cs_gpiod assigned rather than cs_gpio.
437
+ * @unused_native_cs: When cs_gpiods is used, spi_register_controller() will
438
+ *	fill in this field with the first unused native CS, to be used by SPI
439
+ *	controller drivers that need to drive a native CS when using GPIO CS.
440
+ * @max_native_cs: When cs_gpiods is used, and this field is filled in,
441
+ *	spi_register_controller() will validate all native CS (including the
442
+ *	unused native CS) against this value.
379443  * @statistics: statistics for the spi_controller
380444  * @dma_tx: DMA transmit channel
381445  * @dma_rx: DMA receive channel
....@@ -384,6 +448,15 @@
384448  * @fw_translate_cs: If the boot firmware uses different numbering scheme
385449  *	what Linux expects, this optional hook can be used to translate
386450  *	between the two.
451
+ * @ptp_sts_supported: If the driver sets this to true, it must provide a
452
+ *	time snapshot in @spi_transfer->ptp_sts as close as possible to the
453
+ *	moment in time when @spi_transfer->ptp_sts_word_pre and
454
+ *	@spi_transfer->ptp_sts_word_post were transmitted.
455
+ *	If the driver does not set this, the SPI core takes the snapshot as
456
+ *	close to the driver hand-over as possible.
457
+ * @irq_flags: Interrupt enable state during PTP system timestamping
458
+ * @fallback: fallback to pio if dma transfer return failure with
459
+ *	SPI_TRANS_FAIL_NO_START.
387460  *
388461  * Each SPI controller can communicate with one or more @spi_device
389462  * children.  These make a small bus, sharing MOSI, MISO and SCK signals
....@@ -420,13 +493,15 @@
420493 	u16			dma_alignment;
421494 
422495 	/* spi_device.mode flags understood by this controller driver */
423
-	u16			mode_bits;
496
+	u32			mode_bits;
497
+
498
+	/* spi_device.mode flags override flags for this controller */
499
+	u32			buswidth_override_bits;
424500 
425501 	/* bitmask of supported bits_per_word for transfers */
426502 	u32			bits_per_word_mask;
427503 #define SPI_BPW_MASK(bits) BIT((bits) - 1)
428
-#define SPI_BIT_MASK(bits) (((bits) == 32) ? ~0U : (BIT(bits) - 1))
429
-#define SPI_BPW_RANGE_MASK(min, max) (SPI_BIT_MASK(max) - SPI_BIT_MASK(min - 1))
504
+#define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
430505 
431506 	/* limits on transfer speed */
432507 	u32			min_speed_hz;
....@@ -469,6 +544,17 @@
469544 	 * which could break those transfers.
470545 	 */
471546 	int			(*setup)(struct spi_device *spi);
547
+
548
+	/*
549
+	 * set_cs_timing() method is for SPI controllers that supports
550
+	 * configuring CS timing.
551
+	 *
552
+	 * This hook allows SPI client drivers to request SPI controllers
553
+	 * to configure specific CS timing through spi_set_cs_timing() after
554
+	 * spi_setup().
555
+	 */
556
+	int (*set_cs_timing)(struct spi_device *spi, struct spi_delay *setup,
557
+			     struct spi_delay *hold, struct spi_delay *inactive);
472558 
473559 	/* bidirectional bulk transfers
474560 	 *
....@@ -513,8 +599,7 @@
513599 	 * Over time we expect SPI drivers to be phased over to this API.
514600 	 */
515601 	bool				queued;
516
-	struct kthread_worker		kworker;
517
-	struct task_struct		*kworker_task;
602
+	struct kthread_worker		*kworker;
518603 	struct kthread_work		pump_messages;
519604 	spinlock_t			queue_lock;
520605 	struct list_head		queue;
....@@ -526,6 +611,9 @@
526611 	bool				auto_runtime_pm;
527612 	bool                            cur_msg_prepared;
528613 	bool				cur_msg_mapped;
614
+	bool				last_cs_enable;
615
+	bool				last_cs_mode_high;
616
+	bool                            fallback;
529617 	struct completion               xfer_completion;
530618 	size_t				max_dma_len;
531619 
....@@ -552,8 +640,24 @@
552640 	/* Optimized handlers for SPI memory-like operations. */
553641 	const struct spi_controller_mem_ops *mem_ops;
554642 
643
+	/* CS delays */
644
+	struct spi_delay	cs_setup;
645
+	struct spi_delay	cs_hold;
646
+	struct spi_delay	cs_inactive;
647
+
555648 	/* gpio chip select */
556649 	int			*cs_gpios;
650
+	struct gpio_desc	**cs_gpiods;
651
+	bool			use_gpio_descriptors;
652
+// KABI fix up for 35f3f8504c3b ("spi: Switch to signed types for *_native_cs
653
+// SPI controller fields") that showed up in 5.10.63
654
+#ifdef __GENKSYMS__
655
+	u8			unused_native_cs;
656
+	u8			max_native_cs;
657
+#else
658
+	s8			unused_native_cs;
659
+	s8			max_native_cs;
660
+#endif
557661 
558662 	/* statistics */
559663 	struct spi_statistics	statistics;
....@@ -567,6 +671,18 @@
567671 	void			*dummy_tx;
568672 
569673 	int (*fw_translate_cs)(struct spi_controller *ctlr, unsigned cs);
674
+
675
+	/*
676
+	 * Driver sets this field to indicate it is able to snapshot SPI
677
+	 * transfers (needed e.g. for reading the time of POSIX clocks)
678
+	 */
679
+	bool			ptp_sts_supported;
680
+
681
+	/* Interrupt enable state during PTP system timestamping */
682
+	unsigned long		irq_flags;
683
+
684
+	ANDROID_KABI_RESERVE(1);
685
+	ANDROID_KABI_RESERVE(2);
570686 };
571687 
572688 static inline void *spi_controller_get_devdata(struct spi_controller *ctlr)
....@@ -606,6 +722,14 @@
606722 extern struct spi_message *spi_get_next_queued_message(struct spi_controller *ctlr);
607723 extern void spi_finalize_current_message(struct spi_controller *ctlr);
608724 extern void spi_finalize_current_transfer(struct spi_controller *ctlr);
725
+
726
+/* Helper calls for driver to timestamp transfer */
727
+void spi_take_timestamp_pre(struct spi_controller *ctlr,
728
+			    struct spi_transfer *xfer,
729
+			    size_t progress, bool irqs_off);
730
+void spi_take_timestamp_post(struct spi_controller *ctlr,
731
+			     struct spi_transfer *xfer,
732
+			     size_t progress, bool irqs_off);
609733 
610734 /* the spi driver core manages memory for the spi_controller classdev */
611735 extern struct spi_controller *__spi_alloc_controller(struct device *host,
....@@ -719,14 +843,47 @@
719843  * @bits_per_word: select a bits_per_word other than the device default
720844  *      for this transfer. If 0 the default (from @spi_device) is used.
721845  * @cs_change: affects chipselect after this transfer completes
846
+ * @cs_change_delay: delay between cs deassert and assert when
847
+ *      @cs_change is set and @spi_transfer is not the last in @spi_message
848
+ * @delay: delay to be introduced after this transfer before
849
+ *	(optionally) changing the chipselect status, then starting
850
+ *	the next transfer or completing this @spi_message.
722851  * @delay_usecs: microseconds to delay after this transfer before
723852  *	(optionally) changing the chipselect status, then starting
724853  *	the next transfer or completing this @spi_message.
725
- * @word_delay: clock cycles to inter word delay after each word size
854
+ * @word_delay: inter word delay to be introduced after each word size
726855  *	(set by bits_per_word) transmission.
856
+ * @effective_speed_hz: the effective SCK-speed that was used to
857
+ *      transfer this transfer. Set to 0 if the spi bus driver does
858
+ *      not support it.
727859  * @transfer_list: transfers are sequenced through @spi_message.transfers
728860  * @tx_sg: Scatterlist for transmit, currently not for client use
729861  * @rx_sg: Scatterlist for receive, currently not for client use
862
+ * @ptp_sts_word_pre: The word (subject to bits_per_word semantics) offset
863
+ *	within @tx_buf for which the SPI device is requesting that the time
864
+ *	snapshot for this transfer begins. Upon completing the SPI transfer,
865
+ *	this value may have changed compared to what was requested, depending
866
+ *	on the available snapshotting resolution (DMA transfer,
867
+ *	@ptp_sts_supported is false, etc).
868
+ * @ptp_sts_word_post: See @ptp_sts_word_post. The two can be equal (meaning
869
+ *	that a single byte should be snapshotted).
870
+ *	If the core takes care of the timestamp (if @ptp_sts_supported is false
871
+ *	for this controller), it will set @ptp_sts_word_pre to 0, and
872
+ *	@ptp_sts_word_post to the length of the transfer. This is done
873
+ *	purposefully (instead of setting to spi_transfer->len - 1) to denote
874
+ *	that a transfer-level snapshot taken from within the driver may still
875
+ *	be of higher quality.
876
+ * @ptp_sts: Pointer to a memory location held by the SPI slave device where a
877
+ *	PTP system timestamp structure may lie. If drivers use PIO or their
878
+ *	hardware has some sort of assist for retrieving exact transfer timing,
879
+ *	they can (and should) assert @ptp_sts_supported and populate this
880
+ *	structure using the ptp_read_system_*ts helper functions.
881
+ *	The timestamp must represent the time at which the SPI slave device has
882
+ *	processed the word, i.e. the "pre" timestamp should be taken before
883
+ *	transmitting the "pre" word, and the "post" timestamp after receiving
884
+ *	transmit confirmation from the controller for the "post" word.
885
+ * @timestamped: true if the transfer has been timestamped
886
+ * @error: Error status logged by spi controller driver.
730887  *
731888  * SPI transfers always write the same number of bytes as they read.
732889  * Protocol drivers should always provide @rx_buf and/or @tx_buf.
....@@ -805,10 +962,26 @@
805962 #define	SPI_NBITS_QUAD		0x04 /* 4bits transfer */
806963 	u8		bits_per_word;
807964 	u16		delay_usecs;
965
+	struct spi_delay	delay;
966
+	struct spi_delay	cs_change_delay;
967
+	struct spi_delay	word_delay;
808968 	u32		speed_hz;
809
-	u16		word_delay;
969
+
970
+	u32		effective_speed_hz;
971
+
972
+	unsigned int	ptp_sts_word_pre;
973
+	unsigned int	ptp_sts_word_post;
974
+
975
+	struct ptp_system_timestamp *ptp_sts;
976
+
977
+	bool		timestamped;
810978 
811979 	struct list_head transfer_list;
980
+
981
+#define SPI_TRANS_FAIL_NO_START	BIT(0)
982
+	u16		error;
983
+
984
+	ANDROID_KABI_RESERVE(1);
812985 };
813986 
814987 /**
....@@ -831,7 +1004,7 @@
8311004  * each represented by a struct spi_transfer.  The sequence is "atomic"
8321005  * in the sense that no other spi_message may use that SPI bus until that
8331006  * sequence completes.  On some systems, many such sequences can execute as
834
- * as single programmed DMA transfer.  On all systems, these messages are
1007
+ * a single programmed DMA transfer.  On all systems, these messages are
8351008  * queued, and might complete after transactions to other devices.  Messages
8361009  * sent to a given spi_device are always executed in FIFO order.
8371010  *
....@@ -875,6 +1048,8 @@
8751048 
8761049 	/* list of spi_res reources when the spi message is processed */
8771050 	struct list_head        resources;
1051
+
1052
+	ANDROID_KABI_RESERVE(1);
8781053 };
8791054 
8801055 static inline void spi_message_init_no_memset(struct spi_message *m)
....@@ -899,6 +1074,20 @@
8991074 spi_transfer_del(struct spi_transfer *t)
9001075 {
9011076 	list_del(&t->transfer_list);
1077
+}
1078
+
1079
+static inline int
1080
+spi_transfer_delay_exec(struct spi_transfer *t)
1081
+{
1082
+	struct spi_delay d;
1083
+
1084
+	if (t->delay_usecs) {
1085
+		d.value = t->delay_usecs;
1086
+		d.unit = SPI_DELAY_UNIT_USECS;
1087
+		return spi_delay_exec(&d, NULL);
1088
+	}
1089
+
1090
+	return spi_delay_exec(&t->delay, t);
9021091 }
9031092 
9041093 /**
....@@ -948,6 +1137,11 @@
9481137 	kfree(m);
9491138 }
9501139 
1140
+extern int spi_set_cs_timing(struct spi_device *spi,
1141
+			     struct spi_delay *setup,
1142
+			     struct spi_delay *hold,
1143
+			     struct spi_delay *inactive);
1144
+
9511145 extern int spi_setup(struct spi_device *spi);
9521146 extern int spi_async(struct spi_device *spi, struct spi_message *message);
9531147 extern int spi_async_locked(struct spi_device *spi,
....@@ -976,6 +1170,26 @@
9761170 
9771171 	/* transfer size limit must not be greater than messsage size limit */
9781172 	return min(tr_max, msg_max);
1173
+}
1174
+
1175
+/**
1176
+ * spi_is_bpw_supported - Check if bits per word is supported
1177
+ * @spi: SPI device
1178
+ * @bpw: Bits per word
1179
+ *
1180
+ * This function checks to see if the SPI controller supports @bpw.
1181
+ *
1182
+ * Returns:
1183
+ * True if @bpw is supported, false otherwise.
1184
+ */
1185
+static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw)
1186
+{
1187
+	u32 bpw_mask = spi->master->bits_per_word_mask;
1188
+
1189
+	if (bpw == 8 || (bpw <= 32 && bpw_mask & SPI_BPW_MASK(bpw)))
1190
+		return true;
1191
+
1192
+	return false;
9791193 }
9801194 
9811195 /*---------------------------------------------------------------------------*/
....@@ -1055,7 +1269,7 @@
10551269  *
10561270  * For more specific semantics see spi_sync().
10571271  *
1058
- * Return: Return: zero on success, else a negative error code.
1272
+ * Return: zero on success, else a negative error code.
10591273  */
10601274 static inline int
10611275 spi_sync_transfer(struct spi_device *spi, struct spi_transfer *xfers,
....@@ -1272,7 +1486,9 @@
12721486 	/* mode becomes spi_device.mode, and is essential for chips
12731487 	 * where the default of SPI_CS_HIGH = 0 is wrong.
12741488 	 */
1275
-	u16		mode;
1489
+	u32		mode;
1490
+
1491
+	ANDROID_KABI_RESERVE(1);
12761492 
12771493 	/* ... may need additional spi_device chip config data here.
12781494 	 * avoid stuff protocol drivers can set; but include stuff