.. | .. |
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17 | 17 | { \ |
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18 | 18 | .buswidth = __buswidth, \ |
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19 | 19 | .opcode = __opcode, \ |
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| 20 | + .nbytes = 1, \ |
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20 | 21 | } |
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21 | 22 | |
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22 | 23 | #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth) \ |
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.. | .. |
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57 | 58 | /** |
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58 | 59 | * enum spi_mem_data_dir - describes the direction of a SPI memory data |
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59 | 60 | * transfer from the controller perspective |
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| 61 | + * @SPI_MEM_NO_DATA: no data transferred |
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60 | 62 | * @SPI_MEM_DATA_IN: data coming from the SPI memory |
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61 | | - * @SPI_MEM_DATA_OUT: data sent the SPI memory |
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| 63 | + * @SPI_MEM_DATA_OUT: data sent to the SPI memory |
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62 | 64 | */ |
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63 | 65 | enum spi_mem_data_dir { |
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| 66 | + SPI_MEM_NO_DATA, |
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64 | 67 | SPI_MEM_DATA_IN, |
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65 | 68 | SPI_MEM_DATA_OUT, |
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66 | 69 | }; |
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67 | 70 | |
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68 | 71 | /** |
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69 | 72 | * struct spi_mem_op - describes a SPI memory operation |
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| 73 | + * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid). The opcode is |
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| 74 | + * sent MSB-first. |
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70 | 75 | * @cmd.buswidth: number of IO lines used to transmit the command |
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71 | 76 | * @cmd.opcode: operation opcode |
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| 77 | + * @cmd.dtr: whether the command opcode should be sent in DTR mode or not |
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72 | 78 | * @addr.nbytes: number of address bytes to send. Can be zero if the operation |
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73 | 79 | * does not need to send an address |
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74 | 80 | * @addr.buswidth: number of IO lines used to transmit the address cycles |
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| 81 | + * @addr.dtr: whether the address should be sent in DTR mode or not |
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75 | 82 | * @addr.val: address value. This value is always sent MSB first on the bus. |
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76 | 83 | * Note that only @addr.nbytes are taken into account in this |
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77 | 84 | * address value, so users should make sure the value fits in the |
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.. | .. |
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79 | 86 | * @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can |
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80 | 87 | * be zero if the operation does not require dummy bytes |
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81 | 88 | * @dummy.buswidth: number of IO lanes used to transmit the dummy bytes |
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| 89 | + * @dummy.dtr: whether the dummy bytes should be sent in DTR mode or not |
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82 | 90 | * @data.buswidth: number of IO lanes used to send/receive the data |
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| 91 | + * @data.dtr: whether the data should be sent in DTR mode or not |
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83 | 92 | * @data.dir: direction of the transfer |
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84 | 93 | * @data.nbytes: number of data bytes to send/receive. Can be zero if the |
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85 | 94 | * operation does not involve transferring data |
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.. | .. |
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88 | 97 | */ |
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89 | 98 | struct spi_mem_op { |
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90 | 99 | struct { |
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| 100 | + u8 nbytes; |
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91 | 101 | u8 buswidth; |
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92 | | - u8 opcode; |
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| 102 | + u8 dtr : 1; |
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| 103 | + u16 opcode; |
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93 | 104 | } cmd; |
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94 | 105 | |
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95 | 106 | struct { |
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96 | 107 | u8 nbytes; |
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97 | 108 | u8 buswidth; |
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| 109 | + u8 dtr : 1; |
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98 | 110 | u64 val; |
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99 | 111 | } addr; |
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100 | 112 | |
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101 | 113 | struct { |
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102 | 114 | u8 nbytes; |
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103 | 115 | u8 buswidth; |
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| 116 | + u8 dtr : 1; |
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104 | 117 | } dummy; |
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105 | 118 | |
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106 | 119 | struct { |
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107 | 120 | u8 buswidth; |
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| 121 | + u8 dtr : 1; |
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108 | 122 | enum spi_mem_data_dir dir; |
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109 | 123 | unsigned int nbytes; |
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110 | 124 | union { |
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.. | .. |
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121 | 135 | .dummy = __dummy, \ |
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122 | 136 | .data = __data, \ |
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123 | 137 | } |
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| 138 | + |
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| 139 | +/** |
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| 140 | + * struct spi_mem_dirmap_info - Direct mapping information |
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| 141 | + * @op_tmpl: operation template that should be used by the direct mapping when |
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| 142 | + * the memory device is accessed |
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| 143 | + * @offset: absolute offset this direct mapping is pointing to |
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| 144 | + * @length: length in byte of this direct mapping |
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| 145 | + * |
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| 146 | + * These information are used by the controller specific implementation to know |
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| 147 | + * the portion of memory that is directly mapped and the spi_mem_op that should |
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| 148 | + * be used to access the device. |
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| 149 | + * A direct mapping is only valid for one direction (read or write) and this |
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| 150 | + * direction is directly encoded in the ->op_tmpl.data.dir field. |
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| 151 | + */ |
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| 152 | +struct spi_mem_dirmap_info { |
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| 153 | + struct spi_mem_op op_tmpl; |
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| 154 | + u64 offset; |
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| 155 | + u64 length; |
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| 156 | +}; |
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| 157 | + |
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| 158 | +/** |
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| 159 | + * struct spi_mem_dirmap_desc - Direct mapping descriptor |
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| 160 | + * @mem: the SPI memory device this direct mapping is attached to |
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| 161 | + * @info: information passed at direct mapping creation time |
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| 162 | + * @nodirmap: set to 1 if the SPI controller does not implement |
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| 163 | + * ->mem_ops->dirmap_create() or when this function returned an |
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| 164 | + * error. If @nodirmap is true, all spi_mem_dirmap_{read,write}() |
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| 165 | + * calls will use spi_mem_exec_op() to access the memory. This is a |
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| 166 | + * degraded mode that allows spi_mem drivers to use the same code |
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| 167 | + * no matter whether the controller supports direct mapping or not |
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| 168 | + * @priv: field pointing to controller specific data |
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| 169 | + * |
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| 170 | + * Common part of a direct mapping descriptor. This object is created by |
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| 171 | + * spi_mem_dirmap_create() and controller implementation of ->create_dirmap() |
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| 172 | + * can create/attach direct mapping resources to the descriptor in the ->priv |
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| 173 | + * field. |
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| 174 | + */ |
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| 175 | +struct spi_mem_dirmap_desc { |
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| 176 | + struct spi_mem *mem; |
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| 177 | + struct spi_mem_dirmap_info info; |
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| 178 | + unsigned int nodirmap; |
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| 179 | + void *priv; |
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| 180 | +}; |
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124 | 181 | |
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125 | 182 | /** |
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126 | 183 | * struct spi_mem - describes a SPI memory device |
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.. | .. |
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177 | 234 | * Note that if the implementation of this function allocates memory |
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178 | 235 | * dynamically, then it should do so with devm_xxx(), as we don't |
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179 | 236 | * have a ->free_name() function. |
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| 237 | + * @dirmap_create: create a direct mapping descriptor that can later be used to |
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| 238 | + * access the memory device. This method is optional |
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| 239 | + * @dirmap_destroy: destroy a memory descriptor previous created by |
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| 240 | + * ->dirmap_create() |
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| 241 | + * @dirmap_read: read data from the memory device using the direct mapping |
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| 242 | + * created by ->dirmap_create(). The function can return less |
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| 243 | + * data than requested (for example when the request is crossing |
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| 244 | + * the currently mapped area), and the caller of |
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| 245 | + * spi_mem_dirmap_read() is responsible for calling it again in |
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| 246 | + * this case. |
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| 247 | + * @dirmap_write: write data to the memory device using the direct mapping |
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| 248 | + * created by ->dirmap_create(). The function can return less |
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| 249 | + * data than requested (for example when the request is crossing |
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| 250 | + * the currently mapped area), and the caller of |
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| 251 | + * spi_mem_dirmap_write() is responsible for calling it again in |
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| 252 | + * this case. |
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180 | 253 | * |
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181 | 254 | * This interface should be implemented by SPI controllers providing an |
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182 | 255 | * high-level interface to execute SPI memory operation, which is usually the |
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183 | 256 | * case for QSPI controllers. |
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| 257 | + * |
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| 258 | + * Note on ->dirmap_{read,write}(): drivers should avoid accessing the direct |
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| 259 | + * mapping from the CPU because doing that can stall the CPU waiting for the |
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| 260 | + * SPI mem transaction to finish, and this will make real-time maintainers |
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| 261 | + * unhappy and might make your system less reactive. Instead, drivers should |
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| 262 | + * use DMA to access this direct mapping. |
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184 | 263 | */ |
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185 | 264 | struct spi_controller_mem_ops { |
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186 | 265 | int (*adjust_op_size)(struct spi_mem *mem, struct spi_mem_op *op); |
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.. | .. |
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189 | 268 | int (*exec_op)(struct spi_mem *mem, |
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190 | 269 | const struct spi_mem_op *op); |
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191 | 270 | const char *(*get_name)(struct spi_mem *mem); |
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| 271 | + int (*dirmap_create)(struct spi_mem_dirmap_desc *desc); |
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| 272 | + void (*dirmap_destroy)(struct spi_mem_dirmap_desc *desc); |
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| 273 | + ssize_t (*dirmap_read)(struct spi_mem_dirmap_desc *desc, |
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| 274 | + u64 offs, size_t len, void *buf); |
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| 275 | + ssize_t (*dirmap_write)(struct spi_mem_dirmap_desc *desc, |
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| 276 | + u64 offs, size_t len, const void *buf); |
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192 | 277 | }; |
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193 | 278 | |
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194 | 279 | /** |
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.. | .. |
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222 | 307 | void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr, |
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223 | 308 | const struct spi_mem_op *op, |
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224 | 309 | struct sg_table *sg); |
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| 310 | + |
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| 311 | +bool spi_mem_default_supports_op(struct spi_mem *mem, |
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| 312 | + const struct spi_mem_op *op); |
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| 313 | + |
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| 314 | +bool spi_mem_dtr_supports_op(struct spi_mem *mem, |
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| 315 | + const struct spi_mem_op *op); |
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| 316 | + |
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225 | 317 | #else |
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226 | 318 | static inline int |
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227 | 319 | spi_controller_dma_map_mem_op_data(struct spi_controller *ctlr, |
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.. | .. |
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237 | 329 | struct sg_table *sg) |
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238 | 330 | { |
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239 | 331 | } |
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| 332 | + |
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| 333 | +static inline |
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| 334 | +bool spi_mem_default_supports_op(struct spi_mem *mem, |
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| 335 | + const struct spi_mem_op *op) |
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| 336 | +{ |
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| 337 | + return false; |
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| 338 | +} |
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| 339 | + |
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| 340 | +static inline |
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| 341 | +bool spi_mem_dtr_supports_op(struct spi_mem *mem, |
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| 342 | + const struct spi_mem_op *op) |
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| 343 | +{ |
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| 344 | + return false; |
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| 345 | +} |
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240 | 346 | #endif /* CONFIG_SPI_MEM */ |
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241 | 347 | |
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242 | 348 | int spi_mem_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op); |
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.. | .. |
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249 | 355 | |
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250 | 356 | const char *spi_mem_get_name(struct spi_mem *mem); |
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251 | 357 | |
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| 358 | +struct spi_mem_dirmap_desc * |
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| 359 | +spi_mem_dirmap_create(struct spi_mem *mem, |
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| 360 | + const struct spi_mem_dirmap_info *info); |
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| 361 | +void spi_mem_dirmap_destroy(struct spi_mem_dirmap_desc *desc); |
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| 362 | +ssize_t spi_mem_dirmap_read(struct spi_mem_dirmap_desc *desc, |
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| 363 | + u64 offs, size_t len, void *buf); |
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| 364 | +ssize_t spi_mem_dirmap_write(struct spi_mem_dirmap_desc *desc, |
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| 365 | + u64 offs, size_t len, const void *buf); |
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| 366 | +struct spi_mem_dirmap_desc * |
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| 367 | +devm_spi_mem_dirmap_create(struct device *dev, struct spi_mem *mem, |
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| 368 | + const struct spi_mem_dirmap_info *info); |
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| 369 | +void devm_spi_mem_dirmap_destroy(struct device *dev, |
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| 370 | + struct spi_mem_dirmap_desc *desc); |
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| 371 | + |
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252 | 372 | int spi_mem_driver_register_with_owner(struct spi_mem_driver *drv, |
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253 | 373 | struct module *owner); |
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254 | 374 | |
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