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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/include/linux/soundwire/sdw.h
....@@ -1,8 +1,11 @@
1
-// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2
-// Copyright(c) 2015-17 Intel Corporation.
1
+/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2
+/* Copyright(c) 2015-17 Intel Corporation. */
33 
44 #ifndef __SOUNDWIRE_H
55 #define __SOUNDWIRE_H
6
+
7
+#include <linux/mod_devicetable.h>
8
+#include <linux/bitfield.h>
69 
710 struct sdw_bus;
811 struct sdw_slave;
....@@ -36,10 +39,33 @@
3639 #define SDW_FRAME_CTRL_BITS		48
3740 #define SDW_MAX_DEVICES			11
3841 
39
-#define SDW_VALID_PORT_RANGE(n)		(n <= 14 && n >= 1)
42
+#define SDW_MAX_PORTS			15
43
+#define SDW_VALID_PORT_RANGE(n)		((n) < SDW_MAX_PORTS && (n) >= 1)
4044 
41
-#define SDW_DAI_ID_RANGE_START		100
42
-#define SDW_DAI_ID_RANGE_END		200
45
+enum {
46
+	SDW_PORT_DIRN_SINK = 0,
47
+	SDW_PORT_DIRN_SOURCE,
48
+	SDW_PORT_DIRN_MAX,
49
+};
50
+
51
+/*
52
+ * constants for flow control, ports and transport
53
+ *
54
+ * these are bit masks as devices can have multiple capabilities
55
+ */
56
+
57
+/*
58
+ * flow modes for SDW port. These can be isochronous, tx controlled,
59
+ * rx controlled or async
60
+ */
61
+#define SDW_PORT_FLOW_MODE_ISOCH	0
62
+#define SDW_PORT_FLOW_MODE_TX_CNTRL	BIT(0)
63
+#define SDW_PORT_FLOW_MODE_RX_CNTRL	BIT(1)
64
+#define SDW_PORT_FLOW_MODE_ASYNC	GENMASK(1, 0)
65
+
66
+/* sample packaging for block. It can be per port or per channel */
67
+#define SDW_BLOCK_PACKG_PER_PORT	BIT(0)
68
+#define SDW_BLOCK_PACKG_PER_CH		BIT(1)
4369 
4470 /**
4571  * enum sdw_slave_status - Slave status
....@@ -53,6 +79,21 @@
5379 	SDW_SLAVE_ATTACHED = 1,
5480 	SDW_SLAVE_ALERT = 2,
5581 	SDW_SLAVE_RESERVED = 3,
82
+};
83
+
84
+/**
85
+ * enum sdw_clk_stop_type: clock stop operations
86
+ *
87
+ * @SDW_CLK_PRE_PREPARE: pre clock stop prepare
88
+ * @SDW_CLK_POST_PREPARE: post clock stop prepare
89
+ * @SDW_CLK_PRE_DEPREPARE: pre clock stop de-prepare
90
+ * @SDW_CLK_POST_DEPREPARE: post clock stop de-prepare
91
+ */
92
+enum sdw_clk_stop_type {
93
+	SDW_CLK_PRE_PREPARE = 0,
94
+	SDW_CLK_POST_PREPARE,
95
+	SDW_CLK_PRE_DEPREPARE,
96
+	SDW_CLK_POST_DEPREPARE,
5697 };
5798 
5899 /**
....@@ -74,6 +115,14 @@
74115 	SDW_CMD_FAIL = 2,
75116 	SDW_CMD_TIMEOUT = 3,
76117 	SDW_CMD_FAIL_OTHER = 4,
118
+};
119
+
120
+/* block group count enum */
121
+enum sdw_dpn_grouping {
122
+	SDW_BLK_GRP_CNT_1 = 0,
123
+	SDW_BLK_GRP_CNT_2 = 1,
124
+	SDW_BLK_GRP_CNT_3 = 2,
125
+	SDW_BLK_GRP_CNT_4 = 3,
77126 };
78127 
79128 /**
....@@ -98,6 +147,26 @@
98147 enum sdw_data_direction {
99148 	SDW_DATA_DIR_RX = 0,
100149 	SDW_DATA_DIR_TX = 1,
150
+};
151
+
152
+/**
153
+ * enum sdw_port_data_mode: Data Port mode
154
+ *
155
+ * @SDW_PORT_DATA_MODE_NORMAL: Normal data mode where audio data is received
156
+ * and transmitted.
157
+ * @SDW_PORT_DATA_MODE_PRBS: Test mode which uses a PRBS generator to produce
158
+ * a pseudo random data pattern that is transferred
159
+ * @SDW_PORT_DATA_MODE_STATIC_0: Simple test mode which uses static value of
160
+ * logic 0. The encoding will result in no signal transitions
161
+ * @SDW_PORT_DATA_MODE_STATIC_1: Simple test mode which uses static value of
162
+ * logic 1. The encoding will result in signal transitions at every bitslot
163
+ * owned by this Port
164
+ */
165
+enum sdw_port_data_mode {
166
+	SDW_PORT_DATA_MODE_NORMAL = 0,
167
+	SDW_PORT_DATA_MODE_PRBS = 1,
168
+	SDW_PORT_DATA_MODE_STATIC_0 = 2,
169
+	SDW_PORT_DATA_MODE_STATIC_1 = 3,
101170 };
102171 
103172 /*
....@@ -153,10 +222,11 @@
153222  * (inclusive)
154223  * @num_words: number of wordlengths supported
155224  * @words: wordlengths supported
156
- * @flow_controlled: Slave implementation results in an OK_NotReady
225
+ * @BRA_flow_controlled: Slave implementation results in an OK_NotReady
157226  * response
158227  * @simple_ch_prep_sm: If channel prepare sequence is required
159
- * @device_interrupts: If implementation-defined interrupts are supported
228
+ * @imp_def_interrupts: If set, each bit corresponds to support for
229
+ * implementation-defined interrupts
160230  *
161231  * The wordlengths are specified by Spec as max, min AND number of
162232  * discrete values, implementation can define based on the wordlengths they
....@@ -167,9 +237,9 @@
167237 	u32 min_word;
168238 	u32 num_words;
169239 	u32 *words;
170
-	bool flow_controlled;
240
+	bool BRA_flow_controlled;
171241 	bool simple_ch_prep_sm;
172
-	bool device_interrupts;
242
+	bool imp_def_interrupts;
173243 };
174244 
175245 /**
....@@ -219,18 +289,19 @@
219289  * @simple_ch_prep_sm: If the port supports simplified channel prepare state
220290  * machine
221291  * @ch_prep_timeout: Port-specific timeout value, in milliseconds
222
- * @device_interrupts: If set, each bit corresponds to support for
292
+ * @imp_def_interrupts: If set, each bit corresponds to support for
223293  * implementation-defined interrupts
224294  * @max_ch: Maximum channels supported
225295  * @min_ch: Minimum channels supported
226
- * @num_ch: Number of discrete channels supported
227
- * @ch: Discrete channels supported
296
+ * @num_channels: Number of discrete channels supported
297
+ * @channels: Discrete channels supported
228298  * @num_ch_combinations: Number of channel combinations supported
229299  * @ch_combinations: Channel combinations supported
230300  * @modes: SDW mode supported
231301  * @max_async_buffer: Number of samples that this port can buffer in
232302  * asynchronous modes
233303  * @block_pack_mode: Type of block port mode supported
304
+ * @read_only_wordlength: Read Only wordlength field in DPN_BlockCtrl1 register
234305  * @port_encoding: Payload Channel Sample encoding schemes supported
235306  * @audio_modes: Audio modes supported
236307  */
....@@ -244,16 +315,17 @@
244315 	u32 max_grouping;
245316 	bool simple_ch_prep_sm;
246317 	u32 ch_prep_timeout;
247
-	u32 device_interrupts;
318
+	u32 imp_def_interrupts;
248319 	u32 max_ch;
249320 	u32 min_ch;
250
-	u32 num_ch;
251
-	u32 *ch;
321
+	u32 num_channels;
322
+	u32 *channels;
252323 	u32 num_ch_combinations;
253324 	u32 *ch_combinations;
254325 	u32 modes;
255326 	u32 max_async_buffer;
256327 	bool block_pack_mode;
328
+	bool read_only_wordlength;
257329 	u32 port_encoding;
258330 	struct sdw_dpn_audio_mode *audio_modes;
259331 };
....@@ -285,6 +357,8 @@
285357  * @dp0_prop: Data Port 0 properties
286358  * @src_dpn_prop: Source Data Port N properties
287359  * @sink_dpn_prop: Sink Data Port N properties
360
+ * @scp_int1_mask: SCP_INT1_MASK desired settings
361
+ * @quirks: bitmask identifying deltas from the MIPI specification
288362  */
289363 struct sdw_slave_prop {
290364 	u32 mipi_revision;
....@@ -306,41 +380,45 @@
306380 	struct sdw_dp0_prop *dp0_prop;
307381 	struct sdw_dpn_prop *src_dpn_prop;
308382 	struct sdw_dpn_prop *sink_dpn_prop;
383
+	u8 scp_int1_mask;
384
+	u32 quirks;
309385 };
386
+
387
+#define SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY	BIT(0)
310388 
311389 /**
312390  * struct sdw_master_prop - Master properties
313391  * @revision: MIPI spec version of the implementation
314
- * @master_count: Number of masters
315
- * @clk_stop_mode: Bitmap for Clock Stop modes supported
316
- * @max_freq: Maximum Bus clock frequency, in Hz
392
+ * @clk_stop_modes: Bitmap, bit N set when clock-stop-modeN supported
393
+ * @max_clk_freq: Maximum Bus clock frequency, in Hz
317394  * @num_clk_gears: Number of clock gears supported
318395  * @clk_gears: Clock gears supported
319
- * @num_freq: Number of clock frequencies supported, in Hz
320
- * @freq: Clock frequencies supported, in Hz
396
+ * @num_clk_freq: Number of clock frequencies supported, in Hz
397
+ * @clk_freq: Clock frequencies supported, in Hz
321398  * @default_frame_rate: Controller default Frame rate, in Hz
322399  * @default_row: Number of rows
323400  * @default_col: Number of columns
324
- * @dynamic_frame: Dynamic frame supported
401
+ * @dynamic_frame: Dynamic frame shape supported
325402  * @err_threshold: Number of times that software may retry sending a single
326403  * command
327
- * @dpn_prop: Data Port N properties
404
+ * @mclk_freq: clock reference passed to SoundWire Master, in Hz.
405
+ * @hw_disabled: if true, the Master is not functional, typically due to pin-mux
328406  */
329407 struct sdw_master_prop {
330408 	u32 revision;
331
-	u32 master_count;
332
-	enum sdw_clk_stop_mode clk_stop_mode;
333
-	u32 max_freq;
409
+	u32 clk_stop_modes;
410
+	u32 max_clk_freq;
334411 	u32 num_clk_gears;
335412 	u32 *clk_gears;
336
-	u32 num_freq;
337
-	u32 *freq;
413
+	u32 num_clk_freq;
414
+	u32 *clk_freq;
338415 	u32 default_frame_rate;
339416 	u32 default_row;
340417 	u32 default_col;
341418 	bool dynamic_frame;
342419 	u32 err_threshold;
343
-	struct sdw_dpn_prop *dpn_prop;
420
+	u32 mclk_freq;
421
+	bool hw_disabled;
344422 };
345423 
346424 int sdw_master_read_prop(struct sdw_bus *bus);
....@@ -350,12 +428,13 @@
350428  * SDW Slave Structures and APIs
351429  */
352430 
431
+#define SDW_IGNORED_UNIQUE_ID 0xFF
432
+
353433 /**
354434  * struct sdw_slave_id - Slave ID
355435  * @mfg_id: MIPI Manufacturer ID
356436  * @part_id: Device Part ID
357
- * @class_id: MIPI Class ID, unused now.
358
- * Currently a placeholder in MIPI SoundWire Spec
437
+ * @class_id: MIPI Class ID (defined starting with SoundWire 1.2 spec)
359438  * @unique_id: Device unique ID
360439  * @sdw_version: SDW version implemented
361440  *
....@@ -365,9 +444,38 @@
365444 	__u16 mfg_id;
366445 	__u16 part_id;
367446 	__u8 class_id;
368
-	__u8 unique_id:4;
447
+	__u8 unique_id;
369448 	__u8 sdw_version:4;
370449 };
450
+
451
+/*
452
+ * Helper macros to extract the MIPI-defined IDs
453
+ *
454
+ * Spec definition
455
+ *   Register		Bit	Contents
456
+ *   DevId_0 [7:4]	47:44	sdw_version
457
+ *   DevId_0 [3:0]	43:40	unique_id
458
+ *   DevId_1		39:32	mfg_id [15:8]
459
+ *   DevId_2		31:24	mfg_id [7:0]
460
+ *   DevId_3		23:16	part_id [15:8]
461
+ *   DevId_4		15:08	part_id [7:0]
462
+ *   DevId_5		07:00	class_id
463
+ *
464
+ * The MIPI DisCo for SoundWire defines in addition the link_id as bits 51:48
465
+ */
466
+#define SDW_DISCO_LINK_ID_MASK	GENMASK_ULL(51, 48)
467
+#define SDW_VERSION_MASK	GENMASK_ULL(47, 44)
468
+#define SDW_UNIQUE_ID_MASK	GENMASK_ULL(43, 40)
469
+#define SDW_MFG_ID_MASK		GENMASK_ULL(39, 24)
470
+#define SDW_PART_ID_MASK	GENMASK_ULL(23, 8)
471
+#define SDW_CLASS_ID_MASK	GENMASK_ULL(7, 0)
472
+
473
+#define SDW_DISCO_LINK_ID(addr)	FIELD_GET(SDW_DISCO_LINK_ID_MASK, addr)
474
+#define SDW_VERSION(addr)	FIELD_GET(SDW_VERSION_MASK, addr)
475
+#define SDW_UNIQUE_ID(addr)	FIELD_GET(SDW_UNIQUE_ID_MASK, addr)
476
+#define SDW_MFG_ID(addr)	FIELD_GET(SDW_MFG_ID_MASK, addr)
477
+#define SDW_PART_ID(addr)	FIELD_GET(SDW_PART_ID_MASK, addr)
478
+#define SDW_CLASS_ID(addr)	FIELD_GET(SDW_CLASS_ID_MASK, addr)
371479 
372480 /**
373481  * struct sdw_slave_intr_status - Slave interrupt status
....@@ -446,6 +554,10 @@
446554  * @bandwidth: Current bandwidth
447555  * @col: Active columns
448556  * @row: Active rows
557
+ * @s_data_mode: NORMAL, STATIC or PRBS mode for all Slave ports
558
+ * @m_data_mode: NORMAL, STATIC or PRBS mode for all Master ports. The value
559
+ * should be the same to detect transmission issues, but can be different to
560
+ * test the interrupt reports
449561  */
450562 struct sdw_bus_params {
451563 	enum sdw_reg_bank curr_bank;
....@@ -455,6 +567,8 @@
455567 	unsigned int bandwidth;
456568 	unsigned int col;
457569 	unsigned int row;
570
+	int s_data_mode;
571
+	int m_data_mode;
458572 };
459573 
460574 /**
....@@ -470,14 +584,19 @@
470584 struct sdw_slave_ops {
471585 	int (*read_prop)(struct sdw_slave *sdw);
472586 	int (*interrupt_callback)(struct sdw_slave *slave,
473
-			struct sdw_slave_intr_status *status);
587
+				  struct sdw_slave_intr_status *status);
474588 	int (*update_status)(struct sdw_slave *slave,
475
-			enum sdw_slave_status status);
589
+			     enum sdw_slave_status status);
476590 	int (*bus_config)(struct sdw_slave *slave,
477
-			struct sdw_bus_params *params);
591
+			  struct sdw_bus_params *params);
478592 	int (*port_prep)(struct sdw_slave *slave,
479
-			struct sdw_prepare_ch *prepare_ch,
480
-			enum sdw_port_prep_ops pre_ops);
593
+			 struct sdw_prepare_ch *prepare_ch,
594
+			 enum sdw_port_prep_ops pre_ops);
595
+	int (*get_clk_stop_mode)(struct sdw_slave *slave);
596
+	int (*clk_stop)(struct sdw_slave *slave,
597
+			enum sdw_clk_stop_mode mode,
598
+			enum sdw_clk_stop_type type);
599
+
481600 };
482601 
483602 /**
....@@ -488,9 +607,27 @@
488607  * @bus: Bus handle
489608  * @ops: Slave callback ops
490609  * @prop: Slave properties
610
+ * @debugfs: Slave debugfs
491611  * @node: node for bus list
492612  * @port_ready: Port ready completion flag for each Slave port
493
- * @dev_num: Device Number assigned by Bus
613
+ * @dev_num: Current Device Number, values can be 0 or dev_num_sticky
614
+ * @dev_num_sticky: one-time static Device Number assigned by Bus
615
+ * @probed: boolean tracking driver state
616
+ * @probe_complete: completion utility to control potential races
617
+ * on startup between driver probe/initialization and SoundWire
618
+ * Slave state changes/implementation-defined interrupts
619
+ * @enumeration_complete: completion utility to control potential races
620
+ * on startup between device enumeration and read/write access to the
621
+ * Slave device
622
+ * @initialization_complete: completion utility to control potential races
623
+ * on startup between device enumeration and settings being restored
624
+ * @unattach_request: mask field to keep track why the Slave re-attached and
625
+ * was re-initialized. This is useful to deal with potential race conditions
626
+ * between the Master suspending and the codec resuming, and make sure that
627
+ * when the Master triggered a reset the Slave is properly enumerated and
628
+ * initialized
629
+ * @first_interrupt_done: status flag tracking if the interrupt handling
630
+ * for a Slave happens for the first time after enumeration
494631  */
495632 struct sdw_slave {
496633 	struct sdw_slave_id id;
....@@ -499,12 +636,36 @@
499636 	struct sdw_bus *bus;
500637 	const struct sdw_slave_ops *ops;
501638 	struct sdw_slave_prop prop;
639
+#ifdef CONFIG_DEBUG_FS
640
+	struct dentry *debugfs;
641
+#endif
502642 	struct list_head node;
503
-	struct completion *port_ready;
643
+	struct completion port_ready[SDW_MAX_PORTS];
644
+	enum sdw_clk_stop_mode curr_clk_stop_mode;
504645 	u16 dev_num;
646
+	u16 dev_num_sticky;
647
+	bool probed;
648
+	struct completion probe_complete;
649
+	struct completion enumeration_complete;
650
+	struct completion initialization_complete;
651
+	u32 unattach_request;
652
+	bool first_interrupt_done;
505653 };
506654 
507655 #define dev_to_sdw_dev(_dev) container_of(_dev, struct sdw_slave, dev)
656
+
657
+/**
658
+ * struct sdw_master_device - SoundWire 'Master Device' representation
659
+ * @dev: Linux device for this Master
660
+ * @bus: Bus handle shortcut
661
+ */
662
+struct sdw_master_device {
663
+	struct device dev;
664
+	struct sdw_bus *bus;
665
+};
666
+
667
+#define dev_to_sdw_master_device(d)	\
668
+	container_of(d, struct sdw_master_device, dev)
508669 
509670 struct sdw_driver {
510671 	const char *name;
....@@ -520,9 +681,13 @@
520681 	struct device_driver driver;
521682 };
522683 
523
-#define SDW_SLAVE_ENTRY(_mfg_id, _part_id, _drv_data) \
524
-	{ .mfg_id = (_mfg_id), .part_id = (_part_id), \
684
+#define SDW_SLAVE_ENTRY_EXT(_mfg_id, _part_id, _version, _c_id, _drv_data) \
685
+	{ .mfg_id = (_mfg_id), .part_id = (_part_id),		\
686
+	  .sdw_version = (_version), .class_id = (_c_id),	\
525687 	  .driver_data = (unsigned long)(_drv_data) }
688
+
689
+#define SDW_SLAVE_ENTRY(_mfg_id, _part_id, _drv_data)	\
690
+	SDW_SLAVE_ENTRY_EXT((_mfg_id), (_part_id), 0, 0, (_drv_data))
526691 
527692 int sdw_handle_slave_status(struct sdw_bus *bus,
528693 			enum sdw_slave_status status[]);
....@@ -661,13 +826,16 @@
661826 
662827 /**
663828  * struct sdw_bus - SoundWire bus
664
- * @dev: Master linux device
829
+ * @dev: Shortcut to &bus->md->dev to avoid changing the entire code.
830
+ * @md: Master device
665831  * @link_id: Link id number, can be 0 to N, unique for each Master
832
+ * @id: bus system-wide unique id
666833  * @slaves: list of Slaves on this bus
667834  * @assigned: Bitmap for Slave device numbers.
668835  * Bit set implies used number, bit clear implies unused number.
669836  * @bus_lock: bus lock
670837  * @msg_lock: message lock
838
+ * @compute_params: points to Bus resource management implementation
671839  * @ops: Master callback ops
672840  * @port_ops: Master port callback ops
673841  * @params: Current bus parameters
....@@ -675,29 +843,47 @@
675843  * @m_rt_list: List of Master instance of all stream(s) running on Bus. This
676844  * is used to compute and program bus bandwidth, clock, frame shape,
677845  * transport and port parameters
846
+ * @debugfs: Bus debugfs
678847  * @defer_msg: Defer message
679848  * @clk_stop_timeout: Clock stop timeout computed
680849  * @bank_switch_timeout: Bank switch timeout computed
850
+ * @multi_link: Store bus property that indicates if multi links
851
+ * are supported. This flag is populated by drivers after reading
852
+ * appropriate firmware (ACPI/DT).
853
+ * @hw_sync_min_links: Number of links used by a stream above which
854
+ * hardware-based synchronization is required. This value is only
855
+ * meaningful if multi_link is set. If set to 1, hardware-based
856
+ * synchronization will be used even if a stream only uses a single
857
+ * SoundWire segment.
681858  */
682859 struct sdw_bus {
683860 	struct device *dev;
861
+	struct sdw_master_device *md;
684862 	unsigned int link_id;
863
+	int id;
685864 	struct list_head slaves;
686865 	DECLARE_BITMAP(assigned, SDW_MAX_DEVICES);
687866 	struct mutex bus_lock;
688867 	struct mutex msg_lock;
868
+	int (*compute_params)(struct sdw_bus *bus);
689869 	const struct sdw_master_ops *ops;
690870 	const struct sdw_master_port_ops *port_ops;
691871 	struct sdw_bus_params params;
692872 	struct sdw_master_prop prop;
693873 	struct list_head m_rt_list;
874
+#ifdef CONFIG_DEBUG_FS
875
+	struct dentry *debugfs;
876
+#endif
694877 	struct sdw_defer defer_msg;
695878 	unsigned int clk_stop_timeout;
696879 	u32 bank_switch_timeout;
880
+	bool multi_link;
881
+	int hw_sync_min_links;
697882 };
698883 
699
-int sdw_add_bus_master(struct sdw_bus *bus);
700
-void sdw_delete_bus_master(struct sdw_bus *bus);
884
+int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
885
+		       struct fwnode_handle *fwnode);
886
+void sdw_bus_master_delete(struct sdw_bus *bus);
701887 
702888 /**
703889  * sdw_port_config: Master or Slave Port configuration
....@@ -768,18 +954,25 @@
768954  * @params: Stream parameters
769955  * @state: Current state of the stream
770956  * @type: Stream type PCM or PDM
771
- * @m_rt: Master runtime
957
+ * @master_list: List of Master runtime(s) in this stream.
958
+ * master_list can contain only one m_rt per Master instance
959
+ * for a stream
960
+ * @m_rt_count: Count of Master runtime(s) in this stream
772961  */
773962 struct sdw_stream_runtime {
774
-	char *name;
963
+	const char *name;
775964 	struct sdw_stream_params params;
776965 	enum sdw_stream_state state;
777966 	enum sdw_stream_type type;
778
-	struct sdw_master_runtime *m_rt;
967
+	struct list_head master_list;
968
+	int m_rt_count;
779969 };
780970 
781
-struct sdw_stream_runtime *sdw_alloc_stream(char *stream_name);
971
+struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name);
782972 void sdw_release_stream(struct sdw_stream_runtime *stream);
973
+
974
+int sdw_compute_params(struct sdw_bus *bus);
975
+
783976 int sdw_stream_add_master(struct sdw_bus *bus,
784977 		struct sdw_stream_config *stream_config,
785978 		struct sdw_port_config *port_config,
....@@ -794,15 +987,22 @@
794987 		struct sdw_stream_runtime *stream);
795988 int sdw_stream_remove_slave(struct sdw_slave *slave,
796989 		struct sdw_stream_runtime *stream);
990
+int sdw_startup_stream(void *sdw_substream);
797991 int sdw_prepare_stream(struct sdw_stream_runtime *stream);
798992 int sdw_enable_stream(struct sdw_stream_runtime *stream);
799993 int sdw_disable_stream(struct sdw_stream_runtime *stream);
800994 int sdw_deprepare_stream(struct sdw_stream_runtime *stream);
995
+void sdw_shutdown_stream(void *sdw_substream);
996
+int sdw_bus_prep_clk_stop(struct sdw_bus *bus);
997
+int sdw_bus_clk_stop(struct sdw_bus *bus);
998
+int sdw_bus_exit_clk_stop(struct sdw_bus *bus);
801999 
8021000 /* messaging and data APIs */
8031001 
8041002 int sdw_read(struct sdw_slave *slave, u32 addr);
8051003 int sdw_write(struct sdw_slave *slave, u32 addr, u8 value);
1004
+int sdw_write_no_pm(struct sdw_slave *slave, u32 addr, u8 value);
1005
+int sdw_read_no_pm(struct sdw_slave *slave, u32 addr);
8061006 int sdw_nread(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
8071007 int sdw_nwrite(struct sdw_slave *slave, u32 addr, size_t count, u8 *val);
8081008