hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c
kernel/include/linux/mlx5/port.h
....@@ -60,6 +60,7 @@
6060 #define MLX5_I2C_ADDR_LOW 0x50
6161 #define MLX5_I2C_ADDR_HIGH 0x51
6262 #define MLX5_EEPROM_PAGE_LENGTH 256
63
+#define MLX5_EEPROM_HIGH_PAGE_LENGTH 128
6364
6465 enum mlx5e_link_mode {
6566 MLX5E_1000BASE_CX_SGMII = 0,
....@@ -92,6 +93,25 @@
9293 MLX5E_LINK_MODES_NUMBER,
9394 };
9495
96
+enum mlx5e_ext_link_mode {
97
+ MLX5E_SGMII_100M = 0,
98
+ MLX5E_1000BASE_X_SGMII = 1,
99
+ MLX5E_5GBASE_R = 3,
100
+ MLX5E_10GBASE_XFI_XAUI_1 = 4,
101
+ MLX5E_40GBASE_XLAUI_4_XLPPI_4 = 5,
102
+ MLX5E_25GAUI_1_25GBASE_CR_KR = 6,
103
+ MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2 = 7,
104
+ MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR = 8,
105
+ MLX5E_CAUI_4_100GBASE_CR4_KR4 = 9,
106
+ MLX5E_100GAUI_2_100GBASE_CR2_KR2 = 10,
107
+ MLX5E_100GAUI_1_100GBASE_CR_KR = 11,
108
+ MLX5E_200GAUI_4_200GBASE_CR4_KR4 = 12,
109
+ MLX5E_200GAUI_2_200GBASE_CR2_KR2 = 13,
110
+ MLX5E_400GAUI_8 = 15,
111
+ MLX5E_400GAUI_4_400GBASE_CR4_KR4 = 16,
112
+ MLX5E_EXT_LINK_MODES_NUMBER,
113
+};
114
+
95115 enum mlx5e_connector_type {
96116 MLX5E_PORT_UNKNOWN = 0,
97117 MLX5E_PORT_NONE = 1,
....@@ -105,35 +125,31 @@
105125 MLX5E_CONNECTOR_TYPE_NUMBER,
106126 };
107127
108
-#define MLX5E_PROT_MASK(link_mode) (1 << link_mode)
128
+enum mlx5_ptys_width {
129
+ MLX5_PTYS_WIDTH_1X = 1 << 0,
130
+ MLX5_PTYS_WIDTH_2X = 1 << 1,
131
+ MLX5_PTYS_WIDTH_4X = 1 << 2,
132
+ MLX5_PTYS_WIDTH_8X = 1 << 3,
133
+ MLX5_PTYS_WIDTH_12X = 1 << 4,
134
+};
109135
110
-#define PORT_MODULE_EVENT_MODULE_STATUS_MASK 0xF
111
-#define PORT_MODULE_EVENT_ERROR_TYPE_MASK 0xF
136
+#define MLX5E_PROT_MASK(link_mode) (1 << link_mode)
137
+#define MLX5_GET_ETH_PROTO(reg, out, ext, field) \
138
+ (ext ? MLX5_GET(reg, out, ext_##field) : \
139
+ MLX5_GET(reg, out, field))
112140
113141 int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps);
114142 int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys,
115143 int ptys_size, int proto_mask, u8 local_port);
116
-int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev,
117
- u32 *proto_cap, int proto_mask);
118
-int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev,
119
- u32 *proto_admin, int proto_mask);
120
-int mlx5_query_port_link_width_oper(struct mlx5_core_dev *dev,
121
- u8 *link_width_oper, u8 local_port);
122
-int mlx5_query_port_ib_proto_oper(struct mlx5_core_dev *dev,
123
- u8 *proto_oper, u8 local_port);
124
-int mlx5_query_port_eth_proto_oper(struct mlx5_core_dev *dev,
125
- u32 *proto_oper, u8 local_port);
126
-int mlx5_set_port_ptys(struct mlx5_core_dev *dev, bool an_disable,
127
- u32 proto_admin, int proto_mask);
144
+
145
+int mlx5_query_ib_port_oper(struct mlx5_core_dev *dev, u16 *link_width_oper,
146
+ u16 *proto_oper, u8 local_port);
128147 void mlx5_toggle_port_link(struct mlx5_core_dev *dev);
129148 int mlx5_set_port_admin_status(struct mlx5_core_dev *dev,
130149 enum mlx5_port_status status);
131150 int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
132151 enum mlx5_port_status *status);
133152 int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
134
-void mlx5_query_port_autoneg(struct mlx5_core_dev *dev, int proto_mask,
135
- u8 *an_status,
136
- u8 *an_disable_cap, u8 *an_disable_admin);
137153
138154 int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
139155 void mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, u16 *max_mtu, u8 port);
....@@ -177,6 +193,8 @@
177193 int mlx5_set_port_wol(struct mlx5_core_dev *mdev, u8 wol_mode);
178194 int mlx5_query_port_wol(struct mlx5_core_dev *mdev, u8 *wol_mode);
179195
196
+int mlx5_query_ports_check(struct mlx5_core_dev *mdev, u32 *out, int outlen);
197
+int mlx5_set_ports_check(struct mlx5_core_dev *mdev, u32 *in, int inlen);
180198 int mlx5_set_port_fcs(struct mlx5_core_dev *mdev, u8 enable);
181199 void mlx5_query_port_fcs(struct mlx5_core_dev *mdev, bool *supported,
182200 bool *enabled);