forked from ~ljy/RK356X_SDK_RELEASE

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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/include/dt-bindings/clock/tegra30-car.h
....@@ -196,6 +196,8 @@
196196 #define TEGRA30_CLK_CLK_M 171
197197 #define TEGRA30_CLK_CLK_M_DIV2 172
198198 #define TEGRA30_CLK_CLK_M_DIV4 173
199
+#define TEGRA30_CLK_OSC_DIV2 172
200
+#define TEGRA30_CLK_OSC_DIV4 173
199201 #define TEGRA30_CLK_PLL_REF 174
200202 #define TEGRA30_CLK_PLL_C 175
201203 #define TEGRA30_CLK_PLL_C_OUT1 176
....@@ -230,11 +232,11 @@
230232 #define TEGRA30_CLK_AUDIO3 204
231233 #define TEGRA30_CLK_AUDIO4 205
232234 #define TEGRA30_CLK_SPDIF 206
233
-#define TEGRA30_CLK_CLK_OUT_1 207 /* (extern1) */
234
-#define TEGRA30_CLK_CLK_OUT_2 208 /* (extern2) */
235
-#define TEGRA30_CLK_CLK_OUT_3 209 /* (extern3) */
235
+/* 207 */
236
+/* 208 */
237
+/* 209 */
236238 #define TEGRA30_CLK_SCLK 210
237
-#define TEGRA30_CLK_BLINK 211
239
+/* 211 */
238240 #define TEGRA30_CLK_CCLK_G 212
239241 #define TEGRA30_CLK_CCLK_LP 213
240242 #define TEGRA30_CLK_TWD 214
....@@ -243,7 +245,7 @@
243245 #define TEGRA30_CLK_HCLK 217
244246 #define TEGRA30_CLK_PCLK 218
245247 /* 219 */
246
-/* 220 */
248
+#define TEGRA30_CLK_OSC 220
247249 /* 221 */
248250 /* 222 */
249251 /* 223 */
....@@ -260,9 +262,9 @@
260262 /* 297 */
261263 /* 298 */
262264 /* 299 */
263
-#define TEGRA30_CLK_CLK_OUT_1_MUX 300
264
-#define TEGRA30_CLK_CLK_OUT_2_MUX 301
265
-#define TEGRA30_CLK_CLK_OUT_3_MUX 302
265
+/* 300 */
266
+/* 301 */
267
+/* 302 */
266268 #define TEGRA30_CLK_AUDIO0_MUX 303
267269 #define TEGRA30_CLK_AUDIO1_MUX 304
268270 #define TEGRA30_CLK_AUDIO2_MUX 305