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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/include/dt-bindings/clock/exynos5420.h
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@@ -1,13 +1,10 @@
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+/* SPDX-License-Identifier: GPL-2.0 */
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 /*
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  * Copyright (c) 2013 Samsung Electronics Co., Ltd.
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  * Author: Andrzej Hajda <a.hajda@samsung.com>
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  *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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- *
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  * Device Tree binding constants for Exynos5420 clock controller.
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-*/
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+ */
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 #ifndef _DT_BINDINGS_CLOCK_EXYNOS_5420_H
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 #define _DT_BINDINGS_CLOCK_EXYNOS_5420_H
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@@ -63,6 +60,7 @@
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 #define CLK_MAU_EPLL		159
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 #define CLK_SCLK_HSIC_12M	160
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 #define CLK_SCLK_MPHY_IXTAL24	161
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+#define CLK_SCLK_BPLL		162
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 /* gate clocks */
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 #define CLK_UART0		257
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@@ -198,6 +196,16 @@
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 #define CLK_ACLK432_CAM		518
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 #define CLK_ACLK_FL1550_CAM	519
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 #define CLK_ACLK550_CAM		520
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+#define CLK_CLKM_PHY0		521
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+#define CLK_CLKM_PHY1		522
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+#define CLK_ACLK_PPMU_DREX0_0	523
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+#define CLK_ACLK_PPMU_DREX0_1	524
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+#define CLK_ACLK_PPMU_DREX1_0	525
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+#define CLK_ACLK_PPMU_DREX1_1	526
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+#define CLK_PCLK_PPMU_DREX0_0	527
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+#define CLK_PCLK_PPMU_DREX0_1	528
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+#define CLK_PCLK_PPMU_DREX1_0	529
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+#define CLK_PCLK_PPMU_DREX1_1	530
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 /* mux clocks */
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 #define CLK_MOUT_HDMI		640
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@@ -220,6 +228,14 @@
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 #define CLK_MOUT_EPLL		657
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 #define CLK_MOUT_MAU_EPLL	658
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 #define CLK_MOUT_USER_MAU_EPLL	659
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+#define CLK_MOUT_SCLK_SPLL	660
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+#define CLK_MOUT_MX_MSPLL_CCORE_PHY	661
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+#define CLK_MOUT_SW_ACLK_G3D	662
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+#define CLK_MOUT_APLL		663
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+#define CLK_MOUT_MSPLL_CPU	664
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+#define CLK_MOUT_KPLL		665
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+#define CLK_MOUT_MSPLL_KFC	666
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+
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 /* divider clocks */
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 #define CLK_DOUT_PIXEL		768
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@@ -251,8 +267,11 @@
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 #define CLK_DOUT_CCLK_DREX0	794
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 #define CLK_DOUT_CLK2X_PHY0	795
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 #define CLK_DOUT_PCLK_CORE_MEM	796
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+#define CLK_FF_DOUT_SPLL2	797
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+#define CLK_DOUT_PCLK_DREX0	798
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+#define CLK_DOUT_PCLK_DREX1	799
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 /* must be greater than maximal clock id */
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-#define CLK_NR_CLKS		797
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+#define CLK_NR_CLKS		800
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 #endif /* _DT_BINDINGS_CLOCK_EXYNOS_5420_H */