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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/video/fbdev/omap2/omapfb/dss/dispc.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * linux/drivers/video/omap2/dss/dispc.c
34  *
....@@ -6,18 +7,6 @@
67  *
78  * Some code and ideas taken from drivers/video/omap/ driver
89  * by Imre Deak.
9
- *
10
- * This program is free software; you can redistribute it and/or modify it
11
- * under the terms of the GNU General Public License version 2 as published by
12
- * the Free Software Foundation.
13
- *
14
- * This program is distributed in the hope that it will be useful, but WITHOUT
15
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17
- * more details.
18
- *
19
- * You should have received a copy of the GNU General Public License along with
20
- * this program.  If not, see <http://www.gnu.org/licenses/>.
2110  */
2211 
2312 #define DSS_SUBSYS_NAME "DISPC"
....@@ -571,11 +560,6 @@
571560 }
572561 EXPORT_SYMBOL(dispc_mgr_get_sync_lost_irq);
573562 
574
-u32 dispc_wb_get_framedone_irq(void)
575
-{
576
-	return DISPC_IRQ_FRAMEDONEWB;
577
-}
578
-
579563 bool dispc_mgr_go_busy(enum omap_channel channel)
580564 {
581565 	return mgr_fld_read(channel, DISPC_MGR_FLD_GO) == 1;
....@@ -592,30 +576,6 @@
592576 	mgr_fld_write(channel, DISPC_MGR_FLD_GO, 1);
593577 }
594578 EXPORT_SYMBOL(dispc_mgr_go);
595
-
596
-bool dispc_wb_go_busy(void)
597
-{
598
-	return REG_GET(DISPC_CONTROL2, 6, 6) == 1;
599
-}
600
-
601
-void dispc_wb_go(void)
602
-{
603
-	enum omap_plane plane = OMAP_DSS_WB;
604
-	bool enable, go;
605
-
606
-	enable = REG_GET(DISPC_OVL_ATTRIBUTES(plane), 0, 0) == 1;
607
-
608
-	if (!enable)
609
-		return;
610
-
611
-	go = REG_GET(DISPC_CONTROL2, 6, 6) == 1;
612
-	if (go) {
613
-		DSSERR("GO bit not down for WB\n");
614
-		return;
615
-	}
616
-
617
-	REG_FLD_MOD(DISPC_CONTROL2, 1, 6, 6);
618
-}
619579 
620580 static void dispc_ovl_write_firh_reg(enum omap_plane plane, int reg, u32 value)
621581 {
....@@ -931,7 +891,7 @@
931891 static void dispc_ovl_configure_burst_type(enum omap_plane plane,
932892 		enum omap_dss_rotation_type rotation_type)
933893 {
934
-	if (dss_has_feature(FEAT_BURST_2D) == 0)
894
+	if (!dss_has_feature(FEAT_BURST_2D))
935895 		return;
936896 
937897 	if (rotation_type == OMAP_DSS_ROT_TILER)
....@@ -1040,13 +1000,6 @@
10401000 	case 3:
10411001 		return OMAP_DSS_CHANNEL_WB;
10421002 	}
1043
-}
1044
-
1045
-void dispc_wb_set_channel_in(enum dss_writeback_channel channel)
1046
-{
1047
-	enum omap_plane plane = OMAP_DSS_WB;
1048
-
1049
-	REG_FLD_MOD(DISPC_OVL_ATTRIBUTES(plane), channel, 18, 16);
10501003 }
10511004 
10521005 static void dispc_ovl_set_burst_size(enum omap_plane plane,
....@@ -1649,7 +1602,7 @@
16491602 {
16501603 	int scale_x = out_width != orig_width;
16511604 	int scale_y = out_height != orig_height;
1652
-	bool chroma_upscale = plane != OMAP_DSS_WB ? true : false;
1605
+	bool chroma_upscale = plane != OMAP_DSS_WB;
16531606 
16541607 	if (!dss_has_feature(FEAT_HANDLE_UV_SEPARATE))
16551608 		return;
....@@ -1908,7 +1861,7 @@
19081861 		if (color_mode == OMAP_DSS_COLOR_YUV2 ||
19091862 			color_mode == OMAP_DSS_COLOR_UYVY)
19101863 			width = width >> 1;
1911
-		/* fall through */
1864
+		fallthrough;
19121865 	case OMAP_DSS_ROT_90:
19131866 	case OMAP_DSS_ROT_270:
19141867 		*offset1 = 0;
....@@ -1931,7 +1884,7 @@
19311884 		if (color_mode == OMAP_DSS_COLOR_YUV2 ||
19321885 			color_mode == OMAP_DSS_COLOR_UYVY)
19331886 			width = width >> 1;
1934
-		/* fall through */
1887
+		fallthrough;
19351888 	case OMAP_DSS_ROT_90 + 4:
19361889 	case OMAP_DSS_ROT_270 + 4:
19371890 		*offset1 = 0;
....@@ -2819,74 +2772,6 @@
28192772 }
28202773 EXPORT_SYMBOL(dispc_ovl_setup);
28212774 
2822
-int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
2823
-		bool mem_to_mem, const struct omap_video_timings *mgr_timings)
2824
-{
2825
-	int r;
2826
-	u32 l;
2827
-	enum omap_plane plane = OMAP_DSS_WB;
2828
-	const int pos_x = 0, pos_y = 0;
2829
-	const u8 zorder = 0, global_alpha = 0;
2830
-	const bool replication = false;
2831
-	bool truncation;
2832
-	int in_width = mgr_timings->x_res;
2833
-	int in_height = mgr_timings->y_res;
2834
-	enum omap_overlay_caps caps =
2835
-		OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA;
2836
-
2837
-	DSSDBG("dispc_wb_setup, pa %x, pa_uv %x, %d,%d -> %dx%d, cmode %x, "
2838
-		"rot %d, mir %d\n", wi->paddr, wi->p_uv_addr, in_width,
2839
-		in_height, wi->width, wi->height, wi->color_mode, wi->rotation,
2840
-		wi->mirror);
2841
-
2842
-	r = dispc_ovl_setup_common(plane, caps, wi->paddr, wi->p_uv_addr,
2843
-		wi->buf_width, pos_x, pos_y, in_width, in_height, wi->width,
2844
-		wi->height, wi->color_mode, wi->rotation, wi->mirror, zorder,
2845
-		wi->pre_mult_alpha, global_alpha, wi->rotation_type,
2846
-		replication, mgr_timings, mem_to_mem);
2847
-
2848
-	switch (wi->color_mode) {
2849
-	case OMAP_DSS_COLOR_RGB16:
2850
-	case OMAP_DSS_COLOR_RGB24P:
2851
-	case OMAP_DSS_COLOR_ARGB16:
2852
-	case OMAP_DSS_COLOR_RGBA16:
2853
-	case OMAP_DSS_COLOR_RGB12U:
2854
-	case OMAP_DSS_COLOR_ARGB16_1555:
2855
-	case OMAP_DSS_COLOR_XRGB16_1555:
2856
-	case OMAP_DSS_COLOR_RGBX16:
2857
-		truncation = true;
2858
-		break;
2859
-	default:
2860
-		truncation = false;
2861
-		break;
2862
-	}
2863
-
2864
-	/* setup extra DISPC_WB_ATTRIBUTES */
2865
-	l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));
2866
-	l = FLD_MOD(l, truncation, 10, 10);	/* TRUNCATIONENABLE */
2867
-	l = FLD_MOD(l, mem_to_mem, 19, 19);	/* WRITEBACKMODE */
2868
-	if (mem_to_mem)
2869
-		l = FLD_MOD(l, 1, 26, 24);	/* CAPTUREMODE */
2870
-	else
2871
-		l = FLD_MOD(l, 0, 26, 24);	/* CAPTUREMODE */
2872
-	dispc_write_reg(DISPC_OVL_ATTRIBUTES(plane), l);
2873
-
2874
-	if (mem_to_mem) {
2875
-		/* WBDELAYCOUNT */
2876
-		REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), 0, 7, 0);
2877
-	} else {
2878
-		int wbdelay;
2879
-
2880
-		wbdelay = min(mgr_timings->vfp + mgr_timings->vsw +
2881
-			mgr_timings->vbp, 255);
2882
-
2883
-		/* WBDELAYCOUNT */
2884
-		REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0);
2885
-	}
2886
-
2887
-	return r;
2888
-}
2889
-
28902775 int dispc_ovl_enable(enum omap_plane plane, bool enable)
28912776 {
28922777 	DSSDBG("dispc_enable_plane %d, %d\n", plane, enable);
....@@ -2916,16 +2801,6 @@
29162801 	return !!mgr_fld_read(channel, DISPC_MGR_FLD_ENABLE);
29172802 }
29182803 EXPORT_SYMBOL(dispc_mgr_is_enabled);
2919
-
2920
-void dispc_wb_enable(bool enable)
2921
-{
2922
-	dispc_ovl_enable(OMAP_DSS_WB, enable);
2923
-}
2924
-
2925
-bool dispc_wb_is_enabled(void)
2926
-{
2927
-	return dispc_ovl_enabled(OMAP_DSS_WB);
2928
-}
29292804 
29302805 static void dispc_lcd_enable_signal_polarity(bool act_high)
29312806 {
....@@ -3114,9 +2989,9 @@
31142989 		unsigned long pclk)
31152990 {
31162991 	if (dss_mgr_is_lcd(channel))
3117
-		return pclk <= dispc.feat->max_lcd_pclk ? true : false;
2992
+		return pclk <= dispc.feat->max_lcd_pclk;
31182993 	else
3119
-		return pclk <= dispc.feat->max_tv_pclk ? true : false;
2994
+		return pclk <= dispc.feat->max_tv_pclk;
31202995 }
31212996 
31222997 bool dispc_mgr_timings_ok(enum omap_channel channel,