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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/usb/host/pci-quirks.c
..
..
@@ -16,6 +16,9 @@
16
16
 #include <linux/export.h>
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17
 #include <linux/acpi.h>
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18
 #include <linux/dmi.h>
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+#include <linux/of.h>
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+#include <linux/iopoll.h>
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+
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22
 #include "pci-quirks.h"
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23
 #include "xhci-ext-caps.h"
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24
 
..
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@@ -132,7 +135,7 @@
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 	struct amd_chipset_type sb_type;
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136
 	int isoc_reqs;
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137
 	int probe_count;
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-	int probe_result;
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+	bool need_pll_quirk;
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139
 } amd_chipset;
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140
 
138
141
 static DEFINE_SPINLOCK(amd_lock);
..
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@@ -201,11 +204,11 @@
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 }
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205
 EXPORT_SYMBOL_GPL(sb800_prefetch);
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206
 
204
-int usb_amd_find_chipset_info(void)
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+static void usb_amd_find_chipset_info(void)
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208
 {
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 	unsigned long flags;
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 	struct amd_chipset_info info;
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-	int need_pll_quirk = 0;
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+	info.need_pll_quirk = false;
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212
 
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 	spin_lock_irqsave(&amd_lock, flags);
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214
 
..
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@@ -213,7 +216,7 @@
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 	if (amd_chipset.probe_count > 0) {
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 		amd_chipset.probe_count++;
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 		spin_unlock_irqrestore(&amd_lock, flags);
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-		return amd_chipset.probe_result;
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+		return;
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220
 	}
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 	memset(&info, 0, sizeof(info));
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 	spin_unlock_irqrestore(&amd_lock, flags);
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@@ -224,19 +227,19 @@
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227
 
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 	switch (info.sb_type.gen) {
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 	case AMD_CHIPSET_SB700:
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-		need_pll_quirk = info.sb_type.rev <= 0x3B;
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+		info.need_pll_quirk = info.sb_type.rev <= 0x3B;
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231
 		break;
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232
 	case AMD_CHIPSET_SB800:
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 	case AMD_CHIPSET_HUDSON2:
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 	case AMD_CHIPSET_BOLTON:
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-		need_pll_quirk = 1;
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+		info.need_pll_quirk = true;
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236
 		break;
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 	default:
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-		need_pll_quirk = 0;
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+		info.need_pll_quirk = false;
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 		break;
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 	}
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241
 
239
-	if (!need_pll_quirk) {
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+	if (!info.need_pll_quirk) {
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 		if (info.smbus_dev) {
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 			pci_dev_put(info.smbus_dev);
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 			info.smbus_dev = NULL;
..
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@@ -259,7 +262,6 @@
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 		}
260
263
 	}
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264
 
262
-	need_pll_quirk = info.probe_result = 1;
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 	printk(KERN_DEBUG "QUIRK: Enable AMD PLL fix\n");
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266
 
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 commit:
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..
@@ -270,7 +272,6 @@
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272
 
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 		/* Mark that we where here */
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 		amd_chipset.probe_count++;
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-		need_pll_quirk = amd_chipset.probe_result;
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275
 
275
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 		spin_unlock_irqrestore(&amd_lock, flags);
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277
 
..
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@@ -283,10 +284,7 @@
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 		amd_chipset = info;
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 		spin_unlock_irqrestore(&amd_lock, flags);
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 	}
286
-
287
-	return need_pll_quirk;
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287
 }
289
-EXPORT_SYMBOL_GPL(usb_amd_find_chipset_info);
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288
 
291
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 int usb_hcd_amd_remote_wakeup_quirk(struct pci_dev *pdev)
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290
 {
..
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@@ -321,6 +319,13 @@
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 	return amd_chipset.sb_type.gen == AMD_CHIPSET_SB800;
322
320
 }
323
321
 EXPORT_SYMBOL_GPL(usb_amd_prefetch_quirk);
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+
323
+bool usb_amd_quirk_pll_check(void)
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+{
325
+	usb_amd_find_chipset_info();
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+	return amd_chipset.need_pll_quirk;
327
+}
328
+EXPORT_SYMBOL_GPL(usb_amd_quirk_pll_check);
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329
 
325
330
 /*
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331
  * The hardware normally enables the A-link power management feature, which
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@@ -527,7 +532,7 @@
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 	amd_chipset.nb_type = 0;
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 	memset(&amd_chipset.sb_type, 0, sizeof(amd_chipset.sb_type));
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534
 	amd_chipset.isoc_reqs = 0;
530
-	amd_chipset.probe_result = 0;
535
+	amd_chipset.need_pll_quirk = false;
531
536
 
532
537
 	spin_unlock_irqrestore(&amd_lock, flags);
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538
 
..
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@@ -726,7 +731,7 @@
726
731
 	if (!pio_enabled(pdev))
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732
 		return;
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733
 
729
-	for (i = 0; i < PCI_ROM_RESOURCE; i++)
734
+	for (i = 0; i < PCI_STD_NUM_BARS; i++)
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735
 		if ((pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
731
736
 			base = pci_resource_start(pdev, i);
732
737
 			break;
..
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@@ -790,15 +795,9 @@
790
795
 	/* disable interrupts */
791
796
 	writel((u32) ~0, base + OHCI_INTRDISABLE);
792
797
 
793
-	/* Reset the USB bus, if the controller isn't already in RESET */
794
-	if (control & OHCI_HCFS) {
795
-		/* Go into RESET, preserving RWC (and possibly IR) */
796
-		writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
797
-		readl(base + OHCI_CONTROL);
798
-
799
-		/* drive bus reset for at least 50 ms (7.1.7.5) */
800
-		msleep(50);
801
-	}
798
+	/* Go into the USB_RESET state, preserving RWC (and possibly IR) */
799
+	writel(control & OHCI_CTRL_MASK, base + OHCI_CONTROL);
800
+	readl(base + OHCI_CONTROL);
802
801
 
803
802
 	/* software reset of the controller, preserving HcFmInterval */
804
803
 	if (!no_fminterval)
..
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@@ -958,7 +957,8 @@
958
957
 			ehci_bios_handoff(pdev, op_reg_base, cap, offset);
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958
 			break;
960
959
 		case 0: /* Illegal reserved cap, set cap=0 so we exit */
961
-			cap = 0; /* fall through */
960
+			cap = 0;
961
+			fallthrough;
962
962
 		default:
963
963
 			dev_warn(&pdev->dev,
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964
 				 "EHCI: unrecognized capability %02x\n",
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..
@@ -1013,15 +1013,9 @@
1013
1013
 {
1014
1014
 	u32	result;
1015
1015
 
1016
-	do {
1017
-		result = readl(ptr);
1018
-		result &= mask;
1019
-		if (result == done)
1020
-			return 0;
1021
-		udelay(delay_usec);
1022
-		wait_usec -= delay_usec;
1023
-	} while (wait_usec > 0);
1024
-	return -ETIMEDOUT;
1016
+	return readl_poll_timeout_atomic(ptr, result,
1017
+					 ((result & mask) == done),
1018
+					 delay_usec, wait_usec);
1025
1019
 }
1026
1020
 
1027
1021
 /*
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..
@@ -1134,7 +1128,7 @@
1134
1128
 }
1135
1129
 EXPORT_SYMBOL_GPL(usb_disable_xhci_ports);
1136
1130
 
1137
-/**
1131
+/*
1138
1132
  * PCI Quirks for xHCI.
1139
1133
  *
1140
1134
  * Takes care of the handoff between the Pre-OS (i.e. BIOS) and the OS.
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..
@@ -1154,7 +1148,7 @@
1154
1148
 	if (!mmio_resource_enabled(pdev, 0))
1155
1149
 		return;
1156
1150
 
1157
-	base = ioremap_nocache(pci_resource_start(pdev, 0), len);
1151
+	base = ioremap(pci_resource_start(pdev, 0), len);
1158
1152
 	if (base == NULL)
1159
1153
 		return;
1160
1154
 
..
..
@@ -1247,11 +1241,27 @@
1247
1241
 
1248
1242
 static void quirk_usb_early_handoff(struct pci_dev *pdev)
1249
1243
 {
1244
+	struct device_node *parent;
1245
+	bool is_rpi;
1246
+
1250
1247
 	/* Skip Netlogic mips SoC's internal PCI USB controller.
1251
1248
 	 * This device does not need/support EHCI/OHCI handoff
1252
1249
 	 */
1253
1250
 	if (pdev->vendor == 0x184e)	/* vendor Netlogic */
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1251
 		return;
1252
+
1253
+	/*
1254
+	 * Bypass the Raspberry Pi 4 controller xHCI controller, things are
1255
+	 * taken care of by the board's co-processor.
1256
+	 */
1257
+	if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
1258
+		parent = of_get_parent(pdev->bus->dev.of_node);
1259
+		is_rpi = of_device_is_compatible(parent, "brcm,bcm2711-pcie");
1260
+		of_node_put(parent);
1261
+		if (is_rpi)
1262
+			return;
1263
+	}
1264
+
1255
1265
 	if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI &&
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1266
 			pdev->class != PCI_CLASS_SERIAL_USB_OHCI &&
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1267
 			pdev->class != PCI_CLASS_SERIAL_USB_EHCI &&