add stmac read mac form eeprom

hc

2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/thermal/tegra/tegra132-soctherm.c
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@@ -1,5 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0
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 /*
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- * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
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+ * Copyright (c) 2014-2018, NVIDIA CORPORATION.  All rights reserved.
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  *
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  * This software is licensed under the terms of the GNU General Public
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  * License version 2, as published by the Free Software Foundation, and
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@@ -55,6 +56,7 @@
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 	.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
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 	.thermtrip_enable_mask = TEGRA132_THERMTRIP_CPU_EN_MASK,
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 	.thermtrip_threshold_mask = TEGRA132_THERMTRIP_CPU_THRESH_MASK,
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+	.thermctl_isr_mask = THERM_IRQ_CPU_MASK,
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 	.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU,
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 	.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
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 	.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,
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@@ -73,6 +75,7 @@
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 	.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
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 	.thermtrip_enable_mask = TEGRA132_THERMTRIP_GPU_EN_MASK,
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 	.thermtrip_threshold_mask = TEGRA132_THERMTRIP_GPUMEM_THRESH_MASK,
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+	.thermctl_isr_mask = THERM_IRQ_GPU_MASK,
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 	.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU,
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 	.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
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 	.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,
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@@ -89,6 +92,7 @@
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 	.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
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 	.thermtrip_enable_mask = TEGRA132_THERMTRIP_TSENSE_EN_MASK,
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 	.thermtrip_threshold_mask = TEGRA132_THERMTRIP_TSENSE_THRESH_MASK,
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+	.thermctl_isr_mask = THERM_IRQ_TSENSE_MASK,
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 	.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE,
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 	.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
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 	.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,
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@@ -107,6 +111,7 @@
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 	.thermtrip_any_en_mask = TEGRA132_THERMTRIP_ANY_EN_MASK,
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 	.thermtrip_enable_mask = TEGRA132_THERMTRIP_MEM_EN_MASK,
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 	.thermtrip_threshold_mask = TEGRA132_THERMTRIP_GPUMEM_THRESH_MASK,
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+	.thermctl_isr_mask = THERM_IRQ_MEM_MASK,
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 	.thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM,
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 	.thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK,
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 	.thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK,