forked from ~ljy/RK356X_SDK_RELEASE
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hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/rknpu/rknpu_drv.c
....@@ -79,36 +79,29 @@
7979 MODULE_PARM_DESC(bypass_soft_reset,
8080 		 "bypass RKNPU soft reset if set it to 1, disabled by default");
8181 
82
-struct npu_irqs_data {
82
+struct rknpu_irqs_data {
8383 	const char *name;
8484 	irqreturn_t (*irq_hdl)(int irq, void *ctx);
8585 };
8686 
87
-static const struct npu_irqs_data rk356x_npu_irqs[] = {
87
+static const struct rknpu_irqs_data rknpu_irqs[] = {
8888 	{ "npu_irq", rknpu_core0_irq_handler }
8989 };
9090 
91
-static const struct npu_irqs_data rk3588_npu_irqs[] = {
91
+static const struct rknpu_irqs_data rk3588_npu_irqs[] = {
9292 	{ "npu0_irq", rknpu_core0_irq_handler },
9393 	{ "npu1_irq", rknpu_core1_irq_handler },
9494 	{ "npu2_irq", rknpu_core2_irq_handler }
9595 };
9696 
97
-static const struct npu_irqs_data rv110x_npu_irqs[] = {
98
-	{ "npu_irq", rknpu_core0_irq_handler }
99
-};
97
+static const struct rknpu_reset_data rknpu_resets[] = { { "srst_a",
98
+							  "srst_h" } };
10099 
101
-static const struct npu_reset_data rk356x_npu_resets[] = { { "srst_a",
102
-							     "srst_h" } };
103
-
104
-static const struct npu_reset_data rk3588_npu_resets[] = {
100
+static const struct rknpu_reset_data rk3588_npu_resets[] = {
105101 	{ "srst_a0", "srst_h0" },
106102 	{ "srst_a1", "srst_h1" },
107103 	{ "srst_a2", "srst_h2" }
108104 };
109
-
110
-static const struct npu_reset_data rv110x_npu_resets[] = { { "srst_a",
111
-							     "srst_h" } };
112105 
113106 static const struct rknpu_config rk356x_rknpu_config = {
114107 	.bw_priority_addr = 0xfe180008,
....@@ -117,11 +110,15 @@
117110 	.pc_data_amount_scale = 1,
118111 	.pc_task_number_bits = 12,
119112 	.pc_task_number_mask = 0xfff,
113
+	.pc_task_status_offset = 0x3c,
114
+	.pc_dma_ctrl = 0,
120115 	.bw_enable = 1,
121
-	.irqs = rk356x_npu_irqs,
122
-	.resets = rk356x_npu_resets,
123
-	.num_irqs = ARRAY_SIZE(rk356x_npu_irqs),
124
-	.num_resets = ARRAY_SIZE(rk356x_npu_resets)
116
+	.irqs = rknpu_irqs,
117
+	.resets = rknpu_resets,
118
+	.num_irqs = ARRAY_SIZE(rknpu_irqs),
119
+	.num_resets = ARRAY_SIZE(rknpu_resets),
120
+	.nbuf_phyaddr = 0,
121
+	.nbuf_size = 0
125122 };
126123 
127124 static const struct rknpu_config rk3588_rknpu_config = {
....@@ -131,11 +128,15 @@
131128 	.pc_data_amount_scale = 2,
132129 	.pc_task_number_bits = 12,
133130 	.pc_task_number_mask = 0xfff,
131
+	.pc_task_status_offset = 0x3c,
132
+	.pc_dma_ctrl = 0,
134133 	.bw_enable = 0,
135134 	.irqs = rk3588_npu_irqs,
136135 	.resets = rk3588_npu_resets,
137136 	.num_irqs = ARRAY_SIZE(rk3588_npu_irqs),
138
-	.num_resets = ARRAY_SIZE(rk3588_npu_resets)
137
+	.num_resets = ARRAY_SIZE(rk3588_npu_resets),
138
+	.nbuf_phyaddr = 0,
139
+	.nbuf_size = 0
139140 };
140141 
141142 static const struct rknpu_config rv1106_rknpu_config = {
....@@ -145,11 +146,33 @@
145146 	.pc_data_amount_scale = 2,
146147 	.pc_task_number_bits = 16,
147148 	.pc_task_number_mask = 0xffff,
149
+	.pc_task_status_offset = 0x3c,
150
+	.pc_dma_ctrl = 0,
148151 	.bw_enable = 1,
149
-	.irqs = rv110x_npu_irqs,
150
-	.resets = rv110x_npu_resets,
151
-	.num_irqs = ARRAY_SIZE(rv110x_npu_irqs),
152
-	.num_resets = ARRAY_SIZE(rv110x_npu_resets)
152
+	.irqs = rknpu_irqs,
153
+	.resets = rknpu_resets,
154
+	.num_irqs = ARRAY_SIZE(rknpu_irqs),
155
+	.num_resets = ARRAY_SIZE(rknpu_resets),
156
+	.nbuf_phyaddr = 0,
157
+	.nbuf_size = 0
158
+};
159
+
160
+static const struct rknpu_config rk3562_rknpu_config = {
161
+	.bw_priority_addr = 0x0,
162
+	.bw_priority_length = 0x0,
163
+	.dma_mask = DMA_BIT_MASK(40),
164
+	.pc_data_amount_scale = 2,
165
+	.pc_task_number_bits = 16,
166
+	.pc_task_number_mask = 0xffff,
167
+	.pc_task_status_offset = 0x48,
168
+	.pc_dma_ctrl = 1,
169
+	.bw_enable = 1,
170
+	.irqs = rknpu_irqs,
171
+	.resets = rknpu_resets,
172
+	.num_irqs = ARRAY_SIZE(rknpu_irqs),
173
+	.num_resets = ARRAY_SIZE(rknpu_resets),
174
+	.nbuf_phyaddr = 0xfe400000,
175
+	.nbuf_size = 256 * 1024
153176 };
154177 
155178 /* driver probe and init */
....@@ -169,6 +192,10 @@
169192 	{
170193 		.compatible = "rockchip,rv1106-rknpu",
171194 		.data = &rv1106_rknpu_config,
195
+	},
196
+	{
197
+		.compatible = "rockchip,rk3562-rknpu",
198
+		.data = &rk3562_rknpu_config,
172199 	},
173200 	{},
174201 };
....@@ -245,13 +272,17 @@
245272 		ret = rknpu_get_drv_version(&args->value);
246273 		break;
247274 	case RKNPU_GET_FREQ:
275
+#ifndef FPGA_PLATFORM
248276 		args->value = clk_get_rate(rknpu_dev->clks[0].clk);
277
+#endif
249278 		ret = 0;
250279 		break;
251280 	case RKNPU_SET_FREQ:
252281 		break;
253282 	case RKNPU_GET_VOLT:
283
+#ifndef FPGA_PLATFORM
254284 		args->value = regulator_get_voltage(rknpu_dev->vdd);
285
+#endif
255286 		ret = 0;
256287 		break;
257288 	case RKNPU_SET_VOLT:
....@@ -330,11 +361,56 @@
330361 #ifdef CONFIG_ROCKCHIP_RKNPU_DMA_HEAP
331362 static int rknpu_open(struct inode *inode, struct file *file)
332363 {
364
+	struct rknpu_device *rknpu_dev =
365
+		container_of(file->private_data, struct rknpu_device, miscdev);
366
+	struct rknpu_session *session = NULL;
367
+
368
+	session = kzalloc(sizeof(*session), GFP_KERNEL);
369
+	if (!session) {
370
+		LOG_ERROR("rknpu session alloc failed\n");
371
+		return -ENOMEM;
372
+	}
373
+
374
+	session->rknpu_dev = rknpu_dev;
375
+	INIT_LIST_HEAD(&session->list);
376
+
377
+	file->private_data = (void *)session;
378
+
333379 	return nonseekable_open(inode, file);
334380 }
335381 
336382 static int rknpu_release(struct inode *inode, struct file *file)
337383 {
384
+	struct rknpu_mem_object *entry;
385
+	struct rknpu_session *session = file->private_data;
386
+	struct rknpu_device *rknpu_dev = session->rknpu_dev;
387
+	LIST_HEAD(local_list);
388
+
389
+	spin_lock(&rknpu_dev->lock);
390
+	list_replace_init(&session->list, &local_list);
391
+	file->private_data = NULL;
392
+	spin_unlock(&rknpu_dev->lock);
393
+
394
+	while (!list_empty(&local_list)) {
395
+		entry = list_first_entry(&local_list, struct rknpu_mem_object,
396
+					 head);
397
+
398
+		LOG_DEBUG(
399
+			"Fd close free rknpu_obj: %#llx, rknpu_obj->dma_addr: %#llx\n",
400
+			(__u64)(uintptr_t)entry, (__u64)entry->dma_addr);
401
+
402
+		vunmap(entry->kv_addr);
403
+		entry->kv_addr = NULL;
404
+
405
+		if (!entry->owner)
406
+			dma_buf_put(entry->dmabuf);
407
+
408
+		list_del(&entry->head);
409
+		kfree(entry);
410
+	}
411
+
412
+	kfree(session);
413
+
338414 	return 0;
339415 }
340416 
....@@ -366,8 +442,12 @@
366442 static long rknpu_ioctl(struct file *file, uint32_t cmd, unsigned long arg)
367443 {
368444 	long ret = -EINVAL;
369
-	struct rknpu_device *rknpu_dev =
370
-		container_of(file->private_data, struct rknpu_device, miscdev);
445
+	struct rknpu_device *rknpu_dev = NULL;
446
+
447
+	if (!file->private_data)
448
+		return -EINVAL;
449
+
450
+	rknpu_dev = ((struct rknpu_session *)file->private_data)->rknpu_dev;
371451 
372452 	rknpu_power_get(rknpu_dev);
373453 
....@@ -379,12 +459,12 @@
379459 		ret = rknpu_submit_ioctl(rknpu_dev, arg);
380460 		break;
381461 	case IOCTL_RKNPU_MEM_CREATE:
382
-		ret = rknpu_mem_create_ioctl(rknpu_dev, arg);
462
+		ret = rknpu_mem_create_ioctl(rknpu_dev, arg, file);
383463 		break;
384464 	case RKNPU_MEM_MAP:
385465 		break;
386466 	case IOCTL_RKNPU_MEM_DESTROY:
387
-		ret = rknpu_mem_destroy_ioctl(rknpu_dev, arg);
467
+		ret = rknpu_mem_destroy_ioctl(rknpu_dev, arg, file);
388468 		break;
389469 	case IOCTL_RKNPU_MEM_SYNC:
390470 		ret = rknpu_mem_sync_ioctl(rknpu_dev, arg);
....@@ -802,7 +882,7 @@
802882 
803883 #ifndef FPGA_PLATFORM
804884 static struct monitor_dev_profile npu_mdevp = {
805
-	.type = MONITOR_TPYE_DEV,
885
+	.type = MONITOR_TYPE_DEV,
806886 	.low_temp_adjust = rockchip_monitor_dev_low_temp_adjust,
807887 	.high_temp_adjust = rockchip_monitor_dev_high_temp_adjust,
808888 #if KERNEL_VERSION(5, 10, 0) <= LINUX_VERSION_CODE
....@@ -1107,6 +1187,66 @@
11071187 };
11081188 
11091189 #if KERNEL_VERSION(5, 10, 0) <= LINUX_VERSION_CODE
1190
+static int rk3588_npu_get_soc_info(struct device *dev, struct device_node *np,
1191
+				   int *bin, int *process)
1192
+{
1193
+	int ret = 0;
1194
+	u8 value = 0;
1195
+
1196
+	if (!bin)
1197
+		return 0;
1198
+
1199
+	if (of_property_match_string(np, "nvmem-cell-names",
1200
+				     "specification_serial_number") >= 0) {
1201
+		ret = rockchip_nvmem_cell_read_u8(
1202
+			np, "specification_serial_number", &value);
1203
+		if (ret) {
1204
+			LOG_DEV_ERROR(
1205
+				dev,
1206
+				"Failed to get specification_serial_number\n");
1207
+			return ret;
1208
+		}
1209
+		/* RK3588M */
1210
+		if (value == 0xd)
1211
+			*bin = 1;
1212
+		/* RK3588J */
1213
+		else if (value == 0xa)
1214
+			*bin = 2;
1215
+	}
1216
+	if (*bin < 0)
1217
+		*bin = 0;
1218
+	LOG_DEV_INFO(dev, "bin=%d\n", *bin);
1219
+
1220
+	return ret;
1221
+}
1222
+
1223
+static int rk3588_npu_set_soc_info(struct device *dev, struct device_node *np,
1224
+				   int bin, int process, int volt_sel)
1225
+{
1226
+	struct opp_table *opp_table;
1227
+	u32 supported_hw[2];
1228
+
1229
+	if (volt_sel < 0)
1230
+		return 0;
1231
+	if (bin < 0)
1232
+		bin = 0;
1233
+
1234
+	if (!of_property_read_bool(np, "rockchip,supported-hw"))
1235
+		return 0;
1236
+
1237
+	/* SoC Version */
1238
+	supported_hw[0] = BIT(bin);
1239
+	/* Speed Grade */
1240
+	supported_hw[1] = BIT(volt_sel);
1241
+	opp_table = dev_pm_opp_set_supported_hw(dev, supported_hw, 2);
1242
+	if (IS_ERR(opp_table)) {
1243
+		LOG_DEV_ERROR(dev, "failed to set supported opp\n");
1244
+		return PTR_ERR(opp_table);
1245
+	}
1246
+
1247
+	return 0;
1248
+}
1249
+
11101250 static int rk3588_npu_set_read_margin(struct device *dev,
11111251 				      struct rockchip_opp_info *opp_info,
11121252 				      u32 rm)
....@@ -1139,6 +1279,8 @@
11391279 }
11401280 
11411281 static const struct rockchip_opp_data rk3588_npu_opp_data = {
1282
+	.get_soc_info = rk3588_npu_get_soc_info,
1283
+	.set_soc_info = rk3588_npu_set_soc_info,
11421284 	.set_read_margin = rk3588_npu_set_read_margin,
11431285 };
11441286 
....@@ -1518,6 +1660,31 @@
15181660 	return 0;
15191661 }
15201662 
1663
+static int rknpu_find_nbuf_resource(struct rknpu_device *rknpu_dev)
1664
+{
1665
+	struct device *dev = rknpu_dev->dev;
1666
+
1667
+	if (rknpu_dev->config->nbuf_size == 0)
1668
+		return -EINVAL;
1669
+
1670
+	rknpu_dev->nbuf_start = rknpu_dev->config->nbuf_phyaddr;
1671
+	rknpu_dev->nbuf_size = rknpu_dev->config->nbuf_size;
1672
+	rknpu_dev->nbuf_base_io =
1673
+		devm_ioremap(dev, rknpu_dev->nbuf_start, rknpu_dev->nbuf_size);
1674
+	if (IS_ERR(rknpu_dev->nbuf_base_io)) {
1675
+		LOG_DEV_ERROR(dev, "failed to remap nbuf base io!\n");
1676
+		rknpu_dev->nbuf_base_io = NULL;
1677
+	}
1678
+
1679
+	rknpu_dev->nbuf_end = rknpu_dev->nbuf_start + rknpu_dev->nbuf_size;
1680
+
1681
+	LOG_DEV_INFO(dev, "nbuf region: [%pa, %pa), nbuf size: %#x\n",
1682
+		     &rknpu_dev->nbuf_start, &rknpu_dev->nbuf_end,
1683
+		     rknpu_dev->nbuf_size);
1684
+
1685
+	return 0;
1686
+}
1687
+
15211688 static int rknpu_probe(struct platform_device *pdev)
15221689 {
15231690 	struct resource *res = NULL;
....@@ -1734,7 +1901,8 @@
17341901 	INIT_DEFERRABLE_WORK(&rknpu_dev->power_off_work,
17351902 			     rknpu_power_off_delay_work);
17361903 
1737
-	if (IS_ENABLED(CONFIG_ROCKCHIP_RKNPU_SRAM) && rknpu_dev->iommu_en) {
1904
+	if (IS_ENABLED(CONFIG_NO_GKI) &&
1905
+	    IS_ENABLED(CONFIG_ROCKCHIP_RKNPU_SRAM) && rknpu_dev->iommu_en) {
17381906 		if (!rknpu_find_sram_resource(rknpu_dev)) {
17391907 			ret = rknpu_mm_create(rknpu_dev->sram_size, PAGE_SIZE,
17401908 					      &rknpu_dev->sram_mm);
....@@ -1745,6 +1913,10 @@
17451913 		}
17461914 	}
17471915 
1916
+	if (IS_ENABLED(CONFIG_NO_GKI) && rknpu_dev->iommu_en &&
1917
+	    rknpu_dev->config->nbuf_size > 0)
1918
+		rknpu_find_nbuf_resource(rknpu_dev);
1919
+
17481920 	rknpu_power_off(rknpu_dev);
17491921 	atomic_set(&rknpu_dev->power_refcount, 0);
17501922 	atomic_set(&rknpu_dev->cmdline_power_refcount, 0);