forked from ~ljy/RK356X_SDK_RELEASE

hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c
kernel/drivers/platform/chrome/cros_ec_lpc.c
....@@ -1,43 +1,126 @@
1
-/*
2
- * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller
3
- *
4
- * Copyright (C) 2012-2015 Google, Inc
5
- *
6
- * This software is licensed under the terms of the GNU General Public
7
- * License version 2, as published by the Free Software Foundation, and
8
- * may be copied, distributed, and modified under those terms.
9
- *
10
- * This program is distributed in the hope that it will be useful,
11
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
12
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
- * GNU General Public License for more details.
14
- *
15
- * This driver uses the Chrome OS EC byte-level message-based protocol for
16
- * communicating the keyboard state (which keys are pressed) from a keyboard EC
17
- * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
18
- * but everything else (including deghosting) is done here. The main
19
- * motivation for this is to keep the EC firmware as simple as possible, since
20
- * it cannot be easily upgraded and EC flash/IRAM space is relatively
21
- * expensive.
22
- */
1
+// SPDX-License-Identifier: GPL-2.0
2
+// LPC interface for ChromeOS Embedded Controller
3
+//
4
+// Copyright (C) 2012-2015 Google, Inc
5
+//
6
+// This driver uses the ChromeOS EC byte-level message-based protocol for
7
+// communicating the keyboard state (which keys are pressed) from a keyboard EC
8
+// to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing,
9
+// but everything else (including deghosting) is done here. The main
10
+// motivation for this is to keep the EC firmware as simple as possible, since
11
+// it cannot be easily upgraded and EC flash/IRAM space is relatively
12
+// expensive.
2313
2414 #include <linux/acpi.h>
2515 #include <linux/dmi.h>
2616 #include <linux/delay.h>
2717 #include <linux/io.h>
28
-#include <linux/mfd/cros_ec.h>
29
-#include <linux/mfd/cros_ec_commands.h>
30
-#include <linux/mfd/cros_ec_lpc_reg.h>
18
+#include <linux/interrupt.h>
3119 #include <linux/module.h>
20
+#include <linux/platform_data/cros_ec_commands.h>
21
+#include <linux/platform_data/cros_ec_proto.h>
3222 #include <linux/platform_device.h>
3323 #include <linux/printk.h>
3424 #include <linux/suspend.h>
25
+
26
+#include "cros_ec.h"
27
+#include "cros_ec_lpc_mec.h"
3528
3629 #define DRV_NAME "cros_ec_lpcs"
3730 #define ACPI_DRV_NAME "GOOG0004"
3831
3932 /* True if ACPI device is present */
4033 static bool cros_ec_lpc_acpi_device_found;
34
+
35
+/**
36
+ * struct lpc_driver_ops - LPC driver operations
37
+ * @read: Copy length bytes from EC address offset into buffer dest. Returns
38
+ * the 8-bit checksum of all bytes read.
39
+ * @write: Copy length bytes from buffer msg into EC address offset. Returns
40
+ * the 8-bit checksum of all bytes written.
41
+ */
42
+struct lpc_driver_ops {
43
+ u8 (*read)(unsigned int offset, unsigned int length, u8 *dest);
44
+ u8 (*write)(unsigned int offset, unsigned int length, const u8 *msg);
45
+};
46
+
47
+static struct lpc_driver_ops cros_ec_lpc_ops = { };
48
+
49
+/*
50
+ * A generic instance of the read function of struct lpc_driver_ops, used for
51
+ * the LPC EC.
52
+ */
53
+static u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length,
54
+ u8 *dest)
55
+{
56
+ int sum = 0;
57
+ int i;
58
+
59
+ for (i = 0; i < length; ++i) {
60
+ dest[i] = inb(offset + i);
61
+ sum += dest[i];
62
+ }
63
+
64
+ /* Return checksum of all bytes read */
65
+ return sum;
66
+}
67
+
68
+/*
69
+ * A generic instance of the write function of struct lpc_driver_ops, used for
70
+ * the LPC EC.
71
+ */
72
+static u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length,
73
+ const u8 *msg)
74
+{
75
+ int sum = 0;
76
+ int i;
77
+
78
+ for (i = 0; i < length; ++i) {
79
+ outb(msg[i], offset + i);
80
+ sum += msg[i];
81
+ }
82
+
83
+ /* Return checksum of all bytes written */
84
+ return sum;
85
+}
86
+
87
+/*
88
+ * An instance of the read function of struct lpc_driver_ops, used for the
89
+ * MEC variant of LPC EC.
90
+ */
91
+static u8 cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length,
92
+ u8 *dest)
93
+{
94
+ int in_range = cros_ec_lpc_mec_in_range(offset, length);
95
+
96
+ if (in_range < 0)
97
+ return 0;
98
+
99
+ return in_range ?
100
+ cros_ec_lpc_io_bytes_mec(MEC_IO_READ,
101
+ offset - EC_HOST_CMD_REGION0,
102
+ length, dest) :
103
+ cros_ec_lpc_read_bytes(offset, length, dest);
104
+}
105
+
106
+/*
107
+ * An instance of the write function of struct lpc_driver_ops, used for the
108
+ * MEC variant of LPC EC.
109
+ */
110
+static u8 cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length,
111
+ const u8 *msg)
112
+{
113
+ int in_range = cros_ec_lpc_mec_in_range(offset, length);
114
+
115
+ if (in_range < 0)
116
+ return 0;
117
+
118
+ return in_range ?
119
+ cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE,
120
+ offset - EC_HOST_CMD_REGION0,
121
+ length, (u8 *)msg) :
122
+ cros_ec_lpc_write_bytes(offset, length, msg);
123
+}
41124
42125 static int ec_response_timed_out(void)
43126 {
....@@ -46,7 +129,7 @@
46129
47130 usleep_range(200, 300);
48131 do {
49
- if (!(cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_CMD, 1, &data) &
132
+ if (!(cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_CMD, 1, &data) &
50133 EC_LPC_STATUS_BUSY_MASK))
51134 return 0;
52135 usleep_range(100, 200);
....@@ -66,11 +149,11 @@
66149 ret = cros_ec_prepare_tx(ec, msg);
67150
68151 /* Write buffer */
69
- cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
152
+ cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout);
70153
71154 /* Here we go */
72155 sum = EC_COMMAND_PROTOCOL_3;
73
- cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
156
+ cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
74157
75158 if (ec_response_timed_out()) {
76159 dev_warn(ec->dev, "EC responsed timed out\n");
....@@ -79,15 +162,15 @@
79162 }
80163
81164 /* Check result */
82
- msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
165
+ msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
83166 ret = cros_ec_check_result(ec, msg);
84167 if (ret)
85168 goto done;
86169
87170 /* Read back response */
88171 dout = (u8 *)&response;
89
- sum = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
90
- dout);
172
+ sum = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET, sizeof(response),
173
+ dout);
91174
92175 msg->result = response.result;
93176
....@@ -100,9 +183,9 @@
100183 }
101184
102185 /* Read response and process checksum */
103
- sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET +
104
- sizeof(response), response.data_len,
105
- msg->data);
186
+ sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET +
187
+ sizeof(response), response.data_len,
188
+ msg->data);
106189
107190 if (sum) {
108191 dev_err(ec->dev,
....@@ -142,17 +225,17 @@
142225 sum = msg->command + args.flags + args.command_version + args.data_size;
143226
144227 /* Copy data and update checksum */
145
- sum += cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
146
- msg->data);
228
+ sum += cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PARAM, msg->outsize,
229
+ msg->data);
147230
148231 /* Finalize checksum and write args */
149232 args.checksum = sum;
150
- cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
151
- (u8 *)&args);
233
+ cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
234
+ (u8 *)&args);
152235
153236 /* Here we go */
154237 sum = msg->command;
155
- cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum);
238
+ cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum);
156239
157240 if (ec_response_timed_out()) {
158241 dev_warn(ec->dev, "EC responsed timed out\n");
....@@ -161,14 +244,13 @@
161244 }
162245
163246 /* Check result */
164
- msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum);
247
+ msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum);
165248 ret = cros_ec_check_result(ec, msg);
166249 if (ret)
167250 goto done;
168251
169252 /* Read back args */
170
- cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args),
171
- (u8 *)&args);
253
+ cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args);
172254
173255 if (args.data_size > msg->insize) {
174256 dev_err(ec->dev,
....@@ -182,8 +264,8 @@
182264 sum = msg->command + args.flags + args.command_version + args.data_size;
183265
184266 /* Read response and update checksum */
185
- sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PARAM, args.data_size,
186
- msg->data);
267
+ sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PARAM, args.data_size,
268
+ msg->data);
187269
188270 /* Verify checksum */
189271 if (args.checksum != sum) {
....@@ -213,13 +295,13 @@
213295
214296 /* fixed length */
215297 if (bytes) {
216
- cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
298
+ cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + offset, bytes, s);
217299 return bytes;
218300 }
219301
220302 /* string */
221303 for (; i < EC_MEMMAP_SIZE; i++, s++) {
222
- cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + i, 1, s);
304
+ cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + i, 1, s);
223305 cnt++;
224306 if (!*s)
225307 break;
....@@ -231,11 +313,20 @@
231313 static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data)
232314 {
233315 struct cros_ec_device *ec_dev = data;
316
+ bool ec_has_more_events;
317
+ int ret;
234318
235
- if (ec_dev->mkbp_event_supported &&
236
- cros_ec_get_next_event(ec_dev, NULL) > 0)
237
- blocking_notifier_call_chain(&ec_dev->event_notifier, 0,
238
- ec_dev);
319
+ ec_dev->last_event_time = cros_ec_get_time_ns();
320
+
321
+ if (ec_dev->mkbp_event_supported)
322
+ do {
323
+ ret = cros_ec_get_next_event(ec_dev, NULL,
324
+ &ec_has_more_events);
325
+ if (ret > 0)
326
+ blocking_notifier_call_chain(
327
+ &ec_dev->event_notifier, 0,
328
+ ec_dev);
329
+ } while (ec_has_more_events);
239330
240331 if (value == ACPI_NOTIFY_DEVICE_WAKE)
241332 pm_system_wakeup();
....@@ -248,7 +339,7 @@
248339 acpi_status status;
249340 struct cros_ec_device *ec_dev;
250341 u8 buf[2];
251
- int ret;
342
+ int irq, ret;
252343
253344 if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE,
254345 dev_name(dev))) {
....@@ -256,10 +347,25 @@
256347 return -EBUSY;
257348 }
258349
259
- cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
350
+ /*
351
+ * Read the mapped ID twice, the first one is assuming the
352
+ * EC is a Microchip Embedded Controller (MEC) variant, if the
353
+ * protocol fails, fallback to the non MEC variant and try to
354
+ * read again the ID.
355
+ */
356
+ cros_ec_lpc_ops.read = cros_ec_lpc_mec_read_bytes;
357
+ cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes;
358
+ cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf);
260359 if (buf[0] != 'E' || buf[1] != 'C') {
261
- dev_err(dev, "EC ID not detected\n");
262
- return -ENODEV;
360
+ /* Re-assign read/write operations for the non MEC variant */
361
+ cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes;
362
+ cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes;
363
+ cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2,
364
+ buf);
365
+ if (buf[0] != 'E' || buf[1] != 'C') {
366
+ dev_err(dev, "EC ID not detected\n");
367
+ return -ENODEV;
368
+ }
263369 }
264370
265371 if (!devm_request_region(dev, EC_HOST_CMD_REGION0,
....@@ -287,6 +393,18 @@
287393 sizeof(struct ec_response_get_protocol_info);
288394 ec_dev->dout_size = sizeof(struct ec_host_request);
289395
396
+ /*
397
+ * Some boards do not have an IRQ allotted for cros_ec_lpc,
398
+ * which makes ENXIO an expected (and safe) scenario.
399
+ */
400
+ irq = platform_get_irq_optional(pdev, 0);
401
+ if (irq > 0)
402
+ ec_dev->irq = irq;
403
+ else if (irq != -ENXIO) {
404
+ dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq);
405
+ return irq;
406
+ }
407
+
290408 ret = cros_ec_register(ec_dev);
291409 if (ret) {
292410 dev_err(dev, "couldn't register ec_dev (%d)\n", ret);
....@@ -313,7 +431,7 @@
313431
314432 static int cros_ec_lpc_remove(struct platform_device *pdev)
315433 {
316
- struct cros_ec_device *ec_dev;
434
+ struct cros_ec_device *ec_dev = platform_get_drvdata(pdev);
317435 struct acpi_device *adev;
318436
319437 adev = ACPI_COMPANION(&pdev->dev);
....@@ -321,10 +439,7 @@
321439 acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY,
322440 cros_ec_lpc_acpi_notify);
323441
324
- ec_dev = platform_get_drvdata(pdev);
325
- cros_ec_remove(ec_dev);
326
-
327
- return 0;
442
+ return cros_ec_unregister(ec_dev);
328443 }
329444
330445 static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = {
....@@ -405,7 +520,7 @@
405520 }
406521 #endif
407522
408
-const struct dev_pm_ops cros_ec_lpc_pm_ops = {
523
+static const struct dev_pm_ops cros_ec_lpc_pm_ops = {
409524 SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume)
410525 };
411526
....@@ -446,13 +561,14 @@
446561 return -ENODEV;
447562 }
448563
449
- cros_ec_lpc_reg_init();
564
+ cros_ec_lpc_mec_init(EC_HOST_CMD_REGION0,
565
+ EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE);
450566
451567 /* Register the driver */
452568 ret = platform_driver_register(&cros_ec_lpc_driver);
453569 if (ret) {
454570 pr_err(DRV_NAME ": can't register driver: %d\n", ret);
455
- cros_ec_lpc_reg_destroy();
571
+ cros_ec_lpc_mec_destroy();
456572 return ret;
457573 }
458574
....@@ -462,7 +578,7 @@
462578 if (ret) {
463579 pr_err(DRV_NAME ": can't register device: %d\n", ret);
464580 platform_driver_unregister(&cros_ec_lpc_driver);
465
- cros_ec_lpc_reg_destroy();
581
+ cros_ec_lpc_mec_destroy();
466582 }
467583 }
468584
....@@ -474,7 +590,7 @@
474590 if (!cros_ec_lpc_acpi_device_found)
475591 platform_device_unregister(&cros_ec_lpc_device);
476592 platform_driver_unregister(&cros_ec_lpc_driver);
477
- cros_ec_lpc_reg_destroy();
593
+ cros_ec_lpc_mec_destroy();
478594 }
479595
480596 module_init(cros_ec_lpc_init);