| .. | .. |
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| 1 | | -/* |
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| 2 | | - * cros_ec_lpc - LPC access to the Chrome OS Embedded Controller |
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| 3 | | - * |
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| 4 | | - * Copyright (C) 2012-2015 Google, Inc |
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| 5 | | - * |
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| 6 | | - * This software is licensed under the terms of the GNU General Public |
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| 7 | | - * License version 2, as published by the Free Software Foundation, and |
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| 8 | | - * may be copied, distributed, and modified under those terms. |
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| 9 | | - * |
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| 10 | | - * This program is distributed in the hope that it will be useful, |
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| 11 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 12 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 13 | | - * GNU General Public License for more details. |
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| 14 | | - * |
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| 15 | | - * This driver uses the Chrome OS EC byte-level message-based protocol for |
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| 16 | | - * communicating the keyboard state (which keys are pressed) from a keyboard EC |
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| 17 | | - * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing, |
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| 18 | | - * but everything else (including deghosting) is done here. The main |
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| 19 | | - * motivation for this is to keep the EC firmware as simple as possible, since |
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| 20 | | - * it cannot be easily upgraded and EC flash/IRAM space is relatively |
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| 21 | | - * expensive. |
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| 22 | | - */ |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 2 | +// LPC interface for ChromeOS Embedded Controller |
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| 3 | +// |
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| 4 | +// Copyright (C) 2012-2015 Google, Inc |
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| 5 | +// |
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| 6 | +// This driver uses the ChromeOS EC byte-level message-based protocol for |
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| 7 | +// communicating the keyboard state (which keys are pressed) from a keyboard EC |
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| 8 | +// to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing, |
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| 9 | +// but everything else (including deghosting) is done here. The main |
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| 10 | +// motivation for this is to keep the EC firmware as simple as possible, since |
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| 11 | +// it cannot be easily upgraded and EC flash/IRAM space is relatively |
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| 12 | +// expensive. |
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| 23 | 13 | |
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| 24 | 14 | #include <linux/acpi.h> |
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| 25 | 15 | #include <linux/dmi.h> |
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| 26 | 16 | #include <linux/delay.h> |
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| 27 | 17 | #include <linux/io.h> |
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| 28 | | -#include <linux/mfd/cros_ec.h> |
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| 29 | | -#include <linux/mfd/cros_ec_commands.h> |
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| 30 | | -#include <linux/mfd/cros_ec_lpc_reg.h> |
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| 18 | +#include <linux/interrupt.h> |
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| 31 | 19 | #include <linux/module.h> |
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| 20 | +#include <linux/platform_data/cros_ec_commands.h> |
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| 21 | +#include <linux/platform_data/cros_ec_proto.h> |
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| 32 | 22 | #include <linux/platform_device.h> |
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| 33 | 23 | #include <linux/printk.h> |
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| 34 | 24 | #include <linux/suspend.h> |
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| 25 | + |
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| 26 | +#include "cros_ec.h" |
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| 27 | +#include "cros_ec_lpc_mec.h" |
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| 35 | 28 | |
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| 36 | 29 | #define DRV_NAME "cros_ec_lpcs" |
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| 37 | 30 | #define ACPI_DRV_NAME "GOOG0004" |
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| 38 | 31 | |
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| 39 | 32 | /* True if ACPI device is present */ |
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| 40 | 33 | static bool cros_ec_lpc_acpi_device_found; |
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| 34 | + |
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| 35 | +/** |
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| 36 | + * struct lpc_driver_ops - LPC driver operations |
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| 37 | + * @read: Copy length bytes from EC address offset into buffer dest. Returns |
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| 38 | + * the 8-bit checksum of all bytes read. |
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| 39 | + * @write: Copy length bytes from buffer msg into EC address offset. Returns |
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| 40 | + * the 8-bit checksum of all bytes written. |
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| 41 | + */ |
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| 42 | +struct lpc_driver_ops { |
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| 43 | + u8 (*read)(unsigned int offset, unsigned int length, u8 *dest); |
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| 44 | + u8 (*write)(unsigned int offset, unsigned int length, const u8 *msg); |
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| 45 | +}; |
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| 46 | + |
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| 47 | +static struct lpc_driver_ops cros_ec_lpc_ops = { }; |
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| 48 | + |
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| 49 | +/* |
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| 50 | + * A generic instance of the read function of struct lpc_driver_ops, used for |
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| 51 | + * the LPC EC. |
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| 52 | + */ |
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| 53 | +static u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, |
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| 54 | + u8 *dest) |
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| 55 | +{ |
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| 56 | + int sum = 0; |
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| 57 | + int i; |
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| 58 | + |
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| 59 | + for (i = 0; i < length; ++i) { |
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| 60 | + dest[i] = inb(offset + i); |
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| 61 | + sum += dest[i]; |
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| 62 | + } |
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| 63 | + |
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| 64 | + /* Return checksum of all bytes read */ |
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| 65 | + return sum; |
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| 66 | +} |
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| 67 | + |
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| 68 | +/* |
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| 69 | + * A generic instance of the write function of struct lpc_driver_ops, used for |
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| 70 | + * the LPC EC. |
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| 71 | + */ |
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| 72 | +static u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, |
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| 73 | + const u8 *msg) |
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| 74 | +{ |
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| 75 | + int sum = 0; |
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| 76 | + int i; |
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| 77 | + |
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| 78 | + for (i = 0; i < length; ++i) { |
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| 79 | + outb(msg[i], offset + i); |
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| 80 | + sum += msg[i]; |
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| 81 | + } |
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| 82 | + |
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| 83 | + /* Return checksum of all bytes written */ |
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| 84 | + return sum; |
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| 85 | +} |
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| 86 | + |
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| 87 | +/* |
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| 88 | + * An instance of the read function of struct lpc_driver_ops, used for the |
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| 89 | + * MEC variant of LPC EC. |
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| 90 | + */ |
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| 91 | +static u8 cros_ec_lpc_mec_read_bytes(unsigned int offset, unsigned int length, |
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| 92 | + u8 *dest) |
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| 93 | +{ |
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| 94 | + int in_range = cros_ec_lpc_mec_in_range(offset, length); |
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| 95 | + |
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| 96 | + if (in_range < 0) |
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| 97 | + return 0; |
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| 98 | + |
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| 99 | + return in_range ? |
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| 100 | + cros_ec_lpc_io_bytes_mec(MEC_IO_READ, |
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| 101 | + offset - EC_HOST_CMD_REGION0, |
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| 102 | + length, dest) : |
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| 103 | + cros_ec_lpc_read_bytes(offset, length, dest); |
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| 104 | +} |
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| 105 | + |
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| 106 | +/* |
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| 107 | + * An instance of the write function of struct lpc_driver_ops, used for the |
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| 108 | + * MEC variant of LPC EC. |
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| 109 | + */ |
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| 110 | +static u8 cros_ec_lpc_mec_write_bytes(unsigned int offset, unsigned int length, |
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| 111 | + const u8 *msg) |
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| 112 | +{ |
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| 113 | + int in_range = cros_ec_lpc_mec_in_range(offset, length); |
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| 114 | + |
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| 115 | + if (in_range < 0) |
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| 116 | + return 0; |
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| 117 | + |
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| 118 | + return in_range ? |
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| 119 | + cros_ec_lpc_io_bytes_mec(MEC_IO_WRITE, |
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| 120 | + offset - EC_HOST_CMD_REGION0, |
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| 121 | + length, (u8 *)msg) : |
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| 122 | + cros_ec_lpc_write_bytes(offset, length, msg); |
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| 123 | +} |
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| 41 | 124 | |
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| 42 | 125 | static int ec_response_timed_out(void) |
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| 43 | 126 | { |
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| .. | .. |
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| 46 | 129 | |
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| 47 | 130 | usleep_range(200, 300); |
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| 48 | 131 | do { |
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| 49 | | - if (!(cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_CMD, 1, &data) & |
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| 132 | + if (!(cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_CMD, 1, &data) & |
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| 50 | 133 | EC_LPC_STATUS_BUSY_MASK)) |
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| 51 | 134 | return 0; |
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| 52 | 135 | usleep_range(100, 200); |
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| .. | .. |
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| 66 | 149 | ret = cros_ec_prepare_tx(ec, msg); |
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| 67 | 150 | |
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| 68 | 151 | /* Write buffer */ |
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| 69 | | - cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout); |
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| 152 | + cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PACKET, ret, ec->dout); |
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| 70 | 153 | |
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| 71 | 154 | /* Here we go */ |
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| 72 | 155 | sum = EC_COMMAND_PROTOCOL_3; |
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| 73 | | - cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum); |
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| 156 | + cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum); |
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| 74 | 157 | |
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| 75 | 158 | if (ec_response_timed_out()) { |
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| 76 | 159 | dev_warn(ec->dev, "EC responsed timed out\n"); |
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| .. | .. |
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| 79 | 162 | } |
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| 80 | 163 | |
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| 81 | 164 | /* Check result */ |
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| 82 | | - msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum); |
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| 165 | + msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum); |
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| 83 | 166 | ret = cros_ec_check_result(ec, msg); |
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| 84 | 167 | if (ret) |
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| 85 | 168 | goto done; |
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| 86 | 169 | |
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| 87 | 170 | /* Read back response */ |
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| 88 | 171 | dout = (u8 *)&response; |
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| 89 | | - sum = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET, sizeof(response), |
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| 90 | | - dout); |
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| 172 | + sum = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET, sizeof(response), |
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| 173 | + dout); |
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| 91 | 174 | |
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| 92 | 175 | msg->result = response.result; |
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| 93 | 176 | |
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| .. | .. |
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| 100 | 183 | } |
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| 101 | 184 | |
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| 102 | 185 | /* Read response and process checksum */ |
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| 103 | | - sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PACKET + |
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| 104 | | - sizeof(response), response.data_len, |
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| 105 | | - msg->data); |
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| 186 | + sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PACKET + |
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| 187 | + sizeof(response), response.data_len, |
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| 188 | + msg->data); |
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| 106 | 189 | |
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| 107 | 190 | if (sum) { |
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| 108 | 191 | dev_err(ec->dev, |
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| .. | .. |
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| 142 | 225 | sum = msg->command + args.flags + args.command_version + args.data_size; |
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| 143 | 226 | |
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| 144 | 227 | /* Copy data and update checksum */ |
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| 145 | | - sum += cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_PARAM, msg->outsize, |
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| 146 | | - msg->data); |
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| 228 | + sum += cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_PARAM, msg->outsize, |
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| 229 | + msg->data); |
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| 147 | 230 | |
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| 148 | 231 | /* Finalize checksum and write args */ |
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| 149 | 232 | args.checksum = sum; |
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| 150 | | - cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args), |
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| 151 | | - (u8 *)&args); |
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| 233 | + cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_ARGS, sizeof(args), |
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| 234 | + (u8 *)&args); |
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| 152 | 235 | |
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| 153 | 236 | /* Here we go */ |
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| 154 | 237 | sum = msg->command; |
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| 155 | | - cros_ec_lpc_write_bytes(EC_LPC_ADDR_HOST_CMD, 1, &sum); |
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| 238 | + cros_ec_lpc_ops.write(EC_LPC_ADDR_HOST_CMD, 1, &sum); |
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| 156 | 239 | |
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| 157 | 240 | if (ec_response_timed_out()) { |
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| 158 | 241 | dev_warn(ec->dev, "EC responsed timed out\n"); |
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| .. | .. |
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| 161 | 244 | } |
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| 162 | 245 | |
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| 163 | 246 | /* Check result */ |
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| 164 | | - msg->result = cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_DATA, 1, &sum); |
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| 247 | + msg->result = cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_DATA, 1, &sum); |
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| 165 | 248 | ret = cros_ec_check_result(ec, msg); |
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| 166 | 249 | if (ret) |
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| 167 | 250 | goto done; |
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| 168 | 251 | |
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| 169 | 252 | /* Read back args */ |
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| 170 | | - cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_ARGS, sizeof(args), |
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| 171 | | - (u8 *)&args); |
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| 253 | + cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_ARGS, sizeof(args), (u8 *)&args); |
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| 172 | 254 | |
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| 173 | 255 | if (args.data_size > msg->insize) { |
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| 174 | 256 | dev_err(ec->dev, |
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| .. | .. |
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| 182 | 264 | sum = msg->command + args.flags + args.command_version + args.data_size; |
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| 183 | 265 | |
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| 184 | 266 | /* Read response and update checksum */ |
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| 185 | | - sum += cros_ec_lpc_read_bytes(EC_LPC_ADDR_HOST_PARAM, args.data_size, |
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| 186 | | - msg->data); |
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| 267 | + sum += cros_ec_lpc_ops.read(EC_LPC_ADDR_HOST_PARAM, args.data_size, |
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| 268 | + msg->data); |
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| 187 | 269 | |
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| 188 | 270 | /* Verify checksum */ |
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| 189 | 271 | if (args.checksum != sum) { |
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| .. | .. |
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| 213 | 295 | |
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| 214 | 296 | /* fixed length */ |
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| 215 | 297 | if (bytes) { |
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| 216 | | - cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + offset, bytes, s); |
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| 298 | + cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + offset, bytes, s); |
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| 217 | 299 | return bytes; |
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| 218 | 300 | } |
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| 219 | 301 | |
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| 220 | 302 | /* string */ |
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| 221 | 303 | for (; i < EC_MEMMAP_SIZE; i++, s++) { |
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| 222 | | - cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + i, 1, s); |
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| 304 | + cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + i, 1, s); |
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| 223 | 305 | cnt++; |
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| 224 | 306 | if (!*s) |
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| 225 | 307 | break; |
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| .. | .. |
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| 231 | 313 | static void cros_ec_lpc_acpi_notify(acpi_handle device, u32 value, void *data) |
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| 232 | 314 | { |
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| 233 | 315 | struct cros_ec_device *ec_dev = data; |
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| 316 | + bool ec_has_more_events; |
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| 317 | + int ret; |
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| 234 | 318 | |
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| 235 | | - if (ec_dev->mkbp_event_supported && |
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| 236 | | - cros_ec_get_next_event(ec_dev, NULL) > 0) |
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| 237 | | - blocking_notifier_call_chain(&ec_dev->event_notifier, 0, |
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| 238 | | - ec_dev); |
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| 319 | + ec_dev->last_event_time = cros_ec_get_time_ns(); |
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| 320 | + |
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| 321 | + if (ec_dev->mkbp_event_supported) |
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| 322 | + do { |
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| 323 | + ret = cros_ec_get_next_event(ec_dev, NULL, |
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| 324 | + &ec_has_more_events); |
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| 325 | + if (ret > 0) |
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| 326 | + blocking_notifier_call_chain( |
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| 327 | + &ec_dev->event_notifier, 0, |
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| 328 | + ec_dev); |
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| 329 | + } while (ec_has_more_events); |
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| 239 | 330 | |
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| 240 | 331 | if (value == ACPI_NOTIFY_DEVICE_WAKE) |
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| 241 | 332 | pm_system_wakeup(); |
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| .. | .. |
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| 248 | 339 | acpi_status status; |
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| 249 | 340 | struct cros_ec_device *ec_dev; |
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| 250 | 341 | u8 buf[2]; |
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| 251 | | - int ret; |
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| 342 | + int irq, ret; |
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| 252 | 343 | |
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| 253 | 344 | if (!devm_request_region(dev, EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE, |
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| 254 | 345 | dev_name(dev))) { |
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| .. | .. |
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| 256 | 347 | return -EBUSY; |
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| 257 | 348 | } |
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| 258 | 349 | |
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| 259 | | - cros_ec_lpc_read_bytes(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf); |
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| 350 | + /* |
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| 351 | + * Read the mapped ID twice, the first one is assuming the |
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| 352 | + * EC is a Microchip Embedded Controller (MEC) variant, if the |
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| 353 | + * protocol fails, fallback to the non MEC variant and try to |
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| 354 | + * read again the ID. |
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| 355 | + */ |
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| 356 | + cros_ec_lpc_ops.read = cros_ec_lpc_mec_read_bytes; |
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| 357 | + cros_ec_lpc_ops.write = cros_ec_lpc_mec_write_bytes; |
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| 358 | + cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, buf); |
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| 260 | 359 | if (buf[0] != 'E' || buf[1] != 'C') { |
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| 261 | | - dev_err(dev, "EC ID not detected\n"); |
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| 262 | | - return -ENODEV; |
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| 360 | + /* Re-assign read/write operations for the non MEC variant */ |
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| 361 | + cros_ec_lpc_ops.read = cros_ec_lpc_read_bytes; |
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| 362 | + cros_ec_lpc_ops.write = cros_ec_lpc_write_bytes; |
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| 363 | + cros_ec_lpc_ops.read(EC_LPC_ADDR_MEMMAP + EC_MEMMAP_ID, 2, |
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| 364 | + buf); |
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| 365 | + if (buf[0] != 'E' || buf[1] != 'C') { |
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| 366 | + dev_err(dev, "EC ID not detected\n"); |
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| 367 | + return -ENODEV; |
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| 368 | + } |
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| 263 | 369 | } |
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| 264 | 370 | |
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| 265 | 371 | if (!devm_request_region(dev, EC_HOST_CMD_REGION0, |
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| .. | .. |
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| 287 | 393 | sizeof(struct ec_response_get_protocol_info); |
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| 288 | 394 | ec_dev->dout_size = sizeof(struct ec_host_request); |
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| 289 | 395 | |
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| 396 | + /* |
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| 397 | + * Some boards do not have an IRQ allotted for cros_ec_lpc, |
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| 398 | + * which makes ENXIO an expected (and safe) scenario. |
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| 399 | + */ |
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| 400 | + irq = platform_get_irq_optional(pdev, 0); |
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| 401 | + if (irq > 0) |
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| 402 | + ec_dev->irq = irq; |
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| 403 | + else if (irq != -ENXIO) { |
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| 404 | + dev_err(dev, "couldn't retrieve IRQ number (%d)\n", irq); |
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| 405 | + return irq; |
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| 406 | + } |
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| 407 | + |
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| 290 | 408 | ret = cros_ec_register(ec_dev); |
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| 291 | 409 | if (ret) { |
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| 292 | 410 | dev_err(dev, "couldn't register ec_dev (%d)\n", ret); |
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| .. | .. |
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| 313 | 431 | |
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| 314 | 432 | static int cros_ec_lpc_remove(struct platform_device *pdev) |
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| 315 | 433 | { |
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| 316 | | - struct cros_ec_device *ec_dev; |
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| 434 | + struct cros_ec_device *ec_dev = platform_get_drvdata(pdev); |
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| 317 | 435 | struct acpi_device *adev; |
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| 318 | 436 | |
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| 319 | 437 | adev = ACPI_COMPANION(&pdev->dev); |
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| .. | .. |
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| 321 | 439 | acpi_remove_notify_handler(adev->handle, ACPI_ALL_NOTIFY, |
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| 322 | 440 | cros_ec_lpc_acpi_notify); |
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| 323 | 441 | |
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| 324 | | - ec_dev = platform_get_drvdata(pdev); |
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| 325 | | - cros_ec_remove(ec_dev); |
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| 326 | | - |
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| 327 | | - return 0; |
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| 442 | + return cros_ec_unregister(ec_dev); |
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| 328 | 443 | } |
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| 329 | 444 | |
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| 330 | 445 | static const struct acpi_device_id cros_ec_lpc_acpi_device_ids[] = { |
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| .. | .. |
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| 405 | 520 | } |
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| 406 | 521 | #endif |
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| 407 | 522 | |
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| 408 | | -const struct dev_pm_ops cros_ec_lpc_pm_ops = { |
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| 523 | +static const struct dev_pm_ops cros_ec_lpc_pm_ops = { |
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| 409 | 524 | SET_LATE_SYSTEM_SLEEP_PM_OPS(cros_ec_lpc_suspend, cros_ec_lpc_resume) |
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| 410 | 525 | }; |
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| 411 | 526 | |
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| .. | .. |
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| 446 | 561 | return -ENODEV; |
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| 447 | 562 | } |
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| 448 | 563 | |
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| 449 | | - cros_ec_lpc_reg_init(); |
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| 564 | + cros_ec_lpc_mec_init(EC_HOST_CMD_REGION0, |
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| 565 | + EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE); |
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| 450 | 566 | |
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| 451 | 567 | /* Register the driver */ |
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| 452 | 568 | ret = platform_driver_register(&cros_ec_lpc_driver); |
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| 453 | 569 | if (ret) { |
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| 454 | 570 | pr_err(DRV_NAME ": can't register driver: %d\n", ret); |
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| 455 | | - cros_ec_lpc_reg_destroy(); |
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| 571 | + cros_ec_lpc_mec_destroy(); |
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| 456 | 572 | return ret; |
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| 457 | 573 | } |
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| 458 | 574 | |
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| .. | .. |
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| 462 | 578 | if (ret) { |
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| 463 | 579 | pr_err(DRV_NAME ": can't register device: %d\n", ret); |
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| 464 | 580 | platform_driver_unregister(&cros_ec_lpc_driver); |
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| 465 | | - cros_ec_lpc_reg_destroy(); |
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| 581 | + cros_ec_lpc_mec_destroy(); |
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| 466 | 582 | } |
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| 467 | 583 | } |
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| 468 | 584 | |
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| .. | .. |
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| 474 | 590 | if (!cros_ec_lpc_acpi_device_found) |
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| 475 | 591 | platform_device_unregister(&cros_ec_lpc_device); |
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| 476 | 592 | platform_driver_unregister(&cros_ec_lpc_driver); |
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| 477 | | - cros_ec_lpc_reg_destroy(); |
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| 593 | + cros_ec_lpc_mec_destroy(); |
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| 478 | 594 | } |
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| 479 | 595 | |
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| 480 | 596 | module_init(cros_ec_lpc_init); |
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