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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/pinctrl/freescale/pinctrl-imx1-core.c
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@@ -60,7 +60,7 @@
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 /*
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  * IMX1 IOMUXC manages the pins based on ports. Each port has 32 pins. IOMUX
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- * control register are seperated into function, output configuration, input
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+ * control registers are separated into function, output configuration, input
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  * configuration A, input configuration B, GPIO in use and data direction.
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  *
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  * Those controls that are represented by 1 bit have a direct mapping between
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@@ -233,8 +233,8 @@
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 	 */
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 	grp = imx1_pinctrl_find_group_by_name(info, np->name);
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 	if (!grp) {
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-		dev_err(info->dev, "unable to find group for node %s\n",
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-			np->name);
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+		dev_err(info->dev, "unable to find group for node %pOFn\n",
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+			np);
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 		return -EINVAL;
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 	}
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@@ -290,7 +290,6 @@
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 	.pin_dbg_show = imx1_pin_dbg_show,
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 	.dt_node_to_map = imx1_dt_node_to_map,
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 	.dt_free_map = imx1_dt_free_map,
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-
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 };
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 static int imx1_pmx_set(struct pinctrl_dev *pctldev, unsigned selector,
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@@ -466,7 +465,7 @@
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 	const __be32 *list;
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 	int i;
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-	dev_dbg(info->dev, "group(%d): %s\n", index, np->name);
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+	dev_dbg(info->dev, "group(%d): %pOFn\n", index, np);
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 	/* Initialise group */
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 	grp->name = np->name;
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@@ -477,8 +476,8 @@
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 	list = of_get_property(np, "fsl,pins", &size);
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 	/* we do not check return since it's safe node passed down */
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 	if (!size || size % 12) {
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-		dev_notice(info->dev, "Not a valid fsl,pins property (%s)\n",
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-				np->name);
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+		dev_notice(info->dev, "Not a valid fsl,pins property (%pOFn)\n",
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+				np);
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 		return -EINVAL;
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 	}
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@@ -513,7 +512,7 @@
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 	static u32 grp_index;
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 	u32 i = 0;
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-	dev_dbg(info->dev, "parse function(%d): %s\n", index, np->name);
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+	dev_dbg(info->dev, "parse function(%d): %pOFn\n", index, np);
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 	func = &info->functions[index];
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@@ -611,7 +610,7 @@
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 	if (!res)
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 		return -ENOENT;
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-	ipctl->base = devm_ioremap_nocache(&pdev->dev, res->start,
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+	ipctl->base = devm_ioremap(&pdev->dev, res->start,
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 			resource_size(res));
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 	if (!ipctl->base)
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 		return -ENOMEM;