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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/pci/hotplug/pciehp.h
....@@ -19,113 +19,93 @@
1919 #include <linux/pci.h>
2020 #include <linux/pci_hotplug.h>
2121 #include <linux/delay.h>
22
-#include <linux/sched/signal.h>		/* signal_pending() */
2322 #include <linux/mutex.h>
2423 #include <linux/rwsem.h>
2524 #include <linux/workqueue.h>
2625 
2726 #include "../pcie/portdrv.h"
2827 
29
-#define MY_NAME	"pciehp"
30
-
3128 extern bool pciehp_poll_mode;
3229 extern int pciehp_poll_time;
33
-extern bool pciehp_debug;
3430 
35
-#define dbg(format, arg...)						\
36
-do {									\
37
-	if (pciehp_debug)						\
38
-		printk(KERN_DEBUG "%s: " format, MY_NAME, ## arg);	\
39
-} while (0)
40
-#define err(format, arg...)						\
41
-	printk(KERN_ERR "%s: " format, MY_NAME, ## arg)
42
-#define info(format, arg...)						\
43
-	printk(KERN_INFO "%s: " format, MY_NAME, ## arg)
44
-#define warn(format, arg...)						\
45
-	printk(KERN_WARNING "%s: " format, MY_NAME, ## arg)
46
-
31
+/*
32
+ * Set CONFIG_DYNAMIC_DEBUG=y and boot with 'dyndbg="file pciehp* +p"' to
33
+ * enable debug messages.
34
+ */
4735 #define ctrl_dbg(ctrl, format, arg...)					\
48
-	do {								\
49
-		if (pciehp_debug)					\
50
-			dev_printk(KERN_DEBUG, &ctrl->pcie->device,	\
51
-					format, ## arg);		\
52
-	} while (0)
36
+	pci_dbg(ctrl->pcie->port, format, ## arg)
5337 #define ctrl_err(ctrl, format, arg...)					\
54
-	dev_err(&ctrl->pcie->device, format, ## arg)
38
+	pci_err(ctrl->pcie->port, format, ## arg)
5539 #define ctrl_info(ctrl, format, arg...)					\
56
-	dev_info(&ctrl->pcie->device, format, ## arg)
40
+	pci_info(ctrl->pcie->port, format, ## arg)
5741 #define ctrl_warn(ctrl, format, arg...)					\
58
-	dev_warn(&ctrl->pcie->device, format, ## arg)
42
+	pci_warn(ctrl->pcie->port, format, ## arg)
5943 
6044 #define SLOT_NAME_SIZE 10
6145 
6246 /**
63
- * struct slot - PCIe hotplug slot
64
- * @state: current state machine position
65
- * @ctrl: pointer to the slot's controller structure
66
- * @hotplug_slot: pointer to the structure registered with the PCI hotplug core
67
- * @work: work item to turn the slot on or off after 5 seconds in response to
68
- *	an Attention Button press
69
- * @lock: protects reads and writes of @state;
70
- *	protects scheduling, execution and cancellation of @work
71
- */
72
-struct slot {
73
-	u8 state;
74
-	struct controller *ctrl;
75
-	struct hotplug_slot *hotplug_slot;
76
-	struct delayed_work work;
77
-	struct mutex lock;
78
-};
79
-
80
-/**
8147  * struct controller - PCIe hotplug controller
82
- * @ctrl_lock: serializes writes to the Slot Control register
8348  * @pcie: pointer to the controller's PCIe port service device
84
- * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
85
- *	Link Status register and to the Presence Detect State bit in the Slot
86
- *	Status register during a slot reset which may cause them to flap
87
- * @slot: pointer to the controller's slot structure
88
- * @queue: wait queue to wake up on reception of a Command Completed event,
89
- *	used for synchronous writes to the Slot Control register
9049  * @slot_cap: cached copy of the Slot Capabilities register
9150  * @slot_ctrl: cached copy of the Slot Control register
92
- * @poll_thread: thread to poll for slot events if no IRQ is available,
93
- *	enabled with pciehp_poll_mode module parameter
51
+ * @ctrl_lock: serializes writes to the Slot Control register
9452  * @cmd_started: jiffies when the Slot Control register was last written;
9553  *	the next write is allowed 1 second later, absent a Command Completed
9654  *	interrupt (PCIe r4.0, sec 6.7.3.2)
9755  * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler
9856  *	on reception of a Command Completed event
99
- * @link_active_reporting: cached copy of Data Link Layer Link Active Reporting
100
- *	Capable bit in Link Capabilities register; if this bit is zero, the
101
- *	Data Link Layer Link Active bit in the Link Status register will never
102
- *	be set and the driver is thus confined to wait 1 second before assuming
103
- *	the link to a hotplugged device is up and accessing it
57
+ * @queue: wait queue to wake up on reception of a Command Completed event,
58
+ *	used for synchronous writes to the Slot Control register
59
+ * @pending_events: used by the IRQ handler to save events retrieved from the
60
+ *	Slot Status register for later consumption by the IRQ thread
10461  * @notification_enabled: whether the IRQ was requested successfully
10562  * @power_fault_detected: whether a power fault was detected by the hardware
10663  *	that has not yet been cleared by the user
107
- * @pending_events: used by the IRQ handler to save events retrieved from the
108
- *	Slot Status register for later consumption by the IRQ thread
64
+ * @poll_thread: thread to poll for slot events if no IRQ is available,
65
+ *	enabled with pciehp_poll_mode module parameter
66
+ * @state: current state machine position
67
+ * @state_lock: protects reads and writes of @state;
68
+ *	protects scheduling, execution and cancellation of @button_work
69
+ * @button_work: work item to turn the slot on or off after 5 seconds
70
+ *	in response to an Attention Button press
71
+ * @hotplug_slot: structure registered with the PCI hotplug core
72
+ * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
73
+ *	Link Status register and to the Presence Detect State bit in the Slot
74
+ *	Status register during a slot reset which may cause them to flap
75
+ * @depth: Number of additional hotplug ports in the path to the root bus,
76
+ *	used as lock subclass for @reset_lock
10977  * @ist_running: flag to keep user request waiting while IRQ thread is running
11078  * @request_result: result of last user request submitted to the IRQ thread
11179  * @requester: wait queue to wake up on completion of user request,
11280  *	used for synchronous slot enable/disable request via sysfs
81
+ *
82
+ * PCIe hotplug has a 1:1 relationship between controller and slot, hence
83
+ * unlike other drivers, the two aren't represented by separate structures.
11384  */
11485 struct controller {
115
-	struct mutex ctrl_lock;
11686 	struct pcie_device *pcie;
117
-	struct rw_semaphore reset_lock;
118
-	struct slot *slot;
119
-	wait_queue_head_t queue;
120
-	u32 slot_cap;
121
-	u16 slot_ctrl;
122
-	struct task_struct *poll_thread;
123
-	unsigned long cmd_started;	/* jiffies */
87
+
88
+	u32 slot_cap;				/* capabilities and quirks */
89
+	unsigned int inband_presence_disabled:1;
90
+
91
+	u16 slot_ctrl;				/* control register access */
92
+	struct mutex ctrl_lock;
93
+	unsigned long cmd_started;
12494 	unsigned int cmd_busy:1;
125
-	unsigned int link_active_reporting:1;
95
+	wait_queue_head_t queue;
96
+
97
+	atomic_t pending_events;		/* event handling */
12698 	unsigned int notification_enabled:1;
12799 	unsigned int power_fault_detected;
128
-	atomic_t pending_events;
100
+	struct task_struct *poll_thread;
101
+
102
+	u8 state;				/* state machine */
103
+	struct mutex state_lock;
104
+	struct delayed_work button_work;
105
+
106
+	struct hotplug_slot hotplug_slot;	/* hotplug core interface */
107
+	struct rw_semaphore reset_lock;
108
+	unsigned int depth;
129109 	unsigned int ist_running;
130110 	int request_result;
131111 	wait_queue_head_t requester;
....@@ -136,9 +116,9 @@
136116  *
137117  * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
138118  * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
139
- *	green led is blinking
119
+ *	Power Indicator is blinking
140120  * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
141
- *	green led is blinking
121
+ *	Power Indicator is blinking
142122  * @POWERON_STATE: slot is currently powering on
143123  * @POWEROFF_STATE: slot is currently powering off
144124  * @ON_STATE: slot is powered on, subordinate devices have been enumerated
....@@ -171,47 +151,52 @@
171151 #define MRL_SENS(ctrl)		((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
172152 #define ATTN_LED(ctrl)		((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
173153 #define PWR_LED(ctrl)		((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
174
-#define HP_SUPR_RM(ctrl)	((ctrl)->slot_cap & PCI_EXP_SLTCAP_HPS)
175
-#define EMI(ctrl)		((ctrl)->slot_cap & PCI_EXP_SLTCAP_EIP)
176154 #define NO_CMD_CMPL(ctrl)	((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
177155 #define PSN(ctrl)		(((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
178156 
179
-int pciehp_sysfs_enable_slot(struct slot *slot);
180
-int pciehp_sysfs_disable_slot(struct slot *slot);
181157 void pciehp_request(struct controller *ctrl, int action);
182
-void pciehp_handle_button_press(struct slot *slot);
183
-void pciehp_handle_disable_request(struct slot *slot);
184
-void pciehp_handle_presence_or_link_change(struct slot *slot, u32 events);
185
-int pciehp_configure_device(struct slot *p_slot);
186
-void pciehp_unconfigure_device(struct slot *p_slot);
158
+void pciehp_handle_button_press(struct controller *ctrl);
159
+void pciehp_handle_disable_request(struct controller *ctrl);
160
+void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events);
161
+int pciehp_configure_device(struct controller *ctrl);
162
+void pciehp_unconfigure_device(struct controller *ctrl, bool presence);
187163 void pciehp_queue_pushbutton_work(struct work_struct *work);
188164 struct controller *pcie_init(struct pcie_device *dev);
189165 int pcie_init_notification(struct controller *ctrl);
190166 void pcie_shutdown_notification(struct controller *ctrl);
191167 void pcie_clear_hotplug_events(struct controller *ctrl);
192
-int pciehp_power_on_slot(struct slot *slot);
193
-void pciehp_power_off_slot(struct slot *slot);
194
-void pciehp_get_power_status(struct slot *slot, u8 *status);
195
-void pciehp_get_attention_status(struct slot *slot, u8 *status);
168
+void pcie_enable_interrupt(struct controller *ctrl);
169
+void pcie_disable_interrupt(struct controller *ctrl);
170
+int pciehp_power_on_slot(struct controller *ctrl);
171
+void pciehp_power_off_slot(struct controller *ctrl);
172
+void pciehp_get_power_status(struct controller *ctrl, u8 *status);
196173 
197
-void pciehp_set_attention_status(struct slot *slot, u8 status);
198
-void pciehp_get_latch_status(struct slot *slot, u8 *status);
199
-void pciehp_get_adapter_status(struct slot *slot, u8 *status);
200
-int pciehp_query_power_fault(struct slot *slot);
201
-void pciehp_green_led_on(struct slot *slot);
202
-void pciehp_green_led_off(struct slot *slot);
203
-void pciehp_green_led_blink(struct slot *slot);
174
+#define INDICATOR_NOOP -1	/* Leave indicator unchanged */
175
+void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
176
+
177
+void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
178
+int pciehp_query_power_fault(struct controller *ctrl);
179
+int pciehp_card_present(struct controller *ctrl);
180
+int pciehp_card_present_or_link_active(struct controller *ctrl);
204181 int pciehp_check_link_status(struct controller *ctrl);
205
-bool pciehp_check_link_active(struct controller *ctrl);
182
+int pciehp_check_link_active(struct controller *ctrl);
206183 void pciehp_release_ctrl(struct controller *ctrl);
207
-int pciehp_reset_slot(struct slot *slot, int probe);
208184 
185
+int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot);
186
+int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot);
187
+int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, int probe);
188
+int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status);
209189 int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
210190 int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
211191 
212
-static inline const char *slot_name(struct slot *slot)
192
+static inline const char *slot_name(struct controller *ctrl)
213193 {
214
-	return hotplug_slot_name(slot->hotplug_slot);
194
+	return hotplug_slot_name(&ctrl->hotplug_slot);
195
+}
196
+
197
+static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot)
198
+{
199
+	return container_of(hotplug_slot, struct controller, hotplug_slot);
215200 }
216201 
217202 #endif				/* _PCIEHP_H */