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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/pci/controller/pci-v3-semi.c
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@@ -239,12 +239,9 @@
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 	struct device *dev;
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 	void __iomem *base;
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241
 	void __iomem *config_base;
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-	struct pci_bus *bus;
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 	u32 config_mem;
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-	u32 io_mem;
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 	u32 non_pre_mem;
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 	u32 pre_mem;
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-	phys_addr_t io_bus_addr;
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 	phys_addr_t non_pre_bus_addr;
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 	phys_addr_t pre_bus_addr;
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 	struct regmap *map;
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@@ -520,35 +517,22 @@
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 }
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518
 
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 static int v3_pci_setup_resource(struct v3_pci *v3,
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-				 resource_size_t io_base,
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 				 struct pci_host_bridge *host,
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 				 struct resource_entry *win)
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 {
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 	struct device *dev = v3->dev;
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 	struct resource *mem;
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 	struct resource *io;
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-	int ret;
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526
 
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 	switch (resource_type(win->res)) {
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 	case IORESOURCE_IO:
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 		io = win->res;
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-		io->name = "V3 PCI I/O";
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-		v3->io_mem = io_base;
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-		v3->io_bus_addr = io->start - win->offset;
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-		dev_dbg(dev, "I/O window %pR, bus addr %pap\n",
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-			io, &v3->io_bus_addr);
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-		ret = devm_pci_remap_iospace(dev, io, io_base);
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-		if (ret) {
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-			dev_warn(dev,
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-				 "error %d: failed to map resource %pR\n",
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-				 ret, io);
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-			return ret;
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-		}
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+
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531
 		/* Setup window 2 - PCI I/O */
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-		writel(v3_addr_to_lb_base2(v3->io_mem) |
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+		writel(v3_addr_to_lb_base2(pci_pio_to_address(io->start)) |
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 		       V3_LB_BASE2_ENABLE,
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 		       v3->base + V3_LB_BASE2);
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-		writew(v3_addr_to_lb_map2(v3->io_bus_addr),
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+		writew(v3_addr_to_lb_map2(io->start - win->offset),
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 		       v3->base + V3_LB_MAP2);
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 		break;
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 	case IORESOURCE_MEM:
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@@ -600,8 +584,6 @@
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 		}
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 		break;
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 	case IORESOURCE_BUS:
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-		dev_dbg(dev, "BUS %pR\n", win->res);
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-		host->busnr = win->res->start;
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 		break;
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 	default:
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 		dev_info(dev, "Unknown resource type %lu\n",
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@@ -613,28 +595,30 @@
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 }
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 static int v3_get_dma_range_config(struct v3_pci *v3,
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-				   struct of_pci_range *range,
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+				   struct resource_entry *entry,
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 				   u32 *pci_base, u32 *pci_map)
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 {
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 	struct device *dev = v3->dev;
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-	u64 cpu_end = range->cpu_addr + range->size - 1;
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-	u64 pci_end = range->pci_addr + range->size - 1;
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+	u64 cpu_addr = entry->res->start;
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+	u64 cpu_end = entry->res->end;
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+	u64 pci_end = cpu_end - entry->offset;
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+	u64 pci_addr = entry->res->start - entry->offset;
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 	u32 val;
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607
 
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-	if (range->pci_addr & ~V3_PCI_BASE_M_ADR_BASE) {
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+	if (pci_addr & ~V3_PCI_BASE_M_ADR_BASE) {
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 		dev_err(dev, "illegal range, only PCI bits 31..20 allowed\n");
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 		return -EINVAL;
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 	}
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-	val = ((u32)range->pci_addr) & V3_PCI_BASE_M_ADR_BASE;
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+	val = ((u32)pci_addr) & V3_PCI_BASE_M_ADR_BASE;
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 	*pci_base = val;
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614
 
631
-	if (range->cpu_addr & ~V3_PCI_MAP_M_MAP_ADR) {
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+	if (cpu_addr & ~V3_PCI_MAP_M_MAP_ADR) {
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 		dev_err(dev, "illegal range, only CPU bits 31..20 allowed\n");
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 		return -EINVAL;
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 	}
635
-	val = ((u32)range->cpu_addr) & V3_PCI_MAP_M_MAP_ADR;
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+	val = ((u32)cpu_addr) & V3_PCI_MAP_M_MAP_ADR;
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620
 
637
-	switch (range->size) {
621
+	switch (resource_size(entry->res)) {
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622
 	case SZ_1M:
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623
 		val |= V3_LB_BASE_ADR_SIZE_1MB;
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 		break;
..
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@@ -674,7 +658,6 @@
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 	default:
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 		dev_err(v3->dev, "illegal dma memory chunk size\n");
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 		return -EINVAL;
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-		break;
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 	}
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 	val |= V3_PCI_MAP_M_REG_EN | V3_PCI_MAP_M_ENABLE;
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 	*pci_map = val;
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@@ -682,8 +665,8 @@
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 	dev_dbg(dev,
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666
 		"DMA MEM CPU: 0x%016llx -> 0x%016llx => "
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 		"PCI: 0x%016llx -> 0x%016llx base %08x map %08x\n",
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-		range->cpu_addr, cpu_end,
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-		range->pci_addr, pci_end,
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+		cpu_addr, cpu_end,
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+		pci_addr, pci_end,
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 		*pci_base, *pci_map);
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671
 
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 	return 0;
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@@ -692,24 +675,16 @@
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 static int v3_pci_parse_map_dma_ranges(struct v3_pci *v3,
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676
 				       struct device_node *np)
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 {
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-	struct of_pci_range range;
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-	struct of_pci_range_parser parser;
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+	struct pci_host_bridge *bridge = pci_host_bridge_from_priv(v3);
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 	struct device *dev = v3->dev;
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+	struct resource_entry *entry;
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 	int i = 0;
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682
 
700
-	if (of_pci_dma_range_parser_init(&parser, np)) {
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-		dev_err(dev, "missing dma-ranges property\n");
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-		return -EINVAL;
703
-	}
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-
705
-	/*
706
-	 * Get the dma-ranges from the device tree
707
-	 */
708
-	for_each_of_pci_range(&parser, &range) {
683
+	resource_list_for_each_entry(entry, &bridge->dma_ranges) {
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 		int ret;
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 		u32 pci_base, pci_map;
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686
 
712
-		ret = v3_get_dma_range_config(v3, &range, &pci_base, &pci_map);
687
+		ret = v3_get_dma_range_config(v3, entry, &pci_base, &pci_map);
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 		if (ret)
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 			return ret;
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690
 
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@@ -732,7 +707,6 @@
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 {
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 	struct device *dev = &pdev->dev;
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 	struct device_node *np = dev->of_node;
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-	resource_size_t io_base;
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 	struct resource *regs;
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 	struct resource_entry *win;
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 	struct v3_pci *v3;
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@@ -741,18 +715,12 @@
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 	u16 val;
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 	int irq;
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 	int ret;
744
-	LIST_HEAD(res);
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718
 
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 	host = devm_pci_alloc_host_bridge(dev, sizeof(*v3));
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 	if (!host)
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 		return -ENOMEM;
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722
 
750
-	host->dev.parent = dev;
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723
 	host->ops = &v3_pci_ops;
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-	host->busnr = 0;
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-	host->msi = NULL;
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-	host->map_irq = of_irq_parse_and_map_pci;
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-	host->swizzle_irq = pci_common_swizzle;
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 	v3 = pci_host_bridge_priv(host);
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 	host->sysdata = v3;
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 	v3->dev = dev;
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@@ -793,21 +761,11 @@
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 	if (IS_ERR(v3->config_base))
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 		return PTR_ERR(v3->config_base);
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763
 
796
-	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res,
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-						    &io_base);
798
-	if (ret)
799
-		return ret;
800
-
801
-	ret = devm_request_pci_bus_resources(dev, &res);
802
-	if (ret)
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-		return ret;
804
-
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 	/* Get and request error IRQ resource */
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 	irq = platform_get_irq(pdev, 0);
807
-	if (irq <= 0) {
808
-		dev_err(dev, "unable to obtain PCIv3 error IRQ\n");
809
-		return -ENODEV;
810
-	}
766
+	if (irq < 0)
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+		return irq;
768
+
811
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 	ret = devm_request_irq(dev, irq, v3_irq, 0,
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 			"PCIv3 error", v3);
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 	if (ret < 0) {
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@@ -852,8 +810,8 @@
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 	writew(val, v3->base + V3_PCI_CMD);
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811
 
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 	/* Get the I/O and memory ranges from DT */
855
-	resource_list_for_each_entry(win, &res) {
856
-		ret = v3_pci_setup_resource(v3, io_base, host, win);
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+	resource_list_for_each_entry(win, &host->windows) {
814
+		ret = v3_pci_setup_resource(v3, host, win);
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815
 		if (ret) {
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 			dev_err(dev, "error setting up resources\n");
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 			return ret;
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@@ -931,18 +889,7 @@
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 	val |= V3_SYSTEM_M_LOCK;
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 	writew(val, v3->base + V3_SYSTEM);
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891
 
934
-	list_splice_init(&res, &host->windows);
935
-	ret = pci_scan_root_bus_bridge(host);
936
-	if (ret) {
937
-		dev_err(dev, "failed to register host: %d\n", ret);
938
-		return ret;
939
-	}
940
-	v3->bus = host->bus;
941
-
942
-	pci_bus_assign_resources(v3->bus);
943
-	pci_bus_add_devices(v3->bus);
944
-
945
-	return 0;
892
+	return pci_host_probe(host);
946
893
 }
947
894
 
948
895
 static const struct of_device_id v3_pci_of_match[] = {