| .. | .. |
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| 34 | 34 | * Special configuration registers directly in the first few words |
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| 35 | 35 | * in I/O space. |
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| 36 | 36 | */ |
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| 37 | | -#define PCI_IOSIZE 0x00 |
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| 38 | | -#define PCI_PROT 0x04 /* AHB protection */ |
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| 39 | | -#define PCI_CTRL 0x08 /* PCI control signal */ |
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| 40 | | -#define PCI_SOFTRST 0x10 /* Soft reset counter and response error enable */ |
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| 41 | | -#define PCI_CONFIG 0x28 /* PCI configuration command register */ |
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| 42 | | -#define PCI_DATA 0x2C |
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| 37 | +#define FTPCI_IOSIZE 0x00 |
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| 38 | +#define FTPCI_PROT 0x04 /* AHB protection */ |
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| 39 | +#define FTPCI_CTRL 0x08 /* PCI control signal */ |
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| 40 | +#define FTPCI_SOFTRST 0x10 /* Soft reset counter and response error enable */ |
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| 41 | +#define FTPCI_CONFIG 0x28 /* PCI configuration command register */ |
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| 42 | +#define FTPCI_DATA 0x2C |
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| 43 | 43 | |
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| 44 | 44 | #define FARADAY_PCI_STATUS_CMD 0x04 /* Status and command */ |
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| 45 | 45 | #define FARADAY_PCI_PMC 0x40 /* Power management control */ |
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| .. | .. |
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| 195 | 195 | PCI_CONF_FUNCTION(PCI_FUNC(fn)) | |
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| 196 | 196 | PCI_CONF_WHERE(config) | |
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| 197 | 197 | PCI_CONF_ENABLE, |
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| 198 | | - p->base + PCI_CONFIG); |
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| 198 | + p->base + FTPCI_CONFIG); |
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| 199 | 199 | |
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| 200 | | - *value = readl(p->base + PCI_DATA); |
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| 200 | + *value = readl(p->base + FTPCI_DATA); |
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| 201 | 201 | |
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| 202 | 202 | if (size == 1) |
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| 203 | 203 | *value = (*value >> (8 * (config & 3))) & 0xFF; |
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| .. | .. |
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| 230 | 230 | PCI_CONF_FUNCTION(PCI_FUNC(fn)) | |
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| 231 | 231 | PCI_CONF_WHERE(config) | |
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| 232 | 232 | PCI_CONF_ENABLE, |
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| 233 | | - p->base + PCI_CONFIG); |
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| 233 | + p->base + FTPCI_CONFIG); |
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| 234 | 234 | |
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| 235 | 235 | switch (size) { |
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| 236 | 236 | case 4: |
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| 237 | | - writel(value, p->base + PCI_DATA); |
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| 237 | + writel(value, p->base + FTPCI_DATA); |
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| 238 | 238 | break; |
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| 239 | 239 | case 2: |
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| 240 | | - writew(value, p->base + PCI_DATA + (config & 3)); |
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| 240 | + writew(value, p->base + FTPCI_DATA + (config & 3)); |
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| 241 | 241 | break; |
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| 242 | 242 | case 1: |
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| 243 | | - writeb(value, p->base + PCI_DATA + (config & 3)); |
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| 243 | + writeb(value, p->base + FTPCI_DATA + (config & 3)); |
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| 244 | 244 | break; |
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| 245 | 245 | default: |
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| 246 | 246 | ret = PCIBIOS_BAD_REGISTER_NUMBER; |
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| .. | .. |
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| 375 | 375 | return 0; |
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| 376 | 376 | } |
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| 377 | 377 | |
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| 378 | | -static int faraday_pci_parse_map_dma_ranges(struct faraday_pci *p, |
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| 379 | | - struct device_node *np) |
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| 378 | +static int faraday_pci_parse_map_dma_ranges(struct faraday_pci *p) |
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| 380 | 379 | { |
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| 381 | | - struct of_pci_range range; |
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| 382 | | - struct of_pci_range_parser parser; |
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| 383 | 380 | struct device *dev = p->dev; |
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| 381 | + struct pci_host_bridge *bridge = pci_host_bridge_from_priv(p); |
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| 382 | + struct resource_entry *entry; |
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| 384 | 383 | u32 confreg[3] = { |
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| 385 | 384 | FARADAY_PCI_MEM1_BASE_SIZE, |
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| 386 | 385 | FARADAY_PCI_MEM2_BASE_SIZE, |
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| .. | .. |
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| 389 | 388 | int i = 0; |
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| 390 | 389 | u32 val; |
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| 391 | 390 | |
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| 392 | | - if (of_pci_dma_range_parser_init(&parser, np)) { |
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| 393 | | - dev_err(dev, "missing dma-ranges property\n"); |
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| 394 | | - return -EINVAL; |
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| 395 | | - } |
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| 396 | | - |
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| 397 | | - /* |
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| 398 | | - * Get the dma-ranges from the device tree |
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| 399 | | - */ |
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| 400 | | - for_each_of_pci_range(&parser, &range) { |
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| 401 | | - u64 end = range.pci_addr + range.size - 1; |
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| 391 | + resource_list_for_each_entry(entry, &bridge->dma_ranges) { |
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| 392 | + u64 pci_addr = entry->res->start - entry->offset; |
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| 393 | + u64 end = entry->res->end - entry->offset; |
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| 402 | 394 | int ret; |
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| 403 | 395 | |
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| 404 | | - ret = faraday_res_to_memcfg(range.pci_addr, range.size, &val); |
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| 396 | + ret = faraday_res_to_memcfg(pci_addr, |
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| 397 | + resource_size(entry->res), &val); |
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| 405 | 398 | if (ret) { |
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| 406 | 399 | dev_err(dev, |
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| 407 | 400 | "DMA range %d: illegal MEM resource size\n", i); |
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| .. | .. |
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| 409 | 402 | } |
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| 410 | 403 | |
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| 411 | 404 | dev_info(dev, "DMA MEM%d BASE: 0x%016llx -> 0x%016llx config %08x\n", |
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| 412 | | - i + 1, range.pci_addr, end, val); |
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| 405 | + i + 1, pci_addr, end, val); |
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| 413 | 406 | if (i <= 2) { |
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| 414 | 407 | faraday_raw_pci_write_config(p, 0, 0, confreg[i], |
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| 415 | 408 | 4, val); |
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| .. | .. |
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| 429 | 422 | struct device *dev = &pdev->dev; |
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| 430 | 423 | const struct faraday_pci_variant *variant = |
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| 431 | 424 | of_device_get_match_data(dev); |
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| 432 | | - struct resource *regs; |
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| 433 | | - resource_size_t io_base; |
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| 434 | 425 | struct resource_entry *win; |
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| 435 | 426 | struct faraday_pci *p; |
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| 436 | | - struct resource *mem; |
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| 437 | 427 | struct resource *io; |
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| 438 | 428 | struct pci_host_bridge *host; |
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| 439 | 429 | struct clk *clk; |
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| .. | .. |
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| 441 | 431 | unsigned char cur_bus_speed = PCI_SPEED_33MHz; |
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| 442 | 432 | int ret; |
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| 443 | 433 | u32 val; |
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| 444 | | - LIST_HEAD(res); |
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| 445 | 434 | |
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| 446 | 435 | host = devm_pci_alloc_host_bridge(dev, sizeof(*p)); |
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| 447 | 436 | if (!host) |
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| 448 | 437 | return -ENOMEM; |
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| 449 | 438 | |
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| 450 | | - host->dev.parent = dev; |
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| 451 | 439 | host->ops = &faraday_pci_ops; |
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| 452 | | - host->busnr = 0; |
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| 453 | | - host->msi = NULL; |
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| 454 | | - host->map_irq = of_irq_parse_and_map_pci; |
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| 455 | | - host->swizzle_irq = pci_common_swizzle; |
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| 456 | 440 | p = pci_host_bridge_priv(host); |
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| 457 | 441 | host->sysdata = p; |
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| 458 | 442 | p->dev = dev; |
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| .. | .. |
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| 475 | 459 | return ret; |
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| 476 | 460 | } |
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| 477 | 461 | |
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| 478 | | - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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| 479 | | - p->base = devm_ioremap_resource(dev, regs); |
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| 462 | + p->base = devm_platform_ioremap_resource(pdev, 0); |
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| 480 | 463 | if (IS_ERR(p->base)) |
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| 481 | 464 | return PTR_ERR(p->base); |
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| 482 | 465 | |
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| 483 | | - ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, |
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| 484 | | - &res, &io_base); |
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| 485 | | - if (ret) |
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| 486 | | - return ret; |
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| 487 | | - |
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| 488 | | - ret = devm_request_pci_bus_resources(dev, &res); |
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| 489 | | - if (ret) |
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| 490 | | - return ret; |
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| 491 | | - |
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| 492 | | - /* Get the I/O and memory ranges from DT */ |
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| 493 | | - resource_list_for_each_entry(win, &res) { |
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| 494 | | - switch (resource_type(win->res)) { |
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| 495 | | - case IORESOURCE_IO: |
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| 496 | | - io = win->res; |
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| 497 | | - io->name = "Gemini PCI I/O"; |
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| 498 | | - if (!faraday_res_to_memcfg(io->start - win->offset, |
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| 499 | | - resource_size(io), &val)) { |
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| 500 | | - /* setup I/O space size */ |
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| 501 | | - writel(val, p->base + PCI_IOSIZE); |
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| 502 | | - } else { |
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| 503 | | - dev_err(dev, "illegal IO mem size\n"); |
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| 504 | | - return -EINVAL; |
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| 505 | | - } |
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| 506 | | - ret = devm_pci_remap_iospace(dev, io, io_base); |
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| 507 | | - if (ret) { |
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| 508 | | - dev_warn(dev, "error %d: failed to map resource %pR\n", |
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| 509 | | - ret, io); |
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| 510 | | - continue; |
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| 511 | | - } |
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| 512 | | - break; |
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| 513 | | - case IORESOURCE_MEM: |
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| 514 | | - mem = win->res; |
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| 515 | | - mem->name = "Gemini PCI MEM"; |
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| 516 | | - break; |
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| 517 | | - case IORESOURCE_BUS: |
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| 518 | | - break; |
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| 519 | | - default: |
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| 520 | | - break; |
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| 466 | + win = resource_list_first_type(&host->windows, IORESOURCE_IO); |
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| 467 | + if (win) { |
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| 468 | + io = win->res; |
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| 469 | + if (!faraday_res_to_memcfg(io->start - win->offset, |
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| 470 | + resource_size(io), &val)) { |
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| 471 | + /* setup I/O space size */ |
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| 472 | + writel(val, p->base + FTPCI_IOSIZE); |
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| 473 | + } else { |
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| 474 | + dev_err(dev, "illegal IO mem size\n"); |
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| 475 | + return -EINVAL; |
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| 521 | 476 | } |
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| 522 | 477 | } |
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| 523 | 478 | |
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| 524 | 479 | /* Setup hostbridge */ |
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| 525 | | - val = readl(p->base + PCI_CTRL); |
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| 480 | + val = readl(p->base + FTPCI_CTRL); |
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| 526 | 481 | val |= PCI_COMMAND_IO; |
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| 527 | 482 | val |= PCI_COMMAND_MEMORY; |
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| 528 | 483 | val |= PCI_COMMAND_MASTER; |
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| 529 | | - writel(val, p->base + PCI_CTRL); |
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| 484 | + writel(val, p->base + FTPCI_CTRL); |
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| 530 | 485 | /* Mask and clear all interrupts */ |
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| 531 | 486 | faraday_raw_pci_write_config(p, 0, 0, FARADAY_PCI_CTRL2 + 2, 2, 0xF000); |
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| 532 | 487 | if (variant->cascaded_irq) { |
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| .. | .. |
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| 565 | 520 | cur_bus_speed = PCI_SPEED_66MHz; |
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| 566 | 521 | } |
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| 567 | 522 | |
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| 568 | | - ret = faraday_pci_parse_map_dma_ranges(p, dev->of_node); |
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| 523 | + ret = faraday_pci_parse_map_dma_ranges(p); |
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| 569 | 524 | if (ret) |
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| 570 | 525 | return ret; |
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| 571 | 526 | |
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| 572 | | - list_splice_init(&res, &host->windows); |
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| 573 | 527 | ret = pci_scan_root_bus_bridge(host); |
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| 574 | 528 | if (ret) { |
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| 575 | 529 | dev_err(dev, "failed to scan host: %d\n", ret); |
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| .. | .. |
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| 581 | 535 | |
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| 582 | 536 | pci_bus_assign_resources(p->bus); |
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| 583 | 537 | pci_bus_add_devices(p->bus); |
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| 584 | | - pci_free_resource_list(&res); |
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| 585 | 538 | |
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| 586 | 539 | return 0; |
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| 587 | 540 | } |
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