forked from ~ljy/RK356X_SDK_RELEASE

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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/phy.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2014  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2014  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../pci.h"
....@@ -65,15 +43,15 @@
6543 	struct rtl_priv *rtlpriv = rtl_priv(hw);
6644 	u32 returnvalue, originalvalue, bitshift;
6745 
68
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
69
-		 "regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask);
46
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
47
+		"regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask);
7048 	originalvalue = rtl_read_dword(rtlpriv, regaddr);
7149 	bitshift = _rtl92ee_phy_calculate_bit_shift(bitmask);
7250 	returnvalue = (originalvalue & bitmask) >> bitshift;
7351 
74
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
75
-		 "BBR MASK=0x%x Addr[0x%x]=0x%x\n",
76
-		  bitmask, regaddr, originalvalue);
52
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
53
+		"BBR MASK=0x%x Addr[0x%x]=0x%x\n",
54
+		bitmask, regaddr, originalvalue);
7755 
7856 	return returnvalue;
7957 }
....@@ -84,9 +62,9 @@
8462 	struct rtl_priv *rtlpriv = rtl_priv(hw);
8563 	u32 originalvalue, bitshift;
8664 
87
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
88
-		 "regaddr(%#x), bitmask(%#x), data(%#x)\n",
89
-		  regaddr, bitmask, data);
65
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
66
+		"regaddr(%#x), bitmask(%#x), data(%#x)\n",
67
+		regaddr, bitmask, data);
9068 
9169 	if (bitmask != MASKDWORD) {
9270 		originalvalue = rtl_read_dword(rtlpriv, regaddr);
....@@ -96,9 +74,9 @@
9674 
9775 	rtl_write_dword(rtlpriv, regaddr, data);
9876 
99
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
100
-		 "regaddr(%#x), bitmask(%#x), data(%#x)\n",
101
-		  regaddr, bitmask, data);
77
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
78
+		"regaddr(%#x), bitmask(%#x), data(%#x)\n",
79
+		regaddr, bitmask, data);
10280 }
10381 
10482 u32 rtl92ee_phy_query_rf_reg(struct ieee80211_hw *hw,
....@@ -106,23 +84,22 @@
10684 {
10785 	struct rtl_priv *rtlpriv = rtl_priv(hw);
10886 	u32 original_value, readback_value, bitshift;
109
-	unsigned long flags;
11087 
111
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
112
-		 "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n",
113
-		  regaddr, rfpath, bitmask);
88
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
89
+		"regaddr(%#x), rfpath(%#x), bitmask(%#x)\n",
90
+		regaddr, rfpath, bitmask);
11491 
115
-	spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
92
+	spin_lock(&rtlpriv->locks.rf_lock);
11693 
11794 	original_value = _rtl92ee_phy_rf_serial_read(hw , rfpath, regaddr);
11895 	bitshift = _rtl92ee_phy_calculate_bit_shift(bitmask);
11996 	readback_value = (original_value & bitmask) >> bitshift;
12097 
121
-	spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
98
+	spin_unlock(&rtlpriv->locks.rf_lock);
12299 
123
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
124
-		 "regaddr(%#x),rfpath(%#x),bitmask(%#x),original_value(%#x)\n",
125
-		  regaddr, rfpath, bitmask, original_value);
100
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
101
+		"regaddr(%#x),rfpath(%#x),bitmask(%#x),original_value(%#x)\n",
102
+		regaddr, rfpath, bitmask, original_value);
126103 
127104 	return readback_value;
128105 }
....@@ -133,13 +110,12 @@
133110 {
134111 	struct rtl_priv *rtlpriv = rtl_priv(hw);
135112 	u32 original_value, bitshift;
136
-	unsigned long flags;
137113 
138
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
139
-		 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
140
-		  addr, bitmask, data, rfpath);
114
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
115
+		"regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
116
+		addr, bitmask, data, rfpath);
141117 
142
-	spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
118
+	spin_lock(&rtlpriv->locks.rf_lock);
143119 
144120 	if (bitmask != RFREG_OFFSET_MASK) {
145121 		original_value = _rtl92ee_phy_rf_serial_read(hw, rfpath, addr);
....@@ -149,11 +125,11 @@
149125 
150126 	_rtl92ee_phy_rf_serial_write(hw, rfpath, addr, data);
151127 
152
-	spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
128
+	spin_unlock(&rtlpriv->locks.rf_lock);
153129 
154
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
155
-		 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
156
-		  addr, bitmask, data, rfpath);
130
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
131
+		"regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
132
+		addr, bitmask, data, rfpath);
157133 }
158134 
159135 static u32 _rtl92ee_phy_rf_serial_read(struct ieee80211_hw *hw,
....@@ -182,9 +158,8 @@
182158 		   (newoffset << 23) | BLSSIREADEDGE;
183159 	rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
184160 		      tmplong & (~BLSSIREADEDGE));
185
-	mdelay(1);
186161 	rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);
187
-	mdelay(2);
162
+	udelay(20);
188163 	if (rfpath == RF90_PATH_A)
189164 		rfpi_enable = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER1,
190165 						BIT(8));
....@@ -197,9 +172,9 @@
197172 	else
198173 		retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb,
199174 					 BLSSIREADBACKDATA);
200
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
201
-		 "RFR-%d Addr[0x%x]=0x%x\n",
202
-		  rfpath, pphyreg->rf_rb, retvalue);
175
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
176
+		"RFR-%d Addr[0x%x]=0x%x\n",
177
+		rfpath, pphyreg->rf_rb, retvalue);
203178 	return retvalue;
204179 }
205180 
....@@ -221,20 +196,16 @@
221196 	newoffset = offset;
222197 	data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff;
223198 	rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);
224
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
225
-		 "RFW-%d Addr[0x%x]=0x%x\n", rfpath,
226
-		 pphyreg->rf3wire_offset, data_and_addr);
199
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
200
+		"RFW-%d Addr[0x%x]=0x%x\n", rfpath,
201
+		pphyreg->rf3wire_offset, data_and_addr);
227202 }
228203 
229204 static u32 _rtl92ee_phy_calculate_bit_shift(u32 bitmask)
230205 {
231
-	u32 i;
206
+	u32 i = ffs(bitmask);
232207 
233
-	for (i = 0; i <= 31; i++) {
234
-		if (((bitmask >> i) & 0x1) == 1)
235
-			break;
236
-	}
237
-	return i;
208
+	return i ? i - 1 : 32;
238209 }
239210 
240211 bool rtl92ee_phy_mac_config(struct ieee80211_hw *hw)
....@@ -425,8 +396,8 @@
425396 	struct rtl_phy *rtlphy = &rtlpriv->phy;
426397 
427398 	if (path > RF90_PATH_D) {
428
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
429
-			 "Invalid Rf Path %d\n", path);
399
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
400
+			"Invalid Rf Path %d\n", path);
430401 		return;
431402 	}
432403 
....@@ -445,14 +416,14 @@
445416 			rtlphy->txpwr_by_rate_base_24g[path][txnum][3] = value;
446417 			break;
447418 		default:
448
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
449
-				 "Invalid RateSection %d in 2.4G,Rf %d,%dTx\n",
450
-				  rate_section, path, txnum);
419
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
420
+				"Invalid RateSection %d in 2.4G,Rf %d,%dTx\n",
421
+				rate_section, path, txnum);
451422 			break;
452423 		}
453424 	} else {
454
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
455
-			 "Invalid Band %d\n", band);
425
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
426
+			"Invalid Band %d\n", band);
456427 	}
457428 }
458429 
....@@ -465,8 +436,8 @@
465436 	u8 value = 0;
466437 
467438 	if (path > RF90_PATH_D) {
468
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
469
-			 "Invalid Rf Path %d\n", path);
439
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
440
+			"Invalid Rf Path %d\n", path);
470441 		return 0;
471442 	}
472443 
....@@ -485,14 +456,14 @@
485456 			value = rtlphy->txpwr_by_rate_base_24g[path][txnum][3];
486457 			break;
487458 		default:
488
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
489
-				 "Invalid RateSection %d in 2.4G,Rf %d,%dTx\n",
490
-				  rate_section, path, txnum);
459
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
460
+				"Invalid RateSection %d in 2.4G,Rf %d,%dTx\n",
461
+				rate_section, path, txnum);
491462 			break;
492463 		}
493464 	} else {
494
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
495
-			 "Invalid Band %d()\n", band);
465
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
466
+			"Invalid Band %d()\n", band);
496467 	}
497468 	return value;
498469 }
....@@ -631,8 +602,8 @@
631602 			0, 3, base);
632603 	}
633604 
634
-	RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
635
-		 "<==phy_convert_txpwr_dbm_to_rel_val()\n");
605
+	rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE,
606
+		"<==%s\n", __func__);
636607 }
637608 
638609 static void _rtl92ee_phy_txpower_by_rate_configuration(struct ieee80211_hw *hw)
....@@ -684,11 +655,11 @@
684655 	u32 arraylength;
685656 	u32 *ptrarray;
686657 
687
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl8192EMACPHY_Array\n");
658
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl8192EMACPHY_Array\n");
688659 	arraylength = RTL8192EE_MAC_ARRAY_LEN;
689660 	ptrarray = RTL8192EE_MAC_ARRAY;
690
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
691
-		 "Img:RTL8192EE_MAC_ARRAY LEN %d\n" , arraylength);
661
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
662
+		"Img:RTL8192EE_MAC_ARRAY LEN %d\n", arraylength);
692663 	for (i = 0; i < arraylength; i = i + 2)
693664 		rtl_write_byte(rtlpriv, ptrarray[i], (u8)ptrarray[i + 1]);
694665 	return true;
....@@ -801,10 +772,10 @@
801772 					}
802773 				}
803774 			}
804
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
805
-				 "The agctab_array_table[0] is %x Rtl818EEPHY_REGArray[1] is %x\n",
806
-				 array[i],
807
-				 array[i + 1]);
775
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
776
+				"The agctab_array_table[0] is %x Rtl818EEPHY_REGArray[1] is %x\n",
777
+				array[i],
778
+				array[i + 1]);
808779 		}
809780 	}
810781 	return true;
....@@ -868,17 +839,17 @@
868839 	u8 section = _rtl92ee_get_rate_section_index(regaddr);
869840 
870841 	if (band != BAND_ON_2_4G && band != BAND_ON_5G) {
871
-		RT_TRACE(rtlpriv, FPHY, PHY_TXPWR, "Invalid Band %d\n", band);
842
+		rtl_dbg(rtlpriv, FPHY, PHY_TXPWR, "Invalid Band %d\n", band);
872843 		return;
873844 	}
874845 
875846 	if (rfpath > MAX_RF_PATH - 1) {
876
-		RT_TRACE(rtlpriv, FPHY, PHY_TXPWR,
877
-			 "Invalid RfPath %d\n", rfpath);
847
+		rtl_dbg(rtlpriv, FPHY, PHY_TXPWR,
848
+			"Invalid RfPath %d\n", rfpath);
878849 		return;
879850 	}
880851 	if (txnum > MAX_RF_PATH - 1) {
881
-		RT_TRACE(rtlpriv, FPHY, PHY_TXPWR, "Invalid TxNum %d\n", txnum);
852
+		rtl_dbg(rtlpriv, FPHY, PHY_TXPWR, "Invalid TxNum %d\n", txnum);
882853 		return;
883854 	}
884855 
....@@ -913,8 +884,8 @@
913884 			}
914885 		}
915886 	} else {
916
-		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
917
-			 "configtype != BaseBand_Config_PHY_REG\n");
887
+		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
888
+			"configtype != BaseBand_Config_PHY_REG\n");
918889 	}
919890 	return true;
920891 }
....@@ -939,9 +910,9 @@
939910 	case RF90_PATH_A:
940911 		len = RTL8192EE_RADIOA_ARRAY_LEN;
941912 		array = RTL8192EE_RADIOA_ARRAY;
942
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
943
-			 "Radio_A:RTL8192EE_RADIOA_ARRAY %d\n" , len);
944
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath);
913
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
914
+			"Radio_A:RTL8192EE_RADIOA_ARRAY %d\n", len);
915
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath);
945916 		for (i = 0; i < len; i = i + 2) {
946917 			v1 = array[i];
947918 			v2 = array[i+1];
....@@ -986,9 +957,9 @@
986957 	case RF90_PATH_B:
987958 		len = RTL8192EE_RADIOB_ARRAY_LEN;
988959 		array = RTL8192EE_RADIOB_ARRAY;
989
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
990
-			 "Radio_A:RTL8192EE_RADIOB_ARRAY %d\n" , len);
991
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath);
960
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
961
+			"Radio_A:RTL8192EE_RADIOB_ARRAY %d\n", len);
962
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath);
992963 		for (i = 0; i < len; i = i + 2) {
993964 			v1 = array[i];
994965 			v2 = array[i+1];
....@@ -1050,21 +1021,21 @@
10501021 	rtlphy->default_initialgain[3] =
10511022 		(u8)rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);
10521023 
1053
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1054
-		 "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n",
1055
-		  rtlphy->default_initialgain[0],
1056
-		  rtlphy->default_initialgain[1],
1057
-		  rtlphy->default_initialgain[2],
1058
-		  rtlphy->default_initialgain[3]);
1024
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1025
+		"Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n",
1026
+		rtlphy->default_initialgain[0],
1027
+		rtlphy->default_initialgain[1],
1028
+		rtlphy->default_initialgain[2],
1029
+		rtlphy->default_initialgain[3]);
10591030 
10601031 	rtlphy->framesync = (u8)rtl_get_bbreg(hw,
10611032 					      ROFDM0_RXDETECTOR3, MASKBYTE0);
10621033 	rtlphy->framesync_c34 = rtl_get_bbreg(hw,
10631034 					      ROFDM0_RXDETECTOR2, MASKDWORD);
10641035 
1065
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1066
-		 "Default framesync (0x%x) = 0x%x\n",
1067
-		  ROFDM0_RXDETECTOR3, rtlphy->framesync);
1036
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1037
+		"Default framesync (0x%x) = 0x%x\n",
1038
+		ROFDM0_RXDETECTOR3, rtlphy->framesync);
10681039 }
10691040 
10701041 static void phy_init_bb_rf_register_def(struct ieee80211_hw *hw)
....@@ -1261,8 +1232,8 @@
12611232 
12621233 	if (channel < 1 || channel > 14) {
12631234 		index = 0;
1264
-		RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_DMESG,
1265
-			 "Illegal channel!!\n");
1235
+		rtl_dbg(rtlpriv, COMP_POWER_TRACKING, DBG_DMESG,
1236
+			"Illegal channel!!\n");
12661237 	}
12671238 
12681239 	if (IS_CCK_RATE((s8)rate))
....@@ -1420,8 +1391,8 @@
14201391 				      pwr_idx);
14211392 			break;
14221393 		default:
1423
-			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1424
-				 "Invalid Rate!!\n");
1394
+			rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
1395
+				"Invalid Rate!!\n");
14251396 			break;
14261397 		}
14271398 	} else if (rfpath == RF90_PATH_B) {
....@@ -1539,12 +1510,12 @@
15391510 				      pwr_idx);
15401511 			break;
15411512 		default:
1542
-			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
1543
-				 "Invalid Rate!!\n");
1513
+			rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD,
1514
+				"Invalid Rate!!\n");
15441515 			break;
15451516 		}
15461517 	} else {
1547
-		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "Invalid RFPath!!\n");
1518
+		rtl_dbg(rtlpriv, COMP_POWER, DBG_LOUD, "Invalid RFPath!!\n");
15481519 	}
15491520 }
15501521 
....@@ -1603,8 +1574,8 @@
16031574 						    rtlphy->current_chan_bw,
16041575 						    channel, ht_rates2t, 8);
16051576 	} else
1606
-		RT_TRACE(rtlpriv, FPHY, PHY_TXPWR,
1607
-			 "Invalid RateSection %d\n", section);
1577
+		rtl_dbg(rtlpriv, FPHY, PHY_TXPWR,
1578
+			"Invalid RateSection %d\n", section);
16081579 }
16091580 
16101581 void rtl92ee_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel)
....@@ -1690,10 +1661,10 @@
16901661 	u8 reg_bw_opmode;
16911662 	u8 reg_prsr_rsc;
16921663 
1693
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
1694
-		 "Switch to %s bandwidth\n",
1695
-		  rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
1696
-		  "20MHz" : "40MHz");
1664
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE,
1665
+		"Switch to %s bandwidth\n",
1666
+		rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
1667
+		"20MHz" : "40MHz");
16971668 
16981669 	if (is_hal_stop(rtlhal)) {
16991670 		rtlphy->set_bwmode_inprogress = false;
....@@ -1747,7 +1718,7 @@
17471718 	}
17481719 	rtl92ee_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
17491720 	rtlphy->set_bwmode_inprogress = false;
1750
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_LOUD, "\n");
1721
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_LOUD, "\n");
17511722 }
17521723 
17531724 void rtl92ee_phy_set_bw_mode(struct ieee80211_hw *hw,
....@@ -1764,8 +1735,8 @@
17641735 	if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
17651736 		rtl92ee_phy_set_bw_mode_callback(hw);
17661737 	} else {
1767
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1768
-			 "false driver sleep or unload\n");
1738
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1739
+			"false driver sleep or unload\n");
17691740 		rtlphy->set_bwmode_inprogress = false;
17701741 		rtlphy->current_chan_bw = tmp_bw;
17711742 	}
....@@ -1778,8 +1749,8 @@
17781749 	struct rtl_phy *rtlphy = &rtlpriv->phy;
17791750 	u32 delay;
17801751 
1781
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
1782
-		 "switch to channel%d\n", rtlphy->current_channel);
1752
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE,
1753
+		"switch to channel%d\n", rtlphy->current_channel);
17831754 	if (is_hal_stop(rtlhal))
17841755 		return;
17851756 	do {
....@@ -1797,7 +1768,7 @@
17971768 		}
17981769 		break;
17991770 	} while (true);
1800
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
1771
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
18011772 }
18021773 
18031774 u8 rtl92ee_phy_sw_chnl(struct ieee80211_hw *hw)
....@@ -1817,13 +1788,13 @@
18171788 	rtlphy->sw_chnl_step = 0;
18181789 	if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
18191790 		rtl92ee_phy_sw_chnl_callback(hw);
1820
-		RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
1821
-			 "sw_chnl_inprogress false schedule workitem current channel %d\n",
1822
-			 rtlphy->current_channel);
1791
+		rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD,
1792
+			"sw_chnl_inprogress false schedule workitem current channel %d\n",
1793
+			rtlphy->current_channel);
18231794 		rtlphy->sw_chnl_inprogress = false;
18241795 	} else {
1825
-		RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
1826
-			 "sw_chnl_inprogress false driver sleep or unload\n");
1796
+		rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD,
1797
+			"sw_chnl_inprogress false driver sleep or unload\n");
18271798 		rtlphy->sw_chnl_inprogress = false;
18281799 	}
18291800 	return 1;
....@@ -1925,9 +1896,9 @@
19251896 			}
19261897 			break;
19271898 		default:
1928
-			RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1929
-				 "switch case %#x not processed\n",
1930
-				 currentcmd->cmdid);
1899
+			rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
1900
+				"switch case %#x not processed\n",
1901
+				currentcmd->cmdid);
19311902 			break;
19321903 		}
19331904 
....@@ -2273,7 +2244,7 @@
22732244 	    (((reg_ecc & 0x03FF0000) >> 16) != 0x36))
22742245 		result |= 0x02;
22752246 	else
2276
-		RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD, "Path B Rx IQK fail!!\n");
2247
+		rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD, "Path B Rx IQK fail!!\n");
22772248 
22782249 	return result;
22792250 }
....@@ -2570,8 +2541,8 @@
25702541 		patha_ok = _rtl92ee_phy_path_a_iqk(hw, is2t);
25712542 
25722543 		if (patha_ok == 0x01) {
2573
-			RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2574
-				 "Path A Tx IQK Success!!\n");
2544
+			rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2545
+				"Path A Tx IQK Success!!\n");
25752546 			result[t][0] = (rtl_get_bbreg(hw,
25762547 						      RTX_POWER_BEFORE_IQK_A,
25772548 						      MASKDWORD) & 0x3FF0000)
....@@ -2581,17 +2552,17 @@
25812552 						      >> 16;
25822553 			break;
25832554 		}
2584
-		RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2585
-			 "Path A Tx IQK Fail!!, ret = 0x%x\n",
2586
-			 patha_ok);
2555
+		rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2556
+			"Path A Tx IQK Fail!!, ret = 0x%x\n",
2557
+			patha_ok);
25872558 	}
25882559 
25892560 	for (i = 0 ; i < retrycount ; i++) {
25902561 		patha_ok = _rtl92ee_phy_path_a_rx_iqk(hw, is2t);
25912562 
25922563 		if (patha_ok == 0x03) {
2593
-			RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2594
-				 "Path A Rx IQK Success!!\n");
2564
+			rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2565
+				"Path A Rx IQK Success!!\n");
25952566 			result[t][2] = (rtl_get_bbreg(hw,
25962567 						      RRX_POWER_BEFORE_IQK_A_2,
25972568 						      MASKDWORD) & 0x3FF0000)
....@@ -2602,14 +2573,14 @@
26022573 						      >> 16;
26032574 			break;
26042575 		}
2605
-		RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2606
-			 "Path A Rx IQK Fail!!, ret = 0x%x\n",
2607
-			  patha_ok);
2576
+		rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2577
+			"Path A Rx IQK Fail!!, ret = 0x%x\n",
2578
+			patha_ok);
26082579 	}
26092580 
26102581 	if (0x00 == patha_ok)
2611
-		RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2612
-			 "Path A IQK failed!!, ret = 0\n");
2582
+		rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2583
+			"Path A IQK failed!!, ret = 0\n");
26132584 	if (is2t) {
26142585 		_rtl92ee_phy_path_a_standby(hw);
26152586 		/* Turn Path B ADDA on */
....@@ -2623,8 +2594,8 @@
26232594 		for (i = 0 ; i < retrycount ; i++) {
26242595 			pathb_ok = _rtl92ee_phy_path_b_iqk(hw);
26252596 			if (pathb_ok == 0x01) {
2626
-				RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2627
-					 "Path B Tx IQK Success!!\n");
2597
+				rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2598
+					"Path B Tx IQK Success!!\n");
26282599 				result[t][4] = (rtl_get_bbreg(hw,
26292600 							RTX_POWER_BEFORE_IQK_B,
26302601 							MASKDWORD) & 0x3FF0000)
....@@ -2635,16 +2606,16 @@
26352606 							>> 16;
26362607 				break;
26372608 			}
2638
-			RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2639
-				 "Path B Tx IQK Fail!!, ret = 0x%x\n",
2640
-				 pathb_ok);
2609
+			rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2610
+				"Path B Tx IQK Fail!!, ret = 0x%x\n",
2611
+				pathb_ok);
26412612 		}
26422613 
26432614 		for (i = 0 ; i < retrycount ; i++) {
26442615 			pathb_ok = _rtl92ee_phy_path_b_rx_iqk(hw, is2t);
26452616 			if (pathb_ok == 0x03) {
2646
-				RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2647
-					 "Path B Rx IQK Success!!\n");
2617
+				rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2618
+					"Path B Rx IQK Success!!\n");
26482619 				result[t][6] = (rtl_get_bbreg(hw,
26492620 						       RRX_POWER_BEFORE_IQK_B_2,
26502621 						       MASKDWORD) & 0x3FF0000)
....@@ -2655,18 +2626,18 @@
26552626 						       >> 16;
26562627 				break;
26572628 			}
2658
-			RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2659
-				 "Path B Rx IQK Fail!!, ret = 0x%x\n",
2660
-				 pathb_ok);
2629
+			rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2630
+				"Path B Rx IQK Fail!!, ret = 0x%x\n",
2631
+				pathb_ok);
26612632 		}
26622633 
26632634 		if (0x00 == pathb_ok)
2664
-			RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2665
-				 "Path B IQK failed!!, ret = 0\n");
2635
+			rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2636
+				"Path B IQK failed!!, ret = 0\n");
26662637 	}
26672638 	/* Back to BB mode, load original value */
2668
-	RT_TRACE(rtlpriv, COMP_RF, DBG_LOUD,
2669
-		 "IQK:Back to BB mode, load original value!\n");
2639
+	rtl_dbg(rtlpriv, COMP_RF, DBG_LOUD,
2640
+		"IQK:Back to BB mode, load original value!\n");
26702641 	rtl_set_bbreg(hw, RFPGA0_IQK, MASKDWORD, 0);
26712642 
26722643 	if (t != 0) {
....@@ -2749,7 +2720,7 @@
27492720 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
27502721 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
27512722 
2752
-	RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD , "\n");
2723
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "\n");
27532724 
27542725 	if (is_hal_stop(rtlhal)) {
27552726 		u8 u1btmp;
....@@ -2823,8 +2794,8 @@
28232794 	long result[4][8];
28242795 	u8 i, final_candidate;
28252796 	bool b_patha_ok, b_pathb_ok;
2826
-	long reg_e94, reg_e9c, reg_ea4, reg_eac;
2827
-	long reg_eb4, reg_ebc, reg_ec4, reg_ecc;
2797
+	long reg_e94, reg_e9c, reg_ea4;
2798
+	long reg_eb4, reg_ebc, reg_ec4;
28282799 	bool is12simular, is13simular, is23simular;
28292800 	u8 idx;
28302801 	u32 iqk_bb_reg[IQK_BB_REG_NUM] = {
....@@ -2891,16 +2862,12 @@
28912862 		}
28922863 	}
28932864 
2894
-	for (i = 0; i < 4; i++) {
2895
-		reg_e94 = result[i][0];
2896
-		reg_e9c = result[i][1];
2897
-		reg_ea4 = result[i][2];
2898
-		reg_eac = result[i][3];
2899
-		reg_eb4 = result[i][4];
2900
-		reg_ebc = result[i][5];
2901
-		reg_ec4 = result[i][6];
2902
-		reg_ecc = result[i][7];
2903
-	}
2865
+	reg_e94 = result[3][0];
2866
+	reg_e9c = result[3][1];
2867
+	reg_ea4 = result[3][2];
2868
+	reg_eb4 = result[3][4];
2869
+	reg_ebc = result[3][5];
2870
+	reg_ec4 = result[3][6];
29042871 
29052872 	if (final_candidate != 0xff) {
29062873 		reg_e94 = result[final_candidate][0];
....@@ -2908,13 +2875,11 @@
29082875 		reg_e9c = result[final_candidate][1];
29092876 		rtlphy->reg_e9c = reg_e9c;
29102877 		reg_ea4 = result[final_candidate][2];
2911
-		reg_eac = result[final_candidate][3];
29122878 		reg_eb4 = result[final_candidate][4];
29132879 		rtlphy->reg_eb4 = reg_eb4;
29142880 		reg_ebc = result[final_candidate][5];
29152881 		rtlphy->reg_ebc = reg_ebc;
29162882 		reg_ec4 = result[final_candidate][6];
2917
-		reg_ecc = result[final_candidate][7];
29182883 		b_patha_ok = true;
29192884 		b_pathb_ok = true;
29202885 	} else {
....@@ -2984,24 +2949,24 @@
29842949 	struct rtl_phy *rtlphy = &rtlpriv->phy;
29852950 	bool postprocessing = false;
29862951 
2987
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2988
-		 "-->IO Cmd(%#x), set_io_inprogress(%d)\n",
2989
-		  iotype, rtlphy->set_io_inprogress);
2952
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2953
+		"-->IO Cmd(%#x), set_io_inprogress(%d)\n",
2954
+		iotype, rtlphy->set_io_inprogress);
29902955 	do {
29912956 		switch (iotype) {
29922957 		case IO_CMD_RESUME_DM_BY_SCAN:
2993
-			RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2994
-				 "[IO CMD] Resume DM after scan.\n");
2958
+			rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2959
+				"[IO CMD] Resume DM after scan.\n");
29952960 			postprocessing = true;
29962961 			break;
29972962 		case IO_CMD_PAUSE_BAND0_DM_BY_SCAN:
2998
-			RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2999
-				 "[IO CMD] Pause DM before scan.\n");
2963
+			rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2964
+				"[IO CMD] Pause DM before scan.\n");
30002965 			postprocessing = true;
30012966 			break;
30022967 		default:
3003
-			RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
3004
-				 "switch case %#x not processed\n", iotype);
2968
+			rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
2969
+				"switch case %#x not processed\n", iotype);
30052970 			break;
30062971 		}
30072972 	} while (false);
....@@ -3012,7 +2977,7 @@
30122977 		return false;
30132978 	}
30142979 	rtl92ee_phy_set_io(hw);
3015
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype);
2980
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype);
30162981 	return true;
30172982 }
30182983 
....@@ -3022,14 +2987,14 @@
30222987 	struct rtl_phy *rtlphy = &rtlpriv->phy;
30232988 	struct dig_t *dm_dig = &rtlpriv->dm_digtable;
30242989 
3025
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
3026
-		 "--->Cmd(%#x), set_io_inprogress(%d)\n",
3027
-		  rtlphy->current_io_type, rtlphy->set_io_inprogress);
2990
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2991
+		"--->Cmd(%#x), set_io_inprogress(%d)\n",
2992
+		rtlphy->current_io_type, rtlphy->set_io_inprogress);
30282993 	switch (rtlphy->current_io_type) {
30292994 	case IO_CMD_RESUME_DM_BY_SCAN:
30302995 		rtl92ee_dm_write_dig(hw, rtlphy->initgain_backup.xaagccore1);
30312996 		rtl92ee_dm_write_cck_cca_thres(hw, rtlphy->initgain_backup.cca);
3032
-		RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE , "no set txpower\n");
2997
+		rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, "no set txpower\n");
30332998 		rtl92ee_phy_set_txpower_level(hw, rtlphy->current_channel);
30342999 		break;
30353000 	case IO_CMD_PAUSE_BAND0_DM_BY_SCAN:
....@@ -3040,14 +3005,14 @@
30403005 		rtl92ee_dm_write_cck_cca_thres(hw, 0x40);
30413006 		break;
30423007 	default:
3043
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
3044
-			 "switch case %#x not processed\n",
3045
-			 rtlphy->current_io_type);
3008
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
3009
+			"switch case %#x not processed\n",
3010
+			rtlphy->current_io_type);
30463011 		break;
30473012 	}
30483013 	rtlphy->set_io_inprogress = false;
3049
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
3050
-		 "(%#x)\n", rtlphy->current_io_type);
3014
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
3015
+		"(%#x)\n", rtlphy->current_io_type);
30513016 }
30523017 
30533018 static void rtl92ee_phy_set_rf_on(struct ieee80211_hw *hw)
....@@ -3093,16 +3058,16 @@
30933058 
30943059 			do {
30953060 				initializecount++;
3096
-				RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
3097
-					 "IPS Set eRf nic enable\n");
3061
+				rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
3062
+					"IPS Set eRf nic enable\n");
30983063 				rtstatus = rtl_ps_enable_nic(hw);
30993064 			} while (!rtstatus && (initializecount < 10));
31003065 			RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
31013066 		} else {
3102
-			RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
3103
-				 "Set ERFON sleeping:%d ms\n",
3104
-				  jiffies_to_msecs(jiffies -
3105
-						   ppsc->last_sleep_jiffies));
3067
+			rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
3068
+				"Set ERFON sleeping:%d ms\n",
3069
+				jiffies_to_msecs(jiffies -
3070
+						 ppsc->last_sleep_jiffies));
31063071 			ppsc->last_awake_jiffies = jiffies;
31073072 			rtl92ee_phy_set_rf_on(hw);
31083073 		}
....@@ -3120,27 +3085,27 @@
31203085 				queue_id++;
31213086 				continue;
31223087 			} else {
3123
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
3124
-					 "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
3125
-					 (i + 1), queue_id,
3126
-					 skb_queue_len(&ring->queue));
3088
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
3089
+					"eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
3090
+					(i + 1), queue_id,
3091
+					skb_queue_len(&ring->queue));
31273092 
31283093 				udelay(10);
31293094 				i++;
31303095 			}
31313096 			if (i >= MAX_DOZE_WAITING_TIMES_9x) {
3132
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
3133
-					 "\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
3134
-					  MAX_DOZE_WAITING_TIMES_9x,
3135
-					  queue_id,
3136
-					  skb_queue_len(&ring->queue));
3097
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
3098
+					"\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
3099
+					MAX_DOZE_WAITING_TIMES_9x,
3100
+					queue_id,
3101
+					skb_queue_len(&ring->queue));
31373102 				break;
31383103 			}
31393104 		}
31403105 
31413106 		if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
3142
-			RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
3143
-				 "IPS Set eRf nic disable\n");
3107
+			rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
3108
+				"IPS Set eRf nic disable\n");
31443109 			rtl_ps_disable_nic(hw);
31453110 			RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
31463111 		} else {
....@@ -3163,32 +3128,32 @@
31633128 				queue_id++;
31643129 				continue;
31653130 			} else {
3166
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
3167
-					 "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
3168
-					 (i + 1), queue_id,
3169
-					 skb_queue_len(&ring->queue));
3131
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
3132
+					"eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
3133
+					(i + 1), queue_id,
3134
+					skb_queue_len(&ring->queue));
31703135 				udelay(10);
31713136 				i++;
31723137 			}
31733138 			if (i >= MAX_DOZE_WAITING_TIMES_9x) {
3174
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
3175
-					 "\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
3176
-					  MAX_DOZE_WAITING_TIMES_9x,
3177
-					  queue_id,
3178
-					  skb_queue_len(&ring->queue));
3139
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
3140
+					"\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
3141
+					MAX_DOZE_WAITING_TIMES_9x,
3142
+					queue_id,
3143
+					skb_queue_len(&ring->queue));
31793144 				break;
31803145 			}
31813146 		}
3182
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
3183
-			 "Set ERFSLEEP awaked:%d ms\n",
3184
-			  jiffies_to_msecs(jiffies -
3185
-					   ppsc->last_awake_jiffies));
3147
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
3148
+			"Set ERFSLEEP awaked:%d ms\n",
3149
+			jiffies_to_msecs(jiffies -
3150
+					 ppsc->last_awake_jiffies));
31863151 		ppsc->last_sleep_jiffies = jiffies;
31873152 		_rtl92ee_phy_set_rf_sleep(hw);
31883153 		break;
31893154 	default:
3190
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
3191
-			 "switch case %#x not processed\n", rfpwr_state);
3155
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
3156
+			"switch case %#x not processed\n", rfpwr_state);
31923157 		bresult = false;
31933158 		break;
31943159 	}