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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/net/wireless/mediatek/mt76/mt76x0/eeprom.h
....@@ -1,149 +1,41 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23  * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
34  * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
45  * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
5
- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2
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- * as published by the Free Software Foundation
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
146  */
157 
168 #ifndef __MT76X0U_EEPROM_H
179 #define __MT76X0U_EEPROM_H
1810 
19
-struct mt76x0_dev;
11
+#include "../mt76x02_eeprom.h"
2012 
21
-#define MT76X0U_EE_MAX_VER			0x0c
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-#define MT76X0_EEPROM_SIZE			512
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+struct mt76x02_dev;
2314 
24
-#define MT76X0U_DEFAULT_TX_POWER		6
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+#define MT76X0U_EE_MAX_VER		0x0c
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+#define MT76X0_EEPROM_SIZE		512
2517 
26
-enum mt76_eeprom_field {
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-	MT_EE_CHIP_ID =				0x00,
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-	MT_EE_VERSION_FAE =			0x02,
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-	MT_EE_VERSION_EE =			0x03,
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-	MT_EE_MAC_ADDR =			0x04,
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-	MT_EE_NIC_CONF_0 =			0x34,
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-	MT_EE_NIC_CONF_1 =			0x36,
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-	MT_EE_COUNTRY_REGION_5GHZ =		0x38,
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-	MT_EE_COUNTRY_REGION_2GHZ =		0x39,
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-	MT_EE_FREQ_OFFSET =			0x3a,
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-	MT_EE_NIC_CONF_2 =			0x42,
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+int mt76x0_eeprom_init(struct mt76x02_dev *dev);
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+void mt76x0_read_rx_gain(struct mt76x02_dev *dev);
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+void mt76x0_get_tx_power_per_rate(struct mt76x02_dev *dev,
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+				  struct ieee80211_channel *chan,
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+				  struct mt76_rate_power *t);
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+void mt76x0_get_power_info(struct mt76x02_dev *dev,
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+			   struct ieee80211_channel *chan, s8 *tp);
3725 
38
-	MT_EE_LNA_GAIN_2GHZ =			0x44,
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-	MT_EE_LNA_GAIN_5GHZ_0 =			0x45,
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-	MT_EE_RSSI_OFFSET =			0x46,
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-	MT_EE_RSSI_OFFSET_5GHZ =		0x4a,
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-	MT_EE_LNA_GAIN_5GHZ_1 =			0x49,
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-	MT_EE_LNA_GAIN_5GHZ_2 =			0x4d,
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-
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-	MT_EE_TX_POWER_DELTA_BW40 =		0x50,
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-
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-	MT_EE_TX_POWER_OFFSET_2GHZ =		0x52,
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-
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-	MT_EE_TX_TSSI_SLOPE =			0x6e,
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-	MT_EE_TX_TSSI_OFFSET_GROUP =		0x6f,
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-	MT_EE_TX_TSSI_OFFSET =			0x76,
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-
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-	MT_EE_TX_POWER_OFFSET_5GHZ =		0x78,
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-
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-	MT_EE_TEMP_OFFSET =			0xd1,
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-	MT_EE_FREQ_OFFSET_COMPENSATION =	0xdb,
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-	MT_EE_TX_POWER_BYRATE_BASE =		0xde,
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-
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-	MT_EE_TX_POWER_BYRATE_BASE_5GHZ =	0x120,
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-
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-	MT_EE_USAGE_MAP_START =			0x1e0,
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-	MT_EE_USAGE_MAP_END =			0x1fc,
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-};
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-
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-#define MT_EE_NIC_CONF_0_RX_PATH		GENMASK(3, 0)
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-#define MT_EE_NIC_CONF_0_TX_PATH		GENMASK(7, 4)
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-#define MT_EE_NIC_CONF_0_PA_TYPE		GENMASK(9, 8)
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-#define MT_EE_NIC_CONF_0_BOARD_TYPE		GENMASK(13, 12)
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-
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-#define MT_EE_NIC_CONF_1_HW_RF_CTRL		BIT(0)
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-#define MT_EE_NIC_CONF_1_TEMP_TX_ALC		BIT(1)
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-#define MT_EE_NIC_CONF_1_LNA_EXT_2G		BIT(2)
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-#define MT_EE_NIC_CONF_1_LNA_EXT_5G		BIT(3)
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-#define MT_EE_NIC_CONF_1_TX_ALC_EN		BIT(13)
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-
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-#define MT_EE_NIC_CONF_2_RX_STREAM		GENMASK(3, 0)
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-#define MT_EE_NIC_CONF_2_TX_STREAM		GENMASK(7, 4)
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-#define MT_EE_NIC_CONF_2_HW_ANTDIV		BIT(8)
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-#define MT_EE_NIC_CONF_2_XTAL_OPTION		GENMASK(10, 9)
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-#define MT_EE_NIC_CONF_2_TEMP_DISABLE		BIT(11)
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-#define MT_EE_NIC_CONF_2_COEX_METHOD		GENMASK(15, 13)
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-
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-#define MT_EE_TX_POWER_BYRATE(i)		(MT_EE_TX_POWER_BYRATE_BASE + \
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-						 (i) * 4)
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-
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-#define MT_EFUSE_USAGE_MAP_SIZE			(MT_EE_USAGE_MAP_END -	\
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-						 MT_EE_USAGE_MAP_START + 1)
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-
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-enum mt76x0_eeprom_access_modes {
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-	MT_EE_READ = 0,
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-	MT_EE_PHYSICAL_READ = 1,
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-};
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-
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-struct reg_channel_bounds {
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-	u8 start;
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-	u8 num;
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-};
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-
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-struct mt76x0_eeprom_params {
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-	u8 rf_freq_off;
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-	s16 temp_off;
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-	s8 rssi_offset_2ghz[2];
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-	s8 rssi_offset_5ghz[3];
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-	s8 lna_gain_2ghz;
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-	s8 lna_gain_5ghz[3];
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-	u8 pa_type;
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-
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-	/* TX_PWR_CFG_* values from EEPROM for 20 and 40 Mhz bandwidths. */
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-	u32 tx_pwr_cfg_2g[5][2];
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-	u32 tx_pwr_cfg_5g[5][2];
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-
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-	u8 tx_pwr_per_chan[58];
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-
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-	struct reg_channel_bounds reg;
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-
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-	bool has_2ghz;
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-	bool has_5ghz;
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-};
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-
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-int mt76x0_eeprom_init(struct mt76x0_dev *dev);
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-
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-static inline u32 s6_validate(u32 reg)
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+static inline s8 s6_to_s8(u32 val)
12327 {
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-	WARN_ON(reg & ~GENMASK(5, 0));
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-	return reg & GENMASK(5, 0);
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+	s8 ret = val & GENMASK(5, 0);
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+
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+	if (ret & BIT(5))
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+		ret -= BIT(6);
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+	return ret;
12633 }
12734 
128
-static inline int s6_to_int(u32 reg)
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+static inline bool mt76x0_tssi_enabled(struct mt76x02_dev *dev)
12936 {
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-	int s6;
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-
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-	s6 = s6_validate(reg);
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-	if (s6 & BIT(5))
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-		s6 -= BIT(6);
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-
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-	return s6;
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-}
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-
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-static inline u32 int_to_s6(int val)
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-{
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-	if (val < -0x20)
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-		return 0x20;
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-	if (val > 0x1f)
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-		return 0x1f;
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-
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-	return val & 0x3f;
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+	return (mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1) &
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+		MT_EE_NIC_CONF_1_TX_ALC_EN);
14739 }
14840 
14941 #endif