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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/net/wireless/mediatek/mt76/mt76.h
....@@ -1,17 +1,6 @@
1
+/* SPDX-License-Identifier: ISC */
12 /*
23  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3
- *
4
- * Permission to use, copy, modify, and/or distribute this software for any
5
- * purpose with or without fee is hereby granted, provided that the above
6
- * copyright notice and this permission notice appear in all copies.
7
- *
8
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
154  */
165 
176 #ifndef __MT76_H
....@@ -23,23 +12,51 @@
2312 #include <linux/skbuff.h>
2413 #include <linux/leds.h>
2514 #include <linux/usb.h>
15
+#include <linux/average.h>
2616 #include <net/mac80211.h>
2717 #include "util.h"
18
+#include "testmode.h"
2819 
29
-#define MT_TX_RING_SIZE     256
3020 #define MT_MCU_RING_SIZE    32
3121 #define MT_RX_BUF_SIZE      2048
22
+#define MT_SKB_HEAD_LEN     128
23
+
24
+#define MT_MAX_NON_AQL_PKT  16
25
+#define MT_TXQ_FREE_THR     32
3226 
3327 struct mt76_dev;
28
+struct mt76_phy;
3429 struct mt76_wcid;
30
+
31
+struct mt76_reg_pair {
32
+	u32 reg;
33
+	u32 value;
34
+};
35
+
36
+enum mt76_bus_type {
37
+	MT76_BUS_MMIO,
38
+	MT76_BUS_USB,
39
+	MT76_BUS_SDIO,
40
+};
3541 
3642 struct mt76_bus_ops {
3743 	u32 (*rr)(struct mt76_dev *dev, u32 offset);
3844 	void (*wr)(struct mt76_dev *dev, u32 offset, u32 val);
3945 	u32 (*rmw)(struct mt76_dev *dev, u32 offset, u32 mask, u32 val);
40
-	void (*copy)(struct mt76_dev *dev, u32 offset, const void *data,
41
-		     int len);
46
+	void (*write_copy)(struct mt76_dev *dev, u32 offset, const void *data,
47
+			   int len);
48
+	void (*read_copy)(struct mt76_dev *dev, u32 offset, void *data,
49
+			  int len);
50
+	int (*wr_rp)(struct mt76_dev *dev, u32 base,
51
+		     const struct mt76_reg_pair *rp, int len);
52
+	int (*rd_rp)(struct mt76_dev *dev, u32 base,
53
+		     struct mt76_reg_pair *rp, int len);
54
+	enum mt76_bus_type type;
4255 };
56
+
57
+#define mt76_is_usb(dev) ((dev)->bus->type == MT76_BUS_USB)
58
+#define mt76_is_mmio(dev) ((dev)->bus->type == MT76_BUS_MMIO)
59
+#define mt76_is_sdio(dev) ((dev)->bus->type == MT76_BUS_SDIO)
4360 
4461 enum mt76_txq_id {
4562 	MT_TXQ_VO = IEEE80211_AC_VO,
....@@ -48,27 +65,31 @@
4865 	MT_TXQ_BK = IEEE80211_AC_BK,
4966 	MT_TXQ_PSD,
5067 	MT_TXQ_MCU,
68
+	MT_TXQ_MCU_WA,
5169 	MT_TXQ_BEACON,
5270 	MT_TXQ_CAB,
71
+	MT_TXQ_FWDL,
5372 	__MT_TXQ_MAX
5473 };
5574 
5675 enum mt76_rxq_id {
5776 	MT_RXQ_MAIN,
5877 	MT_RXQ_MCU,
78
+	MT_RXQ_MCU_WA,
5979 	__MT_RXQ_MAX
6080 };
6181 
6282 struct mt76_queue_buf {
6383 	dma_addr_t addr;
64
-	int len;
84
+	u16 len;
85
+	bool skip_unmap;
6586 };
6687 
67
-struct mt76u_buf {
68
-	struct mt76_dev *dev;
69
-	struct urb *urb;
70
-	size_t len;
71
-	bool done;
88
+struct mt76_tx_info {
89
+	struct mt76_queue_buf buf[32];
90
+	struct sk_buff *skb;
91
+	int nbuf;
92
+	u32 info;
7293 };
7394 
7495 struct mt76_queue_entry {
....@@ -78,9 +99,15 @@
7899 	};
79100 	union {
80101 		struct mt76_txwi_cache *txwi;
81
-		struct mt76u_buf ubuf;
102
+		struct urb *urb;
103
+		int buf_sz;
82104 	};
83
-	bool schedule;
105
+	u32 dma_addr[2];
106
+	u16 dma_len[2];
107
+	u16 wcid;
108
+	bool skip_buf0:1;
109
+	bool skip_buf1:1;
110
+	bool done:1;
84111 };
85112 
86113 struct mt76_queue_regs {
....@@ -97,35 +124,52 @@
97124 	struct mt76_queue_entry *entry;
98125 	struct mt76_desc *desc;
99126 
100
-	struct list_head swq;
101
-	int swq_queued;
102
-
103127 	u16 first;
104128 	u16 head;
105129 	u16 tail;
106130 	int ndesc;
107131 	int queued;
108132 	int buf_size;
133
+	bool stopped;
109134 
110135 	u8 buf_offset;
111136 	u8 hw_idx;
112137 
113138 	dma_addr_t desc_dma;
114139 	struct sk_buff *rx_head;
140
+	struct page_frag_cache rx_page;
141
+};
142
+
143
+struct mt76_mcu_ops {
144
+	u32 headroom;
145
+	u32 tailroom;
146
+
147
+	int (*mcu_send_msg)(struct mt76_dev *dev, int cmd, const void *data,
148
+			    int len, bool wait_resp);
149
+	int (*mcu_skb_send_msg)(struct mt76_dev *dev, struct sk_buff *skb,
150
+				int cmd, bool wait_resp);
151
+	u32 (*mcu_rr)(struct mt76_dev *dev, u32 offset);
152
+	void (*mcu_wr)(struct mt76_dev *dev, u32 offset, u32 val);
153
+	int (*mcu_wr_rp)(struct mt76_dev *dev, u32 base,
154
+			 const struct mt76_reg_pair *rp, int len);
155
+	int (*mcu_rd_rp)(struct mt76_dev *dev, u32 base,
156
+			 struct mt76_reg_pair *rp, int len);
157
+	int (*mcu_restart)(struct mt76_dev *dev);
115158 };
116159 
117160 struct mt76_queue_ops {
118161 	int (*init)(struct mt76_dev *dev);
119162 
120
-	int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q);
163
+	int (*alloc)(struct mt76_dev *dev, struct mt76_queue *q,
164
+		     int idx, int n_desc, int bufsize,
165
+		     u32 ring_base);
121166 
122
-	int (*add_buf)(struct mt76_dev *dev, struct mt76_queue *q,
123
-		       struct mt76_queue_buf *buf, int nbufs, u32 info,
124
-		       struct sk_buff *skb, void *txwi);
125
-
126
-	int (*tx_queue_skb)(struct mt76_dev *dev, struct mt76_queue *q,
167
+	int (*tx_queue_skb)(struct mt76_dev *dev, enum mt76_txq_id qid,
127168 			    struct sk_buff *skb, struct mt76_wcid *wcid,
128169 			    struct ieee80211_sta *sta);
170
+
171
+	int (*tx_queue_skb_raw)(struct mt76_dev *dev, enum mt76_txq_id qid,
172
+				struct sk_buff *skb, u32 tx_info);
129173 
130174 	void *(*dequeue)(struct mt76_dev *dev, struct mt76_queue *q, bool flush,
131175 			 int *len, u32 *info, bool *more);
....@@ -143,34 +187,46 @@
143187 	MT_WCID_FLAG_PS,
144188 };
145189 
190
+#define MT76_N_WCIDS 288
191
+
192
+/* stored in ieee80211_tx_info::hw_queue */
193
+#define MT_TX_HW_QUEUE_EXT_PHY		BIT(3)
194
+
195
+DECLARE_EWMA(signal, 10, 8);
196
+
197
+#define MT_WCID_TX_INFO_RATE		GENMASK(15, 0)
198
+#define MT_WCID_TX_INFO_NSS		GENMASK(17, 16)
199
+#define MT_WCID_TX_INFO_TXPWR_ADJ	GENMASK(25, 18)
200
+#define MT_WCID_TX_INFO_SET		BIT(31)
201
+
146202 struct mt76_wcid {
147203 	struct mt76_rx_tid __rcu *aggr[IEEE80211_NUM_TIDS];
148204 
149
-	struct work_struct aggr_work;
150
-
205
+	atomic_t non_aql_packets;
151206 	unsigned long flags;
152207 
153
-	u8 idx;
208
+	struct ewma_signal rssi;
209
+	int inactive_count;
210
+
211
+	u16 idx;
154212 	u8 hw_key_idx;
155213 
156214 	u8 sta:1;
215
+	u8 ext_phy:1;
216
+	u8 amsdu:1;
157217 
158218 	u8 rx_check_pn;
159219 	u8 rx_key_pn[IEEE80211_NUM_TIDS][6];
220
+	u16 cipher;
160221 
161
-	__le16 tx_rate;
162
-	bool tx_rate_set;
163
-	u8 tx_rate_nss;
164
-	s8 max_txpwr_adj;
222
+	u32 tx_info;
165223 	bool sw_iv;
224
+
225
+	u8 packet_id;
166226 };
167227 
168228 struct mt76_txq {
169
-	struct list_head list;
170
-	struct mt76_queue *hwq;
171229 	struct mt76_wcid *wcid;
172
-
173
-	struct sk_buff_head retry_q;
174230 
175231 	u16 agg_ssn;
176232 	bool send_bar;
....@@ -178,11 +234,11 @@
178234 };
179235 
180236 struct mt76_txwi_cache {
181
-	u32 txwi[8];
182
-	dma_addr_t dma_addr;
183237 	struct list_head list;
184
-};
238
+	dma_addr_t dma_addr;
185239 
240
+	struct sk_buff *skb;
241
+};
186242 
187243 struct mt76_rx_tid {
188244 	struct rcu_head rcu_head;
....@@ -196,9 +252,30 @@
196252 	u16 size;
197253 	u16 nframes;
198254 
255
+	u8 num;
256
+
199257 	u8 started:1, stopped:1, timer_pending:1;
200258 
201259 	struct sk_buff *reorder_buf[];
260
+};
261
+
262
+#define MT_TX_CB_DMA_DONE		BIT(0)
263
+#define MT_TX_CB_TXS_DONE		BIT(1)
264
+#define MT_TX_CB_TXS_FAILED		BIT(2)
265
+
266
+#define MT_PACKET_ID_MASK		GENMASK(6, 0)
267
+#define MT_PACKET_ID_NO_ACK		0
268
+#define MT_PACKET_ID_NO_SKB		1
269
+#define MT_PACKET_ID_FIRST		2
270
+#define MT_PACKET_ID_HAS_RATE		BIT(7)
271
+
272
+#define MT_TX_STATUS_SKB_TIMEOUT	HZ
273
+
274
+struct mt76_tx_cb {
275
+	unsigned long jiffies;
276
+	u16 wcid;
277
+	u8 pktid;
278
+	u8 flags;
202279 };
203280 
204281 enum {
....@@ -206,11 +283,17 @@
206283 	MT76_STATE_RUNNING,
207284 	MT76_STATE_MCU_RUNNING,
208285 	MT76_SCANNING,
286
+	MT76_HW_SCANNING,
287
+	MT76_HW_SCHED_SCANNING,
288
+	MT76_RESTART,
209289 	MT76_RESET,
210
-	MT76_OFFCHANNEL,
290
+	MT76_MCU_RESET,
211291 	MT76_REMOVED,
212292 	MT76_READING_STATS,
213
-	MT76_MORE_STATS,
293
+	MT76_STATE_POWER_OFF,
294
+	MT76_STATE_SUSPEND,
295
+	MT76_STATE_ROC,
296
+	MT76_STATE_PM,
214297 };
215298 
216299 struct mt76_hw_cap {
....@@ -218,18 +301,27 @@
218301 	bool has_5ghz;
219302 };
220303 
304
+#define MT_DRV_TXWI_NO_FREE		BIT(0)
305
+#define MT_DRV_TX_ALIGNED4_SKBS		BIT(1)
306
+#define MT_DRV_SW_RX_AIRTIME		BIT(2)
307
+#define MT_DRV_RX_DMA_HDR		BIT(3)
308
+#define MT_DRV_HW_MGMT_TXQ		BIT(4)
309
+#define MT_DRV_AMSDU_OFFLOAD		BIT(5)
310
+
221311 struct mt76_driver_ops {
312
+	u32 drv_flags;
313
+	u32 survey_flags;
222314 	u16 txwi_size;
223315 
224316 	void (*update_survey)(struct mt76_dev *dev);
225317 
226318 	int (*tx_prepare_skb)(struct mt76_dev *dev, void *txwi_ptr,
227
-			      struct sk_buff *skb, struct mt76_queue *q,
228
-			      struct mt76_wcid *wcid,
229
-			      struct ieee80211_sta *sta, u32 *tx_info);
319
+			      enum mt76_txq_id qid, struct mt76_wcid *wcid,
320
+			      struct ieee80211_sta *sta,
321
+			      struct mt76_tx_info *tx_info);
230322 
231
-	void (*tx_complete_skb)(struct mt76_dev *dev, struct mt76_queue *q,
232
-				struct mt76_queue_entry *e, bool flush);
323
+	void (*tx_complete_skb)(struct mt76_dev *dev,
324
+				struct mt76_queue_entry *e);
233325 
234326 	bool (*tx_status_data)(struct mt76_dev *dev, u8 *update);
235327 
....@@ -240,16 +332,43 @@
240332 
241333 	void (*sta_ps)(struct mt76_dev *dev, struct ieee80211_sta *sta,
242334 		       bool ps);
335
+
336
+	int (*sta_add)(struct mt76_dev *dev, struct ieee80211_vif *vif,
337
+		       struct ieee80211_sta *sta);
338
+
339
+	void (*sta_assoc)(struct mt76_dev *dev, struct ieee80211_vif *vif,
340
+			  struct ieee80211_sta *sta);
341
+
342
+	void (*sta_remove)(struct mt76_dev *dev, struct ieee80211_vif *vif,
343
+			   struct ieee80211_sta *sta);
243344 };
244345 
245346 struct mt76_channel_state {
246347 	u64 cc_active;
247348 	u64 cc_busy;
349
+	u64 cc_rx;
350
+	u64 cc_bss_rx;
351
+	u64 cc_tx;
352
+
353
+	s8 noise;
248354 };
249355 
250356 struct mt76_sband {
251357 	struct ieee80211_supported_band sband;
252358 	struct mt76_channel_state *chan;
359
+};
360
+
361
+struct mt76_rate_power {
362
+	union {
363
+		struct {
364
+			s8 cck[4];
365
+			s8 ofdm[8];
366
+			s8 stbc[10];
367
+			s8 ht[16];
368
+			s8 vht[10];
369
+		};
370
+		s8 all[48];
371
+	};
253372 };
254373 
255374 /* addr req mask */
....@@ -261,12 +380,16 @@
261380 enum mt_vendor_req {
262381 	MT_VEND_DEV_MODE =	0x1,
263382 	MT_VEND_WRITE =		0x2,
383
+	MT_VEND_POWER_ON =	0x4,
264384 	MT_VEND_MULTI_WRITE =	0x6,
265385 	MT_VEND_MULTI_READ =	0x7,
266386 	MT_VEND_READ_EEPROM =	0x9,
267387 	MT_VEND_WRITE_FCE =	0x42,
268388 	MT_VEND_WRITE_CFG =	0x46,
269389 	MT_VEND_READ_CFG =	0x47,
390
+	MT_VEND_READ_EXT =	0x63,
391
+	MT_VEND_WRITE_EXT =	0x66,
392
+	MT_VEND_FEATURE_SET =	0x91,
270393 };
271394 
272395 enum mt76u_in_ep {
....@@ -277,50 +400,200 @@
277400 
278401 enum mt76u_out_ep {
279402 	MT_EP_OUT_INBAND_CMD,
280
-	MT_EP_OUT_AC_BK,
281403 	MT_EP_OUT_AC_BE,
404
+	MT_EP_OUT_AC_BK,
282405 	MT_EP_OUT_AC_VI,
283406 	MT_EP_OUT_AC_VO,
284407 	MT_EP_OUT_HCCA,
285408 	__MT_EP_OUT_MAX,
286409 };
287410 
288
-#define MT_SG_MAX_SIZE		8
411
+struct mt76_mcu {
412
+	struct mutex mutex;
413
+	u32 msg_seq;
414
+
415
+	struct sk_buff_head res_q;
416
+	wait_queue_head_t wait;
417
+};
418
+
419
+#define MT_TX_SG_MAX_SIZE	8
420
+#define MT_RX_SG_MAX_SIZE	4
289421 #define MT_NUM_TX_ENTRIES	256
290422 #define MT_NUM_RX_ENTRIES	128
291423 #define MCU_RESP_URB_SIZE	1024
292424 struct mt76_usb {
293425 	struct mutex usb_ctrl_mtx;
294
-	u8 data[32];
426
+	u8 *data;
427
+	u16 data_len;
295428 
296429 	struct tasklet_struct rx_tasklet;
297
-	struct tasklet_struct tx_tasklet;
298
-	struct delayed_work stat_work;
430
+	struct work_struct stat_work;
299431 
300432 	u8 out_ep[__MT_EP_OUT_MAX];
301
-	u16 out_max_packet;
302433 	u8 in_ep[__MT_EP_IN_MAX];
303
-	u16 in_max_packet;
434
+	bool sg_en;
304435 
305436 	struct mt76u_mcu {
306
-		struct mutex mutex;
307
-		struct completion cmpl;
308
-		struct mt76u_buf res;
309
-		u32 msg_seq;
437
+		u8 *data;
438
+		/* multiple reads */
439
+		struct mt76_reg_pair *rp;
440
+		int rp_len;
441
+		u32 base;
442
+		bool burst;
310443 	} mcu;
311444 };
312445 
313
-struct mt76_dev {
446
+#define MT76S_XMIT_BUF_SZ	(16 * PAGE_SIZE)
447
+struct mt76_sdio {
448
+	struct workqueue_struct *txrx_wq;
449
+	struct {
450
+		struct work_struct xmit_work;
451
+		struct work_struct status_work;
452
+	} tx;
453
+	struct {
454
+		struct work_struct recv_work;
455
+		struct work_struct net_work;
456
+	} rx;
457
+
458
+	struct work_struct stat_work;
459
+
460
+	u8 *xmit_buf[MT_TXQ_MCU_WA];
461
+
462
+	struct sdio_func *func;
463
+	void *intr_data;
464
+
465
+	struct {
466
+		struct mutex lock;
467
+		int pse_data_quota;
468
+		int ple_data_quota;
469
+		int pse_mcu_quota;
470
+		int deficit;
471
+	} sched;
472
+};
473
+
474
+struct mt76_mmio {
475
+	void __iomem *regs;
476
+	spinlock_t irq_lock;
477
+	u32 irqmask;
478
+};
479
+
480
+struct mt76_rx_status {
481
+	union {
482
+		struct mt76_wcid *wcid;
483
+		u16 wcid_idx;
484
+	};
485
+
486
+	unsigned long reorder_time;
487
+
488
+	u32 ampdu_ref;
489
+
490
+	u8 iv[6];
491
+
492
+	u8 ext_phy:1;
493
+	u8 aggr:1;
494
+	u8 tid;
495
+	u16 seqno;
496
+
497
+	u16 freq;
498
+	u32 flag;
499
+	u8 enc_flags;
500
+	u8 encoding:2, bw:3, he_ru:3;
501
+	u8 he_gi:2, he_dcm:1;
502
+	u8 rate_idx;
503
+	u8 nss;
504
+	u8 band;
505
+	s8 signal;
506
+	u8 chains;
507
+	s8 chain_signal[IEEE80211_MAX_CHAINS];
508
+};
509
+
510
+struct mt76_testmode_ops {
511
+	int (*set_state)(struct mt76_dev *dev, enum mt76_testmode_state state);
512
+	int (*set_params)(struct mt76_dev *dev, struct nlattr **tb,
513
+			  enum mt76_testmode_state new_state);
514
+	int (*dump_stats)(struct mt76_dev *dev, struct sk_buff *msg);
515
+};
516
+
517
+struct mt76_testmode_data {
518
+	enum mt76_testmode_state state;
519
+
520
+	u32 param_set[DIV_ROUND_UP(NUM_MT76_TM_ATTRS, 32)];
521
+	struct sk_buff *tx_skb;
522
+
523
+	u32 tx_count;
524
+	u16 tx_msdu_len;
525
+
526
+	u8 tx_rate_mode;
527
+	u8 tx_rate_idx;
528
+	u8 tx_rate_nss;
529
+	u8 tx_rate_sgi;
530
+	u8 tx_rate_ldpc;
531
+
532
+	u8 tx_antenna_mask;
533
+
534
+	u32 freq_offset;
535
+
536
+	u8 tx_power[4];
537
+	u8 tx_power_control;
538
+
539
+	const char *mtd_name;
540
+	u32 mtd_offset;
541
+
542
+	u32 tx_pending;
543
+	u32 tx_queued;
544
+	u32 tx_done;
545
+	struct {
546
+		u64 packets[__MT_RXQ_MAX];
547
+		u64 fcs_error[__MT_RXQ_MAX];
548
+	} rx_stats;
549
+};
550
+
551
+struct mt76_phy {
314552 	struct ieee80211_hw *hw;
553
+	struct mt76_dev *dev;
554
+	void *priv;
555
+
556
+	unsigned long state;
557
+
315558 	struct cfg80211_chan_def chandef;
316559 	struct ieee80211_channel *main_chan;
317560 
561
+	struct mt76_channel_state *chan_state;
562
+	ktime_t survey_time;
563
+
564
+	struct mt76_sband sband_2g;
565
+	struct mt76_sband sband_5g;
566
+
567
+	u32 vif_mask;
568
+
569
+	int txpower_cur;
570
+	u8 antenna_mask;
571
+};
572
+
573
+struct mt76_dev {
574
+	struct mt76_phy phy; /* must be first */
575
+
576
+	struct mt76_phy *phy2;
577
+
578
+	struct ieee80211_hw *hw;
579
+
318580 	spinlock_t lock;
319581 	spinlock_t cc_lock;
582
+
583
+	u32 cur_cc_bss_rx;
584
+
585
+	struct mt76_rx_status rx_ampdu_status;
586
+	u32 rx_ampdu_len;
587
+	u32 rx_ampdu_ref;
588
+
589
+	struct mutex mutex;
590
+
320591 	const struct mt76_bus_ops *bus;
321592 	const struct mt76_driver_ops *drv;
322
-	void __iomem *regs;
593
+	const struct mt76_mcu_ops *mcu_ops;
323594 	struct device *dev;
595
+
596
+	struct mt76_mcu mcu;
324597 
325598 	struct net_device napi_dev;
326599 	spinlock_t rx_lock;
....@@ -328,23 +601,40 @@
328601 	struct sk_buff_head rx_skb[__MT_RXQ_MAX];
329602 
330603 	struct list_head txwi_cache;
331
-	struct mt76_queue q_tx[__MT_TXQ_MAX];
604
+	struct mt76_queue *q_tx[2 * __MT_TXQ_MAX];
332605 	struct mt76_queue q_rx[__MT_RXQ_MAX];
333606 	const struct mt76_queue_ops *queue_ops;
607
+	int tx_dma_idx[4];
608
+
609
+	struct mt76_worker tx_worker;
610
+	struct napi_struct tx_napi;
611
+	struct delayed_work mac_work;
334612 
335613 	wait_queue_head_t tx_wait;
614
+	struct sk_buff_head status_list;
615
+
616
+	u32 wcid_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
617
+	u32 wcid_phy_mask[DIV_ROUND_UP(MT76_N_WCIDS, 32)];
618
+
619
+	struct mt76_wcid global_wcid;
620
+	struct mt76_wcid __rcu *wcid[MT76_N_WCIDS];
336621 
337622 	u8 macaddr[ETH_ALEN];
338623 	u32 rev;
339
-	unsigned long state;
340624 
341
-	u8 antenna_mask;
625
+	u32 aggr_stats[32];
342626 
343
-	struct mt76_sband sband_2g;
344
-	struct mt76_sband sband_5g;
627
+	struct tasklet_struct pre_tbtt_tasklet;
628
+	int beacon_int;
629
+	u8 beacon_mask;
630
+
345631 	struct debugfs_blob_wrapper eeprom;
346632 	struct debugfs_blob_wrapper otp;
347633 	struct mt76_hw_cap cap;
634
+
635
+	struct mt76_rate_power rate_power;
636
+
637
+	enum nl80211_dfs_regions region;
348638 
349639 	u32 debugfs_reg;
350640 
....@@ -353,7 +643,22 @@
353643 	bool led_al;
354644 	u8 led_pin;
355645 
356
-	struct mt76_usb usb;
646
+	u8 csa_complete;
647
+
648
+	u32 rxfilter;
649
+
650
+#ifdef CONFIG_NL80211_TESTMODE
651
+	const struct mt76_testmode_ops *test_ops;
652
+	struct mt76_testmode_data test;
653
+#endif
654
+
655
+	struct workqueue_struct *wq;
656
+
657
+	union {
658
+		struct mt76_mmio mmio;
659
+		struct mt76_usb usb;
660
+		struct mt76_sdio sdio;
661
+	};
357662 };
358663 
359664 enum mt76_phy_type {
....@@ -362,47 +667,35 @@
362667 	MT_PHY_TYPE_HT,
363668 	MT_PHY_TYPE_HT_GF,
364669 	MT_PHY_TYPE_VHT,
670
+	MT_PHY_TYPE_HE_SU = 8,
671
+	MT_PHY_TYPE_HE_EXT_SU,
672
+	MT_PHY_TYPE_HE_TB,
673
+	MT_PHY_TYPE_HE_MU,
365674 };
366675 
367
-struct mt76_rate_power {
368
-	union {
369
-		struct {
370
-			s8 cck[4];
371
-			s8 ofdm[8];
372
-			s8 ht[16];
373
-			s8 vht[10];
374
-		};
375
-		s8 all[38];
376
-	};
377
-};
676
+#define __mt76_rr(dev, ...)	(dev)->bus->rr((dev), __VA_ARGS__)
677
+#define __mt76_wr(dev, ...)	(dev)->bus->wr((dev), __VA_ARGS__)
678
+#define __mt76_rmw(dev, ...)	(dev)->bus->rmw((dev), __VA_ARGS__)
679
+#define __mt76_wr_copy(dev, ...)	(dev)->bus->write_copy((dev), __VA_ARGS__)
680
+#define __mt76_rr_copy(dev, ...)	(dev)->bus->read_copy((dev), __VA_ARGS__)
378681 
379
-struct mt76_rx_status {
380
-	struct mt76_wcid *wcid;
381
-
382
-	unsigned long reorder_time;
383
-
384
-	u8 iv[6];
385
-
386
-	u8 aggr:1;
387
-	u8 tid;
388
-	u16 seqno;
389
-
390
-	u16 freq;
391
-	u32 flag;
392
-	u8 enc_flags;
393
-	u8 encoding:2, bw:3;
394
-	u8 rate_idx;
395
-	u8 nss;
396
-	u8 band;
397
-	u8 signal;
398
-	u8 chains;
399
-	s8 chain_signal[IEEE80211_MAX_CHAINS];
400
-};
682
+#define __mt76_set(dev, offset, val)	__mt76_rmw(dev, offset, 0, val)
683
+#define __mt76_clear(dev, offset, val)	__mt76_rmw(dev, offset, val, 0)
401684 
402685 #define mt76_rr(dev, ...)	(dev)->mt76.bus->rr(&((dev)->mt76), __VA_ARGS__)
403686 #define mt76_wr(dev, ...)	(dev)->mt76.bus->wr(&((dev)->mt76), __VA_ARGS__)
404687 #define mt76_rmw(dev, ...)	(dev)->mt76.bus->rmw(&((dev)->mt76), __VA_ARGS__)
405
-#define mt76_wr_copy(dev, ...)	(dev)->mt76.bus->copy(&((dev)->mt76), __VA_ARGS__)
688
+#define mt76_wr_copy(dev, ...)	(dev)->mt76.bus->write_copy(&((dev)->mt76), __VA_ARGS__)
689
+#define mt76_rr_copy(dev, ...)	(dev)->mt76.bus->read_copy(&((dev)->mt76), __VA_ARGS__)
690
+#define mt76_wr_rp(dev, ...)	(dev)->mt76.bus->wr_rp(&((dev)->mt76), __VA_ARGS__)
691
+#define mt76_rd_rp(dev, ...)	(dev)->mt76.bus->rd_rp(&((dev)->mt76), __VA_ARGS__)
692
+
693
+#define mt76_mcu_send_msg(dev, ...)	(dev)->mt76.mcu_ops->mcu_send_msg(&((dev)->mt76), __VA_ARGS__)
694
+
695
+#define __mt76_mcu_send_msg(dev, ...)	(dev)->mcu_ops->mcu_send_msg((dev), __VA_ARGS__)
696
+#define __mt76_mcu_skb_send_msg(dev, ...)	(dev)->mcu_ops->mcu_skb_send_msg((dev), __VA_ARGS__)
697
+#define mt76_mcu_restart(dev, ...)	(dev)->mt76.mcu_ops->mcu_restart(&((dev)->mt76))
698
+#define __mt76_mcu_restart(dev, ...)	(dev)->mcu_ops->mcu_restart((dev))
406699 
407700 #define mt76_set(dev, offset, val)	mt76_rmw(dev, offset, 0, val)
408701 #define mt76_clear(dev, offset, val)	mt76_rmw(dev, offset, val, 0)
....@@ -413,7 +706,20 @@
413706 #define mt76_rmw_field(_dev, _reg, _field, _val)	\
414707 	mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
415708 
416
-#define mt76_hw(dev) (dev)->mt76.hw
709
+#define __mt76_rmw_field(_dev, _reg, _field, _val)	\
710
+	__mt76_rmw(_dev, _reg, _field, FIELD_PREP(_field, _val))
711
+
712
+#define mt76_hw(dev) (dev)->mphy.hw
713
+
714
+static inline struct ieee80211_hw *
715
+mt76_wcid_hw(struct mt76_dev *dev, u16 wcid)
716
+{
717
+	if (wcid <= MT76_N_WCIDS &&
718
+	    mt76_wcid_mask_test(dev->wcid_phy_mask, wcid))
719
+		return dev->phy2->hw;
720
+
721
+	return dev->phy.hw;
722
+}
417723 
418724 bool __mt76_poll(struct mt76_dev *dev, u32 offset, u32 mask, u32 val,
419725 		 int timeout);
....@@ -426,6 +732,7 @@
426732 #define mt76_poll_msec(dev, ...) __mt76_poll_msec(&((dev)->mt76), __VA_ARGS__)
427733 
428734 void mt76_mmio_init(struct mt76_dev *dev, void __iomem *regs);
735
+void mt76_pci_disable_aspm(struct pci_dev *pdev);
429736 
430737 static inline u16 mt76_chip(struct mt76_dev *dev)
431738 {
....@@ -442,36 +749,56 @@
442749 
443750 #define mt76_init_queues(dev)		(dev)->mt76.queue_ops->init(&((dev)->mt76))
444751 #define mt76_queue_alloc(dev, ...)	(dev)->mt76.queue_ops->alloc(&((dev)->mt76), __VA_ARGS__)
445
-#define mt76_queue_add_buf(dev, ...)	(dev)->mt76.queue_ops->add_buf(&((dev)->mt76), __VA_ARGS__)
752
+#define mt76_tx_queue_skb_raw(dev, ...)	(dev)->mt76.queue_ops->tx_queue_skb_raw(&((dev)->mt76), __VA_ARGS__)
753
+#define mt76_tx_queue_skb(dev, ...)	(dev)->mt76.queue_ops->tx_queue_skb(&((dev)->mt76), __VA_ARGS__)
446754 #define mt76_queue_rx_reset(dev, ...)	(dev)->mt76.queue_ops->rx_reset(&((dev)->mt76), __VA_ARGS__)
447755 #define mt76_queue_tx_cleanup(dev, ...)	(dev)->mt76.queue_ops->tx_cleanup(&((dev)->mt76), __VA_ARGS__)
448756 #define mt76_queue_kick(dev, ...)	(dev)->mt76.queue_ops->kick(&((dev)->mt76), __VA_ARGS__)
449757 
450
-static inline struct mt76_channel_state *
451
-mt76_channel_state(struct mt76_dev *dev, struct ieee80211_channel *c)
452
-{
453
-	struct mt76_sband *msband;
454
-	int idx;
758
+#define mt76_for_each_q_rx(dev, i)	\
759
+	for (i = 0; i < ARRAY_SIZE((dev)->q_rx) && \
760
+		    (dev)->q_rx[i].ndesc; i++)
455761 
456
-	if (c->band == NL80211_BAND_2GHZ)
457
-		msband = &dev->sband_2g;
458
-	else
459
-		msband = &dev->sband_5g;
460
-
461
-	idx = c - &msband->sband.channels[0];
462
-	return &msband->chan[idx];
463
-}
464
-
465
-struct mt76_dev *mt76_alloc_device(unsigned int size,
466
-				   const struct ieee80211_ops *ops);
762
+struct mt76_dev *mt76_alloc_device(struct device *pdev, unsigned int size,
763
+				   const struct ieee80211_ops *ops,
764
+				   const struct mt76_driver_ops *drv_ops);
467765 int mt76_register_device(struct mt76_dev *dev, bool vht,
468766 			 struct ieee80211_rate *rates, int n_rates);
469767 void mt76_unregister_device(struct mt76_dev *dev);
768
+void mt76_free_device(struct mt76_dev *dev);
769
+void mt76_unregister_phy(struct mt76_phy *phy);
770
+
771
+struct mt76_phy *mt76_alloc_phy(struct mt76_dev *dev, unsigned int size,
772
+				const struct ieee80211_ops *ops);
773
+int mt76_register_phy(struct mt76_phy *phy);
470774 
471775 struct dentry *mt76_register_debugfs(struct mt76_dev *dev);
776
+int mt76_queues_read(struct seq_file *s, void *data);
777
+void mt76_seq_puts_array(struct seq_file *file, const char *str,
778
+			 s8 *val, int len);
472779 
473780 int mt76_eeprom_init(struct mt76_dev *dev, int len);
474781 void mt76_eeprom_override(struct mt76_dev *dev);
782
+
783
+static inline struct mt76_phy *
784
+mt76_dev_phy(struct mt76_dev *dev, bool phy_ext)
785
+{
786
+	if (phy_ext && dev->phy2)
787
+		return dev->phy2;
788
+	return &dev->phy;
789
+}
790
+
791
+static inline struct ieee80211_hw *
792
+mt76_phy_hw(struct mt76_dev *dev, bool phy_ext)
793
+{
794
+	return mt76_dev_phy(dev, phy_ext)->hw;
795
+}
796
+
797
+static inline u8 *
798
+mt76_get_txwi_ptr(struct mt76_dev *dev, struct mt76_txwi_cache *t)
799
+{
800
+	return (u8 *)t - dev->drv->txwi_size;
801
+}
475802 
476803 /* increment with wrap-around */
477804 static inline int mt76_incr(int val, int size)
....@@ -485,13 +812,7 @@
485812 	return (val - 1) & (size - 1);
486813 }
487814 
488
-/* Hardware uses mirrored order of queues with Q3
489
- * having the highest priority
490
- */
491
-static inline u8 q2hwq(u8 q)
492
-{
493
-	return q ^ 0x3;
494
-}
815
+u8 mt76_ac_to_hwq(u8 ac);
495816 
496817 static inline struct ieee80211_txq *
497818 mtxq_to_txq(struct mt76_txq *mtxq)
....@@ -512,29 +833,92 @@
512833 	return container_of(ptr, struct ieee80211_sta, drv_priv);
513834 }
514835 
515
-int mt76_dma_tx_queue_skb(struct mt76_dev *dev, struct mt76_queue *q,
516
-			  struct sk_buff *skb, struct mt76_wcid *wcid,
517
-			  struct ieee80211_sta *sta);
836
+static inline struct mt76_tx_cb *mt76_tx_skb_cb(struct sk_buff *skb)
837
+{
838
+	BUILD_BUG_ON(sizeof(struct mt76_tx_cb) >
839
+		     sizeof(IEEE80211_SKB_CB(skb)->status.status_driver_data));
840
+	return ((void *)IEEE80211_SKB_CB(skb)->status.status_driver_data);
841
+}
842
+
843
+static inline void *mt76_skb_get_hdr(struct sk_buff *skb)
844
+{
845
+	struct mt76_rx_status mstat;
846
+	u8 *data = skb->data;
847
+
848
+	/* Alignment concerns */
849
+	BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he) % 4);
850
+	BUILD_BUG_ON(sizeof(struct ieee80211_radiotap_he_mu) % 4);
851
+
852
+	mstat = *((struct mt76_rx_status *)skb->cb);
853
+
854
+	if (mstat.flag & RX_FLAG_RADIOTAP_HE)
855
+		data += sizeof(struct ieee80211_radiotap_he);
856
+	if (mstat.flag & RX_FLAG_RADIOTAP_HE_MU)
857
+		data += sizeof(struct ieee80211_radiotap_he_mu);
858
+
859
+	return data;
860
+}
861
+
862
+static inline void mt76_insert_hdr_pad(struct sk_buff *skb)
863
+{
864
+	int len = ieee80211_get_hdrlen_from_skb(skb);
865
+
866
+	if (len % 4 == 0)
867
+		return;
868
+
869
+	skb_push(skb, 2);
870
+	memmove(skb->data, skb->data + 2, len);
871
+
872
+	skb->data[len] = 0;
873
+	skb->data[len + 1] = 0;
874
+}
875
+
876
+static inline bool mt76_is_skb_pktid(u8 pktid)
877
+{
878
+	if (pktid & MT_PACKET_ID_HAS_RATE)
879
+		return false;
880
+
881
+	return pktid >= MT_PACKET_ID_FIRST;
882
+}
883
+
884
+static inline u8 mt76_tx_power_nss_delta(u8 nss)
885
+{
886
+	static const u8 nss_delta[4] = { 0, 6, 9, 12 };
887
+
888
+	return nss_delta[nss - 1];
889
+}
890
+
891
+static inline bool mt76_testmode_enabled(struct mt76_dev *dev)
892
+{
893
+#ifdef CONFIG_NL80211_TESTMODE
894
+	return dev->test.state != MT76_TM_STATE_OFF;
895
+#else
896
+	return false;
897
+#endif
898
+}
518899 
519900 void mt76_rx(struct mt76_dev *dev, enum mt76_rxq_id q, struct sk_buff *skb);
520
-void mt76_tx(struct mt76_dev *dev, struct ieee80211_sta *sta,
901
+void mt76_tx(struct mt76_phy *dev, struct ieee80211_sta *sta,
521902 	     struct mt76_wcid *wcid, struct sk_buff *skb);
522
-void mt76_txq_init(struct mt76_dev *dev, struct ieee80211_txq *txq);
523
-void mt76_txq_remove(struct mt76_dev *dev, struct ieee80211_txq *txq);
524903 void mt76_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq);
525904 void mt76_stop_tx_queues(struct mt76_dev *dev, struct ieee80211_sta *sta,
526905 			 bool send_bar);
527
-void mt76_txq_schedule(struct mt76_dev *dev, struct mt76_queue *hwq);
528
-void mt76_txq_schedule_all(struct mt76_dev *dev);
906
+void mt76_tx_check_agg_ssn(struct ieee80211_sta *sta, struct sk_buff *skb);
907
+void mt76_txq_schedule(struct mt76_phy *phy, enum mt76_txq_id qid);
908
+void mt76_txq_schedule_all(struct mt76_phy *phy);
909
+void mt76_tx_worker(struct mt76_worker *w);
529910 void mt76_release_buffered_frames(struct ieee80211_hw *hw,
530911 				  struct ieee80211_sta *sta,
531912 				  u16 tids, int nframes,
532913 				  enum ieee80211_frame_release_type reason,
533914 				  bool more_data);
534
-void mt76_set_channel(struct mt76_dev *dev);
915
+bool mt76_has_tx_pending(struct mt76_phy *phy);
916
+void mt76_set_channel(struct mt76_phy *phy);
917
+void mt76_update_survey(struct mt76_dev *dev);
918
+void mt76_update_survey_active_time(struct mt76_phy *phy, ktime_t time);
535919 int mt76_get_survey(struct ieee80211_hw *hw, int idx,
536920 		    struct survey_info *survey);
537
-void mt76_set_stream_caps(struct mt76_dev *dev, bool vht);
921
+void mt76_set_stream_caps(struct mt76_phy *phy, bool vht);
538922 
539923 int mt76_rx_aggr_start(struct mt76_dev *dev, struct mt76_wcid *wcid, u8 tid,
540924 		       u16 ssn, u16 size);
....@@ -543,15 +927,91 @@
543927 void mt76_wcid_key_setup(struct mt76_dev *dev, struct mt76_wcid *wcid,
544928 			 struct ieee80211_key_conf *key);
545929 
930
+void mt76_tx_status_lock(struct mt76_dev *dev, struct sk_buff_head *list)
931
+			 __acquires(&dev->status_list.lock);
932
+void mt76_tx_status_unlock(struct mt76_dev *dev, struct sk_buff_head *list)
933
+			   __releases(&dev->status_list.lock);
934
+
935
+int mt76_tx_status_skb_add(struct mt76_dev *dev, struct mt76_wcid *wcid,
936
+			   struct sk_buff *skb);
937
+struct sk_buff *mt76_tx_status_skb_get(struct mt76_dev *dev,
938
+				       struct mt76_wcid *wcid, int pktid,
939
+				       struct sk_buff_head *list);
940
+void mt76_tx_status_skb_done(struct mt76_dev *dev, struct sk_buff *skb,
941
+			     struct sk_buff_head *list);
942
+void mt76_tx_complete_skb(struct mt76_dev *dev, u16 wcid, struct sk_buff *skb);
943
+void mt76_tx_status_check(struct mt76_dev *dev, struct mt76_wcid *wcid,
944
+			  bool flush);
945
+int mt76_sta_state(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
946
+		   struct ieee80211_sta *sta,
947
+		   enum ieee80211_sta_state old_state,
948
+		   enum ieee80211_sta_state new_state);
949
+void __mt76_sta_remove(struct mt76_dev *dev, struct ieee80211_vif *vif,
950
+		       struct ieee80211_sta *sta);
951
+void mt76_sta_pre_rcu_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
952
+			     struct ieee80211_sta *sta);
953
+
954
+int mt76_get_min_avg_rssi(struct mt76_dev *dev, bool ext_phy);
955
+
956
+int mt76_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
957
+		     int *dbm);
958
+
959
+void mt76_csa_check(struct mt76_dev *dev);
960
+void mt76_csa_finish(struct mt76_dev *dev);
961
+
962
+int mt76_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant);
963
+int mt76_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set);
964
+void mt76_insert_ccmp_hdr(struct sk_buff *skb, u8 key_id);
965
+int mt76_get_rate(struct mt76_dev *dev,
966
+		  struct ieee80211_supported_band *sband,
967
+		  int idx, bool cck);
968
+void mt76_sw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
969
+		  const u8 *mac);
970
+void mt76_sw_scan_complete(struct ieee80211_hw *hw,
971
+			   struct ieee80211_vif *vif);
972
+int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
973
+		      void *data, int len);
974
+int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *skb,
975
+		       struct netlink_callback *cb, void *data, int len);
976
+int mt76_testmode_set_state(struct mt76_dev *dev, enum mt76_testmode_state state);
977
+
978
+static inline void mt76_testmode_reset(struct mt76_dev *dev, bool disable)
979
+{
980
+#ifdef CONFIG_NL80211_TESTMODE
981
+	enum mt76_testmode_state state = MT76_TM_STATE_IDLE;
982
+
983
+	if (disable || dev->test.state == MT76_TM_STATE_OFF)
984
+		state = MT76_TM_STATE_OFF;
985
+
986
+	mt76_testmode_set_state(dev, state);
987
+#endif
988
+}
989
+
990
+
546991 /* internal */
547
-void mt76_tx_free(struct mt76_dev *dev);
548
-struct mt76_txwi_cache *mt76_get_txwi(struct mt76_dev *dev);
992
+static inline struct ieee80211_hw *
993
+mt76_tx_status_get_hw(struct mt76_dev *dev, struct sk_buff *skb)
994
+{
995
+	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
996
+	struct ieee80211_hw *hw = dev->phy.hw;
997
+
998
+	if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && dev->phy2)
999
+		hw = dev->phy2->hw;
1000
+
1001
+	info->hw_queue &= ~MT_TX_HW_QUEUE_EXT_PHY;
1002
+
1003
+	return hw;
1004
+}
1005
+
5491006 void mt76_put_txwi(struct mt76_dev *dev, struct mt76_txwi_cache *t);
5501007 void mt76_rx_complete(struct mt76_dev *dev, struct sk_buff_head *frames,
5511008 		      struct napi_struct *napi);
5521009 void mt76_rx_poll_complete(struct mt76_dev *dev, enum mt76_rxq_id q,
5531010 			   struct napi_struct *napi);
5541011 void mt76_rx_aggr_reorder(struct sk_buff *skb, struct sk_buff_head *frames);
1012
+void mt76_testmode_tx_pending(struct mt76_dev *dev);
1013
+void mt76_queue_tx_complete(struct mt76_dev *dev, struct mt76_queue *q,
1014
+			    struct mt76_queue_entry *e);
5551015 
5561016 /* usb */
5571017 static inline bool mt76u_urb_error(struct urb *urb)
....@@ -569,45 +1029,51 @@
5691029 	return qid + 1;
5701030 }
5711031 
572
-static inline bool mt76u_check_sg(struct mt76_dev *dev)
1032
+static inline int
1033
+mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len,
1034
+	       int timeout, int ep)
5731035 {
574
-	struct usb_interface *intf = to_usb_interface(dev->dev);
575
-	struct usb_device *udev = interface_to_usbdev(intf);
1036
+	struct usb_interface *uintf = to_usb_interface(dev->dev);
1037
+	struct usb_device *udev = interface_to_usbdev(uintf);
1038
+	struct mt76_usb *usb = &dev->usb;
1039
+	unsigned int pipe;
5761040 
577
-	return (udev->bus->sg_tablesize > 0 &&
578
-		(udev->bus->no_sg_constraint ||
579
-		 udev->speed == USB_SPEED_WIRELESS));
1041
+	if (actual_len)
1042
+		pipe = usb_rcvbulkpipe(udev, usb->in_ep[ep]);
1043
+	else
1044
+		pipe = usb_sndbulkpipe(udev, usb->out_ep[ep]);
1045
+
1046
+	return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout);
5801047 }
5811048 
1049
+int mt76_skb_adjust_pad(struct sk_buff *skb, int pad);
5821050 int mt76u_vendor_request(struct mt76_dev *dev, u8 req,
5831051 			 u8 req_type, u16 val, u16 offset,
5841052 			 void *buf, size_t len);
5851053 void mt76u_single_wr(struct mt76_dev *dev, const u8 req,
5861054 		     const u16 offset, const u32 val);
587
-u32 mt76u_rr(struct mt76_dev *dev, u32 addr);
588
-void mt76u_wr(struct mt76_dev *dev, u32 addr, u32 val);
589
-int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf);
590
-void mt76u_deinit(struct mt76_dev *dev);
591
-int mt76u_buf_alloc(struct mt76_dev *dev, struct mt76u_buf *buf,
592
-		    int nsgs, int len, int sglen, gfp_t gfp);
593
-void mt76u_buf_free(struct mt76u_buf *buf);
594
-int mt76u_submit_buf(struct mt76_dev *dev, int dir, int index,
595
-		     struct mt76u_buf *buf, gfp_t gfp,
596
-		     usb_complete_t complete_fn, void *context);
597
-int mt76u_submit_rx_buffers(struct mt76_dev *dev);
1055
+int mt76u_init(struct mt76_dev *dev, struct usb_interface *intf,
1056
+	       bool ext);
1057
+int mt76u_alloc_mcu_queue(struct mt76_dev *dev);
5981058 int mt76u_alloc_queues(struct mt76_dev *dev);
599
-void mt76u_stop_queues(struct mt76_dev *dev);
600
-void mt76u_stop_stat_wk(struct mt76_dev *dev);
1059
+void mt76u_stop_tx(struct mt76_dev *dev);
1060
+void mt76u_stop_rx(struct mt76_dev *dev);
1061
+int mt76u_resume_rx(struct mt76_dev *dev);
6011062 void mt76u_queues_deinit(struct mt76_dev *dev);
602
-int mt76u_skb_dma_info(struct sk_buff *skb, int port, u32 flags);
6031063 
604
-int mt76u_mcu_fw_send_data(struct mt76_dev *dev, const void *data,
605
-			   int data_len, u32 max_payload, u32 offset);
606
-void mt76u_mcu_complete_urb(struct urb *urb);
607
-struct sk_buff *mt76u_mcu_msg_alloc(const void *data, int len);
608
-int mt76u_mcu_send_msg(struct mt76_dev *dev, struct sk_buff *skb,
609
-		       int cmd, bool wait_resp);
610
-void mt76u_mcu_fw_reset(struct mt76_dev *dev);
611
-int mt76u_mcu_init_rx(struct mt76_dev *dev);
1064
+int mt76s_init(struct mt76_dev *dev, struct sdio_func *func,
1065
+	       const struct mt76_bus_ops *bus_ops);
1066
+int mt76s_alloc_queues(struct mt76_dev *dev);
1067
+void mt76s_stop_txrx(struct mt76_dev *dev);
1068
+void mt76s_deinit(struct mt76_dev *dev);
1069
+
1070
+struct sk_buff *
1071
+mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data,
1072
+		   int data_len);
1073
+void mt76_mcu_rx_event(struct mt76_dev *dev, struct sk_buff *skb);
1074
+struct sk_buff *mt76_mcu_get_response(struct mt76_dev *dev,
1075
+				      unsigned long expires);
1076
+
1077
+void mt76_set_irq_mask(struct mt76_dev *dev, u32 addr, u32 clear, u32 set);
6121078 
6131079 #endif