forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/net/wireless/marvell/mwifiex/sdio.h
....@@ -1,10 +1,10 @@
11 /*
2
- * Marvell Wireless LAN device driver: SDIO specific definitions
2
+ * NXP Wireless LAN device driver: SDIO specific definitions
33  *
4
- * Copyright (C) 2011-2014, Marvell International Ltd.
4
+ * Copyright 2011-2020 NXP
55  *
6
- * This software file (the "File") is distributed by Marvell International
7
- * Ltd. under the terms of the GNU General Public License Version 2, June 1991
6
+ * This software file (the "File") is distributed by NXP
7
+ * under the terms of the GNU General Public License Version 2, June 1991
88  * (the "License").  You may use, redistribute and/or modify this File in
99  * accordance with the terms and conditions of the License, a copy of which
1010  * is available by writing to the Free Software Foundation, Inc.,
....@@ -36,7 +36,9 @@
3636 #define SD8897_DEFAULT_FW_NAME "mrvl/sd8897_uapsta.bin"
3737 #define SD8887_DEFAULT_FW_NAME "mrvl/sd8887_uapsta.bin"
3838 #define SD8801_DEFAULT_FW_NAME "mrvl/sd8801_uapsta.bin"
39
-#define SD8997_DEFAULT_FW_NAME "mrvl/sd8997_uapsta.bin"
39
+#define SD8977_DEFAULT_FW_NAME "mrvl/sdsd8977_combo_v2.bin"
40
+#define SD8987_DEFAULT_FW_NAME "mrvl/sd8987_uapsta.bin"
41
+#define SD8997_DEFAULT_FW_NAME "mrvl/sdsd8997_combo_v4.bin"
4042 
4143 #define BLOCK_MODE	1
4244 #define BYTE_MODE	0
....@@ -286,296 +288,6 @@
286288 	bool fw_dump_enh;
287289 	bool can_auto_tdls;
288290 	bool can_ext_scan;
289
-};
290
-
291
-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
292
-	.start_rd_port = 1,
293
-	.start_wr_port = 1,
294
-	.base_0_reg = 0x0040,
295
-	.base_1_reg = 0x0041,
296
-	.poll_reg = 0x30,
297
-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
298
-	.host_int_rsr_reg = 0x1,
299
-	.host_int_mask_reg = 0x02,
300
-	.host_int_status_reg = 0x03,
301
-	.status_reg_0 = 0x60,
302
-	.status_reg_1 = 0x61,
303
-	.sdio_int_mask = 0x3f,
304
-	.data_port_mask = 0x0000fffe,
305
-	.io_port_0_reg = 0x78,
306
-	.io_port_1_reg = 0x79,
307
-	.io_port_2_reg = 0x7A,
308
-	.max_mp_regs = 64,
309
-	.rd_bitmap_l = 0x04,
310
-	.rd_bitmap_u = 0x05,
311
-	.wr_bitmap_l = 0x06,
312
-	.wr_bitmap_u = 0x07,
313
-	.rd_len_p0_l = 0x08,
314
-	.rd_len_p0_u = 0x09,
315
-	.card_misc_cfg_reg = 0x6c,
316
-	.func1_dump_reg_start = 0x0,
317
-	.func1_dump_reg_end = 0x9,
318
-	.func1_scratch_reg = 0x60,
319
-	.func1_spec_reg_num = 5,
320
-	.func1_spec_reg_table = {0x28, 0x30, 0x34, 0x38, 0x3c},
321
-};
322
-
323
-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
324
-	.start_rd_port = 0,
325
-	.start_wr_port = 0,
326
-	.base_0_reg = 0x60,
327
-	.base_1_reg = 0x61,
328
-	.poll_reg = 0x50,
329
-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
330
-			CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
331
-	.host_int_rsr_reg = 0x1,
332
-	.host_int_status_reg = 0x03,
333
-	.host_int_mask_reg = 0x02,
334
-	.status_reg_0 = 0xc0,
335
-	.status_reg_1 = 0xc1,
336
-	.sdio_int_mask = 0xff,
337
-	.data_port_mask = 0xffffffff,
338
-	.io_port_0_reg = 0xD8,
339
-	.io_port_1_reg = 0xD9,
340
-	.io_port_2_reg = 0xDA,
341
-	.max_mp_regs = 184,
342
-	.rd_bitmap_l = 0x04,
343
-	.rd_bitmap_u = 0x05,
344
-	.rd_bitmap_1l = 0x06,
345
-	.rd_bitmap_1u = 0x07,
346
-	.wr_bitmap_l = 0x08,
347
-	.wr_bitmap_u = 0x09,
348
-	.wr_bitmap_1l = 0x0a,
349
-	.wr_bitmap_1u = 0x0b,
350
-	.rd_len_p0_l = 0x0c,
351
-	.rd_len_p0_u = 0x0d,
352
-	.card_misc_cfg_reg = 0xcc,
353
-	.card_cfg_2_1_reg = 0xcd,
354
-	.cmd_rd_len_0 = 0xb4,
355
-	.cmd_rd_len_1 = 0xb5,
356
-	.cmd_rd_len_2 = 0xb6,
357
-	.cmd_rd_len_3 = 0xb7,
358
-	.cmd_cfg_0 = 0xb8,
359
-	.cmd_cfg_1 = 0xb9,
360
-	.cmd_cfg_2 = 0xba,
361
-	.cmd_cfg_3 = 0xbb,
362
-	.fw_dump_host_ready = 0xee,
363
-	.fw_dump_ctrl = 0xe2,
364
-	.fw_dump_start = 0xe3,
365
-	.fw_dump_end = 0xea,
366
-	.func1_dump_reg_start = 0x0,
367
-	.func1_dump_reg_end = 0xb,
368
-	.func1_scratch_reg = 0xc0,
369
-	.func1_spec_reg_num = 8,
370
-	.func1_spec_reg_table = {0x4C, 0x50, 0x54, 0x55, 0x58,
371
-				 0x59, 0x5c, 0x5d},
372
-};
373
-
374
-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8997 = {
375
-	.start_rd_port = 0,
376
-	.start_wr_port = 0,
377
-	.base_0_reg = 0xF8,
378
-	.base_1_reg = 0xF9,
379
-	.poll_reg = 0x5C,
380
-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
381
-			CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
382
-	.host_int_rsr_reg = 0x4,
383
-	.host_int_status_reg = 0x0C,
384
-	.host_int_mask_reg = 0x08,
385
-	.status_reg_0 = 0xE8,
386
-	.status_reg_1 = 0xE9,
387
-	.sdio_int_mask = 0xff,
388
-	.data_port_mask = 0xffffffff,
389
-	.io_port_0_reg = 0xE4,
390
-	.io_port_1_reg = 0xE5,
391
-	.io_port_2_reg = 0xE6,
392
-	.max_mp_regs = 196,
393
-	.rd_bitmap_l = 0x10,
394
-	.rd_bitmap_u = 0x11,
395
-	.rd_bitmap_1l = 0x12,
396
-	.rd_bitmap_1u = 0x13,
397
-	.wr_bitmap_l = 0x14,
398
-	.wr_bitmap_u = 0x15,
399
-	.wr_bitmap_1l = 0x16,
400
-	.wr_bitmap_1u = 0x17,
401
-	.rd_len_p0_l = 0x18,
402
-	.rd_len_p0_u = 0x19,
403
-	.card_misc_cfg_reg = 0xd8,
404
-	.card_cfg_2_1_reg = 0xd9,
405
-	.cmd_rd_len_0 = 0xc0,
406
-	.cmd_rd_len_1 = 0xc1,
407
-	.cmd_rd_len_2 = 0xc2,
408
-	.cmd_rd_len_3 = 0xc3,
409
-	.cmd_cfg_0 = 0xc4,
410
-	.cmd_cfg_1 = 0xc5,
411
-	.cmd_cfg_2 = 0xc6,
412
-	.cmd_cfg_3 = 0xc7,
413
-	.fw_dump_host_ready = 0xcc,
414
-	.fw_dump_ctrl = 0xf0,
415
-	.fw_dump_start = 0xf1,
416
-	.fw_dump_end = 0xf8,
417
-	.func1_dump_reg_start = 0x10,
418
-	.func1_dump_reg_end = 0x17,
419
-	.func1_scratch_reg = 0xe8,
420
-	.func1_spec_reg_num = 13,
421
-	.func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D,
422
-				 0x60, 0x61, 0x62, 0x64,
423
-				 0x65, 0x66, 0x68, 0x69,
424
-				 0x6a},
425
-};
426
-
427
-static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8887 = {
428
-	.start_rd_port = 0,
429
-	.start_wr_port = 0,
430
-	.base_0_reg = 0x6C,
431
-	.base_1_reg = 0x6D,
432
-	.poll_reg = 0x5C,
433
-	.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
434
-			CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
435
-	.host_int_rsr_reg = 0x4,
436
-	.host_int_status_reg = 0x0C,
437
-	.host_int_mask_reg = 0x08,
438
-	.status_reg_0 = 0x90,
439
-	.status_reg_1 = 0x91,
440
-	.sdio_int_mask = 0xff,
441
-	.data_port_mask = 0xffffffff,
442
-	.io_port_0_reg = 0xE4,
443
-	.io_port_1_reg = 0xE5,
444
-	.io_port_2_reg = 0xE6,
445
-	.max_mp_regs = 196,
446
-	.rd_bitmap_l = 0x10,
447
-	.rd_bitmap_u = 0x11,
448
-	.rd_bitmap_1l = 0x12,
449
-	.rd_bitmap_1u = 0x13,
450
-	.wr_bitmap_l = 0x14,
451
-	.wr_bitmap_u = 0x15,
452
-	.wr_bitmap_1l = 0x16,
453
-	.wr_bitmap_1u = 0x17,
454
-	.rd_len_p0_l = 0x18,
455
-	.rd_len_p0_u = 0x19,
456
-	.card_misc_cfg_reg = 0xd8,
457
-	.card_cfg_2_1_reg = 0xd9,
458
-	.cmd_rd_len_0 = 0xc0,
459
-	.cmd_rd_len_1 = 0xc1,
460
-	.cmd_rd_len_2 = 0xc2,
461
-	.cmd_rd_len_3 = 0xc3,
462
-	.cmd_cfg_0 = 0xc4,
463
-	.cmd_cfg_1 = 0xc5,
464
-	.cmd_cfg_2 = 0xc6,
465
-	.cmd_cfg_3 = 0xc7,
466
-	.func1_dump_reg_start = 0x10,
467
-	.func1_dump_reg_end = 0x17,
468
-	.func1_scratch_reg = 0x90,
469
-	.func1_spec_reg_num = 13,
470
-	.func1_spec_reg_table = {0x08, 0x58, 0x5C, 0x5D, 0x60,
471
-				 0x61, 0x62, 0x64, 0x65, 0x66,
472
-				 0x68, 0x69, 0x6a},
473
-};
474
-
475
-static const struct mwifiex_sdio_device mwifiex_sdio_sd8786 = {
476
-	.firmware = SD8786_DEFAULT_FW_NAME,
477
-	.reg = &mwifiex_reg_sd87xx,
478
-	.max_ports = 16,
479
-	.mp_agg_pkt_limit = 8,
480
-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
481
-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
482
-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
483
-	.supports_sdio_new_mode = false,
484
-	.has_control_mask = true,
485
-	.can_dump_fw = false,
486
-	.can_auto_tdls = false,
487
-	.can_ext_scan = false,
488
-};
489
-
490
-static const struct mwifiex_sdio_device mwifiex_sdio_sd8787 = {
491
-	.firmware = SD8787_DEFAULT_FW_NAME,
492
-	.reg = &mwifiex_reg_sd87xx,
493
-	.max_ports = 16,
494
-	.mp_agg_pkt_limit = 8,
495
-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
496
-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
497
-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
498
-	.supports_sdio_new_mode = false,
499
-	.has_control_mask = true,
500
-	.can_dump_fw = false,
501
-	.can_auto_tdls = false,
502
-	.can_ext_scan = true,
503
-};
504
-
505
-static const struct mwifiex_sdio_device mwifiex_sdio_sd8797 = {
506
-	.firmware = SD8797_DEFAULT_FW_NAME,
507
-	.reg = &mwifiex_reg_sd87xx,
508
-	.max_ports = 16,
509
-	.mp_agg_pkt_limit = 8,
510
-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
511
-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
512
-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
513
-	.supports_sdio_new_mode = false,
514
-	.has_control_mask = true,
515
-	.can_dump_fw = false,
516
-	.can_auto_tdls = false,
517
-	.can_ext_scan = true,
518
-};
519
-
520
-static const struct mwifiex_sdio_device mwifiex_sdio_sd8897 = {
521
-	.firmware = SD8897_DEFAULT_FW_NAME,
522
-	.reg = &mwifiex_reg_sd8897,
523
-	.max_ports = 32,
524
-	.mp_agg_pkt_limit = 16,
525
-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
526
-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
527
-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
528
-	.supports_sdio_new_mode = true,
529
-	.has_control_mask = false,
530
-	.can_dump_fw = true,
531
-	.can_auto_tdls = false,
532
-	.can_ext_scan = true,
533
-};
534
-
535
-static const struct mwifiex_sdio_device mwifiex_sdio_sd8997 = {
536
-	.firmware = SD8997_DEFAULT_FW_NAME,
537
-	.reg = &mwifiex_reg_sd8997,
538
-	.max_ports = 32,
539
-	.mp_agg_pkt_limit = 16,
540
-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_4K,
541
-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
542
-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_MAX,
543
-	.supports_sdio_new_mode = true,
544
-	.has_control_mask = false,
545
-	.can_dump_fw = true,
546
-	.fw_dump_enh = true,
547
-	.can_auto_tdls = false,
548
-	.can_ext_scan = true,
549
-};
550
-
551
-static const struct mwifiex_sdio_device mwifiex_sdio_sd8887 = {
552
-	.firmware = SD8887_DEFAULT_FW_NAME,
553
-	.reg = &mwifiex_reg_sd8887,
554
-	.max_ports = 32,
555
-	.mp_agg_pkt_limit = 16,
556
-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
557
-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
558
-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_32K,
559
-	.supports_sdio_new_mode = true,
560
-	.has_control_mask = false,
561
-	.can_dump_fw = false,
562
-	.can_auto_tdls = true,
563
-	.can_ext_scan = true,
564
-};
565
-
566
-static const struct mwifiex_sdio_device mwifiex_sdio_sd8801 = {
567
-	.firmware = SD8801_DEFAULT_FW_NAME,
568
-	.reg = &mwifiex_reg_sd87xx,
569
-	.max_ports = 16,
570
-	.mp_agg_pkt_limit = 8,
571
-	.supports_sdio_new_mode = false,
572
-	.has_control_mask = true,
573
-	.tx_buf_size = MWIFIEX_TX_DATA_BUF_SIZE_2K,
574
-	.mp_tx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
575
-	.mp_rx_agg_buf_size = MWIFIEX_MP_AGGR_BUF_SIZE_16K,
576
-	.can_dump_fw = false,
577
-	.can_auto_tdls = false,
578
-	.can_ext_scan = true,
579291 };
580292 
581293 /*