.. | .. |
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7 | 7 | * |
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8 | 8 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
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9 | 9 | * Copyright(c) 2017 Intel Deutschland GmbH |
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10 | | - * Copyright(c) 2018 Intel Corporation |
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| 10 | + * Copyright(c) 2018 - 2020 Intel Corporation |
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11 | 11 | * |
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12 | 12 | * This program is free software; you can redistribute it and/or modify |
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13 | 13 | * it under the terms of version 2 of the GNU General Public License as |
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.. | .. |
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29 | 29 | * |
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30 | 30 | * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved. |
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31 | 31 | * Copyright(c) 2017 Intel Deutschland GmbH |
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32 | | - * Copyright(c) 2018 Intel Corporation |
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| 32 | + * Copyright(c) 2018 - 2020 Intel Corporation |
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33 | 33 | * All rights reserved. |
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34 | 34 | * |
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35 | 35 | * Redistribution and use in source and binary forms, with or without |
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.. | .. |
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66 | 66 | |
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67 | 67 | /** |
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68 | 68 | * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags |
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69 | | - * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC |
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| 69 | + * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for |
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| 70 | + * bandwidths <= 80MHz |
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70 | 71 | * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC |
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| 72 | + * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz |
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| 73 | + * bandwidth |
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| 74 | + * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation |
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| 75 | + * for BPSK (MCS 0) with 1 spatial |
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| 76 | + * stream |
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| 77 | + * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation |
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| 78 | + * for BPSK (MCS 0) with 2 spatial |
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| 79 | + * streams |
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71 | 80 | */ |
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72 | 81 | enum iwl_tlc_mng_cfg_flags { |
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73 | | - IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), |
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74 | | - IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), |
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| 82 | + IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), |
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| 83 | + IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), |
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| 84 | + IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2), |
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| 85 | + IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3), |
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| 86 | + IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4), |
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75 | 87 | }; |
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76 | 88 | |
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77 | 89 | /** |
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.. | .. |
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154 | 166 | IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11, |
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155 | 167 | }; |
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156 | 168 | |
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157 | | -/* Maximum supported tx antennas number */ |
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158 | | -#define MAX_NSS 2 |
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| 169 | +enum IWL_TLC_MNG_NSS { |
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| 170 | + IWL_TLC_NSS_1, |
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| 171 | + IWL_TLC_NSS_2, |
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| 172 | + IWL_TLC_NSS_MAX |
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| 173 | +}; |
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| 174 | + |
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| 175 | +enum IWL_TLC_HT_BW_RATES { |
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| 176 | + IWL_TLC_HT_BW_NONE_160, |
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| 177 | + IWL_TLC_HT_BW_160, |
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| 178 | +}; |
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159 | 179 | |
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160 | 180 | /** |
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161 | 181 | * struct tlc_config_cmd - TLC configuration |
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.. | .. |
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173 | 193 | * @sgi_ch_width_supp: bitmap of SGI support per channel width |
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174 | 194 | * use BIT(@enum iwl_tlc_mng_cfg_cw) |
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175 | 195 | * @reserved2: reserved |
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| 196 | + * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI), |
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| 197 | + * set zero for no limit. |
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176 | 198 | */ |
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177 | 199 | struct iwl_tlc_config_cmd { |
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178 | 200 | u8 sta_id; |
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.. | .. |
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183 | 205 | u8 amsdu; |
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184 | 206 | __le16 flags; |
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185 | 207 | __le16 non_ht_rates; |
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186 | | - __le16 ht_rates[MAX_NSS][2]; |
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| 208 | + __le16 ht_rates[IWL_TLC_NSS_MAX][2]; |
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187 | 209 | __le16 max_mpdu_len; |
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188 | 210 | u8 sgi_ch_width_supp; |
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189 | | - u8 reserved2[1]; |
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190 | | -} __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_2 */ |
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| 211 | + u8 reserved2; |
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| 212 | + __le32 max_tx_op; |
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| 213 | +} __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_3 */ |
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191 | 214 | |
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192 | 215 | /** |
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193 | 216 | * enum iwl_tlc_update_flags - updated fields |
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.. | .. |
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216 | 239 | __le32 amsdu_size; |
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217 | 240 | __le32 amsdu_enabled; |
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218 | 241 | } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */ |
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219 | | - |
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220 | | -/** |
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221 | | - * enum iwl_tlc_debug_flags - debug options |
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222 | | - * @IWL_TLC_DEBUG_FIXED_RATE: set fixed rate for rate scaling |
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223 | | - * @IWL_TLC_DEBUG_STATS_TH: threshold for sending statistics to the driver, in |
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224 | | - * frames |
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225 | | - * @IWL_TLC_DEBUG_STATS_TIME_TH: threshold for sending statistics to the |
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226 | | - * driver, in msec |
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227 | | - * @IWL_TLC_DEBUG_AGG_TIME_LIM: time limit for a BA session |
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228 | | - * @IWL_TLC_DEBUG_AGG_DIS_START_TH: frame with try-count greater than this |
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229 | | - * threshold should not start an aggregation session |
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230 | | - * @IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM: set max number of frames in an aggregation |
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231 | | - * @IWL_TLC_DEBUG_RENEW_ADDBA_DELAY: delay between retries of ADD BA |
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232 | | - * @IWL_TLC_DEBUG_START_AC_RATE_IDX: frames per second to start a BA session |
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233 | | - * @IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK: disable BW scaling |
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234 | | - */ |
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235 | | -enum iwl_tlc_debug_flags { |
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236 | | - IWL_TLC_DEBUG_FIXED_RATE, |
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237 | | - IWL_TLC_DEBUG_STATS_TH, |
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238 | | - IWL_TLC_DEBUG_STATS_TIME_TH, |
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239 | | - IWL_TLC_DEBUG_AGG_TIME_LIM, |
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240 | | - IWL_TLC_DEBUG_AGG_DIS_START_TH, |
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241 | | - IWL_TLC_DEBUG_AGG_FRAME_CNT_LIM, |
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242 | | - IWL_TLC_DEBUG_RENEW_ADDBA_DELAY, |
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243 | | - IWL_TLC_DEBUG_START_AC_RATE_IDX, |
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244 | | - IWL_TLC_DEBUG_NO_FAR_RANGE_TWEAK, |
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245 | | -}; /* TLC_MNG_DEBUG_FLAGS_API_E_VER_1 */ |
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246 | | - |
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247 | | -/** |
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248 | | - * struct iwl_dhc_tlc_dbg - fixed debug config |
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249 | | - * @sta_id: bit 0 - enable/disable, bits 1 - 7 hold station id |
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250 | | - * @reserved1: reserved |
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251 | | - * @flags: bitmap of %IWL_TLC_DEBUG_\* |
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252 | | - * @fixed_rate: rate value |
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253 | | - * @stats_threshold: if number of tx-ed frames is greater, send statistics |
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254 | | - * @time_threshold: statistics threshold in usec |
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255 | | - * @agg_time_lim: max agg time |
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256 | | - * @agg_dis_start_threshold: frames with try-cont greater than this count will |
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257 | | - * not be aggregated |
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258 | | - * @agg_frame_count_lim: agg size |
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259 | | - * @addba_retry_delay: delay between retries of ADD BA |
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260 | | - * @start_ac_rate_idx: frames per second to start a BA session |
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261 | | - * @no_far_range_tweak: disable BW scaling |
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262 | | - * @reserved2: reserved |
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263 | | - */ |
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264 | | -struct iwl_dhc_tlc_cmd { |
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265 | | - u8 sta_id; |
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266 | | - u8 reserved1[3]; |
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267 | | - __le32 flags; |
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268 | | - __le32 fixed_rate; |
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269 | | - __le16 stats_threshold; |
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270 | | - __le16 time_threshold; |
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271 | | - __le16 agg_time_lim; |
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272 | | - __le16 agg_dis_start_threshold; |
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273 | | - __le16 agg_frame_count_lim; |
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274 | | - __le16 addba_retry_delay; |
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275 | | - u8 start_ac_rate_idx[IEEE80211_NUM_ACS]; |
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276 | | - u8 no_far_range_tweak; |
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277 | | - u8 reserved2[3]; |
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278 | | -} __packed; |
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279 | 242 | |
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280 | 243 | /* |
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281 | 244 | * These serve as indexes into |
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.. | .. |
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526 | 489 | #define RATE_MCS_HE_106T_POS 28 |
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527 | 490 | #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) |
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528 | 491 | |
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| 492 | +/* Bit 30-31: (1) RTS, (2) CTS */ |
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| 493 | +#define RATE_MCS_RTS_REQUIRED_POS (30) |
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| 494 | +#define RATE_MCS_RTS_REQUIRED_MSK (0x1 << RATE_MCS_RTS_REQUIRED_POS) |
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| 495 | + |
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| 496 | +#define RATE_MCS_CTS_REQUIRED_POS (31) |
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| 497 | +#define RATE_MCS_CTS_REQUIRED_MSK (0x1 << RATE_MCS_CTS_REQUIRED_POS) |
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| 498 | + |
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529 | 499 | /* Link Quality definitions */ |
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530 | 500 | |
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531 | 501 | /* # entries in rate scale table to support Tx retries */ |
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