add stmac read mac form eeprom

hc

2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c

 kernel/drivers/net/ethernet/intel/ixgb/ixgb_hw.c
..
..
@@ -98,7 +98,6 @@
98
98
 ixgb_adapter_stop(struct ixgb_hw *hw)
99
99
 {
100
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 	u32 ctrl_reg;
101
-	u32 icr_reg;
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101
 
103
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 	ENTER();
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103
 
..
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@@ -142,7 +141,7 @@
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 	IXGB_WRITE_REG(hw, IMC, 0xffffffff);
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142
 
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 	/* Clear any pending interrupt events. */
145
-	icr_reg = IXGB_READ_REG(hw, ICR);
144
+	IXGB_READ_REG(hw, ICR);
146
145
 
147
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 	return ctrl_reg & IXGB_CTRL0_RST;
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 }
..
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@@ -274,7 +273,6 @@
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 ixgb_init_hw(struct ixgb_hw *hw)
275
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 {
276
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 	u32 i;
277
-	u32 ctrl_reg;
278
276
 	bool status;
279
277
 
280
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 	ENTER();
..
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@@ -286,7 +284,7 @@
286
284
 	 */
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 	pr_debug("Issuing a global reset to MAC\n");
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286
 
289
-	ctrl_reg = ixgb_mac_reset(hw);
287
+	ixgb_mac_reset(hw);
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288
 
291
289
 	pr_debug("Issuing an EE reset to MAC\n");
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 #ifdef HP_ZX1
..
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@@ -949,8 +947,6 @@
949
947
 static void
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948
 ixgb_clear_hw_cntrs(struct ixgb_hw *hw)
951
949
 {
952
-	volatile u32 temp_reg;
953
-
954
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 	ENTER();
955
951
 
956
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 	/* if we are stopped or resetting exit gracefully */
..
..
@@ -959,66 +955,66 @@
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 		return;
960
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 	}
961
957
 
962
-	temp_reg = IXGB_READ_REG(hw, TPRL);
963
-	temp_reg = IXGB_READ_REG(hw, TPRH);
964
-	temp_reg = IXGB_READ_REG(hw, GPRCL);
965
-	temp_reg = IXGB_READ_REG(hw, GPRCH);
966
-	temp_reg = IXGB_READ_REG(hw, BPRCL);
967
-	temp_reg = IXGB_READ_REG(hw, BPRCH);
968
-	temp_reg = IXGB_READ_REG(hw, MPRCL);
969
-	temp_reg = IXGB_READ_REG(hw, MPRCH);
970
-	temp_reg = IXGB_READ_REG(hw, UPRCL);
971
-	temp_reg = IXGB_READ_REG(hw, UPRCH);
972
-	temp_reg = IXGB_READ_REG(hw, VPRCL);
973
-	temp_reg = IXGB_READ_REG(hw, VPRCH);
974
-	temp_reg = IXGB_READ_REG(hw, JPRCL);
975
-	temp_reg = IXGB_READ_REG(hw, JPRCH);
976
-	temp_reg = IXGB_READ_REG(hw, GORCL);
977
-	temp_reg = IXGB_READ_REG(hw, GORCH);
978
-	temp_reg = IXGB_READ_REG(hw, TORL);
979
-	temp_reg = IXGB_READ_REG(hw, TORH);
980
-	temp_reg = IXGB_READ_REG(hw, RNBC);
981
-	temp_reg = IXGB_READ_REG(hw, RUC);
982
-	temp_reg = IXGB_READ_REG(hw, ROC);
983
-	temp_reg = IXGB_READ_REG(hw, RLEC);
984
-	temp_reg = IXGB_READ_REG(hw, CRCERRS);
985
-	temp_reg = IXGB_READ_REG(hw, ICBC);
986
-	temp_reg = IXGB_READ_REG(hw, ECBC);
987
-	temp_reg = IXGB_READ_REG(hw, MPC);
988
-	temp_reg = IXGB_READ_REG(hw, TPTL);
989
-	temp_reg = IXGB_READ_REG(hw, TPTH);
990
-	temp_reg = IXGB_READ_REG(hw, GPTCL);
991
-	temp_reg = IXGB_READ_REG(hw, GPTCH);
992
-	temp_reg = IXGB_READ_REG(hw, BPTCL);
993
-	temp_reg = IXGB_READ_REG(hw, BPTCH);
994
-	temp_reg = IXGB_READ_REG(hw, MPTCL);
995
-	temp_reg = IXGB_READ_REG(hw, MPTCH);
996
-	temp_reg = IXGB_READ_REG(hw, UPTCL);
997
-	temp_reg = IXGB_READ_REG(hw, UPTCH);
998
-	temp_reg = IXGB_READ_REG(hw, VPTCL);
999
-	temp_reg = IXGB_READ_REG(hw, VPTCH);
1000
-	temp_reg = IXGB_READ_REG(hw, JPTCL);
1001
-	temp_reg = IXGB_READ_REG(hw, JPTCH);
1002
-	temp_reg = IXGB_READ_REG(hw, GOTCL);
1003
-	temp_reg = IXGB_READ_REG(hw, GOTCH);
1004
-	temp_reg = IXGB_READ_REG(hw, TOTL);
1005
-	temp_reg = IXGB_READ_REG(hw, TOTH);
1006
-	temp_reg = IXGB_READ_REG(hw, DC);
1007
-	temp_reg = IXGB_READ_REG(hw, PLT64C);
1008
-	temp_reg = IXGB_READ_REG(hw, TSCTC);
1009
-	temp_reg = IXGB_READ_REG(hw, TSCTFC);
1010
-	temp_reg = IXGB_READ_REG(hw, IBIC);
1011
-	temp_reg = IXGB_READ_REG(hw, RFC);
1012
-	temp_reg = IXGB_READ_REG(hw, LFC);
1013
-	temp_reg = IXGB_READ_REG(hw, PFRC);
1014
-	temp_reg = IXGB_READ_REG(hw, PFTC);
1015
-	temp_reg = IXGB_READ_REG(hw, MCFRC);
1016
-	temp_reg = IXGB_READ_REG(hw, MCFTC);
1017
-	temp_reg = IXGB_READ_REG(hw, XONRXC);
1018
-	temp_reg = IXGB_READ_REG(hw, XONTXC);
1019
-	temp_reg = IXGB_READ_REG(hw, XOFFRXC);
1020
-	temp_reg = IXGB_READ_REG(hw, XOFFTXC);
1021
-	temp_reg = IXGB_READ_REG(hw, RJC);
958
+	IXGB_READ_REG(hw, TPRL);
959
+	IXGB_READ_REG(hw, TPRH);
960
+	IXGB_READ_REG(hw, GPRCL);
961
+	IXGB_READ_REG(hw, GPRCH);
962
+	IXGB_READ_REG(hw, BPRCL);
963
+	IXGB_READ_REG(hw, BPRCH);
964
+	IXGB_READ_REG(hw, MPRCL);
965
+	IXGB_READ_REG(hw, MPRCH);
966
+	IXGB_READ_REG(hw, UPRCL);
967
+	IXGB_READ_REG(hw, UPRCH);
968
+	IXGB_READ_REG(hw, VPRCL);
969
+	IXGB_READ_REG(hw, VPRCH);
970
+	IXGB_READ_REG(hw, JPRCL);
971
+	IXGB_READ_REG(hw, JPRCH);
972
+	IXGB_READ_REG(hw, GORCL);
973
+	IXGB_READ_REG(hw, GORCH);
974
+	IXGB_READ_REG(hw, TORL);
975
+	IXGB_READ_REG(hw, TORH);
976
+	IXGB_READ_REG(hw, RNBC);
977
+	IXGB_READ_REG(hw, RUC);
978
+	IXGB_READ_REG(hw, ROC);
979
+	IXGB_READ_REG(hw, RLEC);
980
+	IXGB_READ_REG(hw, CRCERRS);
981
+	IXGB_READ_REG(hw, ICBC);
982
+	IXGB_READ_REG(hw, ECBC);
983
+	IXGB_READ_REG(hw, MPC);
984
+	IXGB_READ_REG(hw, TPTL);
985
+	IXGB_READ_REG(hw, TPTH);
986
+	IXGB_READ_REG(hw, GPTCL);
987
+	IXGB_READ_REG(hw, GPTCH);
988
+	IXGB_READ_REG(hw, BPTCL);
989
+	IXGB_READ_REG(hw, BPTCH);
990
+	IXGB_READ_REG(hw, MPTCL);
991
+	IXGB_READ_REG(hw, MPTCH);
992
+	IXGB_READ_REG(hw, UPTCL);
993
+	IXGB_READ_REG(hw, UPTCH);
994
+	IXGB_READ_REG(hw, VPTCL);
995
+	IXGB_READ_REG(hw, VPTCH);
996
+	IXGB_READ_REG(hw, JPTCL);
997
+	IXGB_READ_REG(hw, JPTCH);
998
+	IXGB_READ_REG(hw, GOTCL);
999
+	IXGB_READ_REG(hw, GOTCH);
1000
+	IXGB_READ_REG(hw, TOTL);
1001
+	IXGB_READ_REG(hw, TOTH);
1002
+	IXGB_READ_REG(hw, DC);
1003
+	IXGB_READ_REG(hw, PLT64C);
1004
+	IXGB_READ_REG(hw, TSCTC);
1005
+	IXGB_READ_REG(hw, TSCTFC);
1006
+	IXGB_READ_REG(hw, IBIC);
1007
+	IXGB_READ_REG(hw, RFC);
1008
+	IXGB_READ_REG(hw, LFC);
1009
+	IXGB_READ_REG(hw, PFRC);
1010
+	IXGB_READ_REG(hw, PFTC);
1011
+	IXGB_READ_REG(hw, MCFRC);
1012
+	IXGB_READ_REG(hw, MCFTC);
1013
+	IXGB_READ_REG(hw, XONRXC);
1014
+	IXGB_READ_REG(hw, XONTXC);
1015
+	IXGB_READ_REG(hw, XOFFRXC);
1016
+	IXGB_READ_REG(hw, XOFFTXC);
1017
+	IXGB_READ_REG(hw, RJC);
1022
1018
 }
1023
1019
 
1024
1020
 /******************************************************************************
..
..
@@ -1161,18 +1157,13 @@
1161
1157
 ixgb_optics_reset(struct ixgb_hw *hw)
1162
1158
 {
1163
1159
 	if (hw->phy_type == ixgb_phy_type_txn17401) {
1164
-		u16 mdio_reg;
1165
-
1166
1160
 		ixgb_write_phy_reg(hw,
1167
1161
 				   MDIO_CTRL1,
1168
1162
 				   IXGB_PHY_ADDRESS,
1169
1163
 				   MDIO_MMD_PMAPMD,
1170
1164
 				   MDIO_CTRL1_RESET);
1171
1165
 
1172
-		mdio_reg = ixgb_read_phy_reg(hw,
1173
-					     MDIO_CTRL1,
1174
-					     IXGB_PHY_ADDRESS,
1175
-					     MDIO_MMD_PMAPMD);
1166
+		ixgb_read_phy_reg(hw, MDIO_CTRL1, IXGB_PHY_ADDRESS, MDIO_MMD_PMAPMD);
1176
1167
 	}
1177
1168
 }
1178
1169