hc
2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c
kernel/drivers/net/ethernet/intel/i40e/i40e.h
....@@ -27,6 +27,7 @@
2727 #include <net/ip6_checksum.h>
2828 #include <linux/ethtool.h>
2929 #include <linux/if_vlan.h>
30
+#include <linux/if_macvlan.h>
3031 #include <linux/if_bridge.h>
3132 #include <linux/clocksource.h>
3233 #include <linux/net_tstamp.h>
....@@ -34,9 +35,12 @@
3435 #include <net/pkt_cls.h>
3536 #include <net/tc_act/tc_gact.h>
3637 #include <net/tc_act/tc_mirred.h>
38
+#include <net/udp_tunnel.h>
39
+#include <net/xdp_sock.h>
40
+#include <linux/bitfield.h>
3741 #include "i40e_type.h"
3842 #include "i40e_prototype.h"
39
-#include "i40e_client.h"
43
+#include <linux/net/intel/i40e_client.h>
4044 #include <linux/avf/virtchnl.h>
4145 #include "i40e_virtchnl_pf.h"
4246 #include "i40e_txrx.h"
....@@ -58,17 +62,14 @@
5862 (((pf)->hw_features & I40E_HW_RSS_AQ_CAPABLE) ? 4 : 1)
5963 #define I40E_DEFAULT_QUEUES_PER_VF 4
6064 #define I40E_MAX_VF_QUEUES 16
61
-#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
6265 #define i40e_pf_get_max_q_per_tc(pf) \
6366 (((pf)->hw_features & I40E_HW_128_QP_RSS_CAPABLE) ? 128 : 64)
64
-#define I40E_FDIR_RING 0
6567 #define I40E_FDIR_RING_COUNT 32
6668 #define I40E_MAX_AQ_BUF_SIZE 4096
6769 #define I40E_AQ_LEN 256
6870 #define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */
6971 #define I40E_MAX_USER_PRIORITY 8
7072 #define I40E_DEFAULT_TRAFFIC_CLASS BIT(0)
71
-#define I40E_DEFAULT_MSG_ENABLE 4
7273 #define I40E_QUEUE_WAIT_RETRY_LIMIT 10
7374 #define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
7475
....@@ -90,21 +91,14 @@
9091 #define I40E_OEM_SNAP_SHIFT 16
9192 #define I40E_OEM_RELEASE_MASK 0x0000ffff
9293
93
-/* The values in here are decimal coded as hex as is the case in the NVM map*/
94
-#define I40E_CURRENT_NVM_VERSION_HI 0x2
95
-#define I40E_CURRENT_NVM_VERSION_LO 0x40
96
-
9794 #define I40E_RX_DESC(R, i) \
98
- (&(((union i40e_32byte_rx_desc *)((R)->desc))[i]))
95
+ (&(((union i40e_rx_desc *)((R)->desc))[i]))
9996 #define I40E_TX_DESC(R, i) \
10097 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
10198 #define I40E_TX_CTXTDESC(R, i) \
10299 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
103100 #define I40E_TX_FDIRDESC(R, i) \
104101 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
105
-
106
-/* default to trying for four seconds */
107
-#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
108102
109103 /* BW rate limiting */
110104 #define I40E_BW_CREDIT_DIVISOR 50 /* 50Mbps per BW credit */
....@@ -130,7 +124,6 @@
130124 __I40E_PF_RESET_AND_REBUILD_REQUESTED,
131125 __I40E_CORE_RESET_REQUESTED,
132126 __I40E_GLOBAL_RESET_REQUESTED,
133
- __I40E_EMP_RESET_REQUESTED,
134127 __I40E_EMP_RESET_INTR_RECEIVED,
135128 __I40E_SUSPENDED,
136129 __I40E_PTP_TX_IN_PROGRESS,
....@@ -143,11 +136,12 @@
143136 __I40E_PORT_SUSPENDED,
144137 __I40E_VF_DISABLE,
145138 __I40E_MACVLAN_SYNC_PENDING,
146
- __I40E_UDP_FILTER_SYNC_PENDING,
147139 __I40E_TEMP_LINK_POLLING,
148140 __I40E_CLIENT_SERVICE_REQUESTED,
149141 __I40E_CLIENT_L2_CHANGE,
150142 __I40E_CLIENT_RESET,
143
+ __I40E_VIRTCHNL_OP_PENDING,
144
+ __I40E_RECOVERY_MODE,
151145 __I40E_VF_RESETS_DISABLED, /* disable resets during i40e_remove */
152146 __I40E_VFS_RELEASING,
153147 /* This must be last as it determines the size of the BITMAP */
....@@ -245,11 +239,11 @@
245239 u32 fd_id;
246240 };
247241
248
-#define I40E_CLOUD_FIELD_OMAC 0x01
249
-#define I40E_CLOUD_FIELD_IMAC 0x02
250
-#define I40E_CLOUD_FIELD_IVLAN 0x04
251
-#define I40E_CLOUD_FIELD_TEN_ID 0x08
252
-#define I40E_CLOUD_FIELD_IIP 0x10
242
+#define I40E_CLOUD_FIELD_OMAC BIT(0)
243
+#define I40E_CLOUD_FIELD_IMAC BIT(1)
244
+#define I40E_CLOUD_FIELD_IVLAN BIT(2)
245
+#define I40E_CLOUD_FIELD_TEN_ID BIT(3)
246
+#define I40E_CLOUD_FIELD_IIP BIT(4)
253247
254248 #define I40E_CLOUD_FILTER_FLAGS_OMAC I40E_CLOUD_FIELD_OMAC
255249 #define I40E_CLOUD_FILTER_FLAGS_IMAC I40E_CLOUD_FIELD_IMAC
....@@ -297,11 +291,6 @@
297291 u8 tunnel_type;
298292 };
299293
300
-#define I40E_ETH_P_LLDP 0x88cc
301
-
302
-#define I40E_DCB_PRIO_TYPE_STRICT 0
303
-#define I40E_DCB_PRIO_TYPE_ETS 1
304
-#define I40E_DCB_STRICT_PRIO_CREDITS 127
305294 /* DCB per TC information data structure */
306295 struct i40e_tc_info {
307296 u16 qoffset; /* Queue offset from base queue */
....@@ -324,6 +313,29 @@
324313 u8 filter_index;
325314 };
326315
316
+#define I40_DDP_FLASH_REGION 100
317
+#define I40E_PROFILE_INFO_SIZE 48
318
+#define I40E_MAX_PROFILE_NUM 16
319
+#define I40E_PROFILE_LIST_SIZE \
320
+ (I40E_PROFILE_INFO_SIZE * I40E_MAX_PROFILE_NUM + 4)
321
+#define I40E_DDP_PROFILE_PATH "intel/i40e/ddp/"
322
+#define I40E_DDP_PROFILE_NAME_MAX 64
323
+
324
+int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size,
325
+ bool is_add);
326
+int i40e_ddp_flash(struct net_device *netdev, struct ethtool_flash *flash);
327
+
328
+struct i40e_ddp_profile_list {
329
+ u32 p_count;
330
+ struct i40e_profile_info p_info[];
331
+};
332
+
333
+struct i40e_ddp_old_profile_list {
334
+ struct list_head list;
335
+ size_t old_ddp_size;
336
+ u8 old_ddp_buf[];
337
+};
338
+
327339 /* macros related to FLX_PIT */
328340 #define I40E_FLEX_SET_FSIZE(fsize) (((fsize) << \
329341 I40E_PRTQF_FLX_PIT_FSIZE_SHIFT) & \
....@@ -338,15 +350,6 @@
338350 I40E_FLEX_SET_FSIZE(fsize) | \
339351 I40E_FLEX_SET_SRC_WORD(src))
340352
341
-#define I40E_FLEX_PIT_GET_SRC(flex) (((flex) & \
342
- I40E_PRTQF_FLX_PIT_SOURCE_OFF_MASK) >> \
343
- I40E_PRTQF_FLX_PIT_SOURCE_OFF_SHIFT)
344
-#define I40E_FLEX_PIT_GET_DST(flex) (((flex) & \
345
- I40E_PRTQF_FLX_PIT_DEST_OFF_MASK) >> \
346
- I40E_PRTQF_FLX_PIT_DEST_OFF_SHIFT)
347
-#define I40E_FLEX_PIT_GET_FSIZE(flex) (((flex) & \
348
- I40E_PRTQF_FLX_PIT_FSIZE_MASK) >> \
349
- I40E_PRTQF_FLX_PIT_FSIZE_SHIFT)
350353
351354 #define I40E_MAX_FLEX_SRC_OFFSET 0x1F
352355
....@@ -371,7 +374,6 @@
371374 #define I40E_L4_GLQF_ORT_IDX 35
372375
373376 /* Flex PIT register index */
374
-#define I40E_FLEX_PIT_IDX_START_L2 0
375377 #define I40E_FLEX_PIT_IDX_START_L3 3
376378 #define I40E_FLEX_PIT_IDX_START_L4 6
377379
....@@ -393,6 +395,11 @@
393395 u8 pit_index;
394396 };
395397
398
+struct i40e_fwd_adapter {
399
+ struct net_device *netdev;
400
+ int bit_no;
401
+};
402
+
396403 struct i40e_channel {
397404 struct list_head list;
398405 bool initialized;
....@@ -407,10 +414,24 @@
407414 struct i40e_aqc_vsi_properties_data info;
408415
409416 u64 max_tx_rate;
417
+ struct i40e_fwd_adapter *fwd;
410418
411419 /* track this channel belongs to which VSI */
412420 struct i40e_vsi *parent_vsi;
413421 };
422
+
423
+static inline bool i40e_is_channel_macvlan(struct i40e_channel *ch)
424
+{
425
+ return !!ch->fwd;
426
+}
427
+
428
+static inline u8 *i40e_channel_mac(struct i40e_channel *ch)
429
+{
430
+ if (i40e_is_channel_macvlan(ch))
431
+ return ch->fwd->netdev->dev_addr;
432
+ else
433
+ return NULL;
434
+}
414435
415436 /* struct that defines the Ethernet device */
416437 struct i40e_pf {
....@@ -463,8 +484,8 @@
463484 struct list_head l3_flex_pit_list;
464485 struct list_head l4_flex_pit_list;
465486
466
- struct i40e_udp_port_config udp_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
467
- u16 pending_udp_bitmap;
487
+ struct udp_tunnel_nic_shared udp_tunnel_shared;
488
+ struct udp_tunnel_nic_info udp_tunnel_nic;
468489
469490 struct hlist_head cloud_filter_list;
470491 u16 num_cloud_filters;
....@@ -493,14 +514,12 @@
493514 #define I40E_HW_GENEVE_OFFLOAD_CAPABLE BIT(9)
494515 #define I40E_HW_PTP_L4_CAPABLE BIT(10)
495516 #define I40E_HW_WOL_MC_MAGIC_PKT_WAKE BIT(11)
496
-#define I40E_HW_MPLS_HDR_OFFLOAD_CAPABLE BIT(12)
497517 #define I40E_HW_HAVE_CRT_RETIMER BIT(13)
498518 #define I40E_HW_OUTER_UDP_CSUM_CAPABLE BIT(14)
499519 #define I40E_HW_PHY_CONTROLS_LEDS BIT(15)
500520 #define I40E_HW_STOP_FW_LLDP BIT(16)
501521 #define I40E_HW_PORT_ID_VALID BIT(17)
502522 #define I40E_HW_RESTART_AUTONEG BIT(18)
503
-#define I40E_HW_STOPPABLE_FW_LLDP BIT(19)
504523
505524 u32 flags;
506525 #define I40E_FLAG_RX_CSUM_ENABLED BIT(0)
....@@ -528,6 +547,30 @@
528547 #define I40E_FLAG_FD_SB_INACTIVE BIT(22)
529548 #define I40E_FLAG_FD_SB_TO_CLOUD_FILTER BIT(23)
530549 #define I40E_FLAG_DISABLE_FW_LLDP BIT(24)
550
+#define I40E_FLAG_RS_FEC BIT(25)
551
+#define I40E_FLAG_BASE_R_FEC BIT(26)
552
+/* TOTAL_PORT_SHUTDOWN
553
+ * Allows to physically disable the link on the NIC's port.
554
+ * If enabled, (after link down request from the OS)
555
+ * no link, traffic or led activity is possible on that port.
556
+ *
557
+ * If I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED is set, the
558
+ * I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED must be explicitly forced to true
559
+ * and cannot be disabled by system admin at that time.
560
+ * The functionalities are exclusive in terms of configuration, but they also
561
+ * have similar behavior (allowing to disable physical link of the port),
562
+ * with following differences:
563
+ * - LINK_DOWN_ON_CLOSE_ENABLED is configurable at host OS run-time and is
564
+ * supported by whole family of 7xx Intel Ethernet Controllers
565
+ * - TOTAL_PORT_SHUTDOWN may be enabled only before OS loads (in BIOS)
566
+ * only if motherboard's BIOS and NIC's FW has support of it
567
+ * - when LINK_DOWN_ON_CLOSE_ENABLED is used, the link is being brought down
568
+ * by sending phy_type=0 to NIC's FW
569
+ * - when TOTAL_PORT_SHUTDOWN is used, phy_type is not altered, instead
570
+ * the link is being brought down by clearing bit (I40E_AQ_PHY_ENABLE_LINK)
571
+ * in abilities field of i40e_aq_set_phy_config structure
572
+ */
573
+#define I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED BIT(27)
531574
532575 struct i40e_client_instance *cinst;
533576 bool stat_offsets_loaded;
....@@ -591,6 +634,8 @@
591634 struct sk_buff *ptp_tx_skb;
592635 unsigned long ptp_tx_start;
593636 struct hwtstamp_config tstamp_config;
637
+ struct timespec64 ptp_prev_hw_time;
638
+ ktime_t ptp_reset_start;
594639 struct mutex tmreg_lock; /* Used to protect the SYSTIME registers. */
595640 u32 ptp_adj_mult;
596641 u32 tx_hwtstamp_timeouts;
....@@ -612,6 +657,8 @@
612657 u16 override_q_count;
613658 u16 last_sw_conf_flags;
614659 u16 last_sw_conf_valid_flags;
660
+ /* List to keep previous DDP profiles to be rolled back in the future */
661
+ struct list_head ddp_old_prof;
615662 };
616663
617664 /**
....@@ -751,7 +798,8 @@
751798 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
752799 u16 req_queue_pairs; /* User requested queue pairs */
753800 u16 num_queue_pairs; /* Used tx and rx pairs */
754
- u16 num_desc;
801
+ u16 num_tx_desc;
802
+ u16 num_rx_desc;
755803 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
756804 s16 vf_id; /* Virtual function ID for SRIOV VSIs */
757805
....@@ -788,10 +836,19 @@
788836 struct list_head ch_list;
789837 u16 tc_seid_map[I40E_MAX_TRAFFIC_CLASS];
790838
839
+ /* macvlan fields */
840
+#define I40E_MAX_MACVLANS 128 /* Max HW vectors - 1 on FVL */
841
+#define I40E_MIN_MACVLAN_VECTORS 2 /* Min vectors to enable macvlans */
842
+ DECLARE_BITMAP(fwd_bitmask, I40E_MAX_MACVLANS);
843
+ struct list_head macvlan_list;
844
+ int macvlan_cnt;
845
+
791846 void *priv; /* client driver data reference. */
792847
793848 /* VSI specific handlers */
794849 irqreturn_t (*irq_handler)(int irq, void *data);
850
+
851
+ unsigned long *af_xdp_zc_qps; /* tracks AF_XDP ZC enabled qps */
795852 } ____cacheline_internodealigned_in_smp;
796853
797854 struct i40e_netdev_priv {
....@@ -935,11 +992,25 @@
935992 (u32)(val & 0xFFFFFFFFULL));
936993 }
937994
995
+/**
996
+ * i40e_get_pf_count - get PCI PF count.
997
+ * @hw: pointer to a hw.
998
+ *
999
+ * Reports the function number of the highest PCI physical
1000
+ * function plus 1 as it is loaded from the NVM.
1001
+ *
1002
+ * Return: PCI PF count.
1003
+ **/
1004
+static inline u32 i40e_get_pf_count(struct i40e_hw *hw)
1005
+{
1006
+ return FIELD_GET(I40E_GLGEN_PCIFCNCNT_PCIPFCNT_MASK,
1007
+ rd32(hw, I40E_GLGEN_PCIFCNCNT));
1008
+}
1009
+
9381010 /* needed by i40e_ethtool.c */
9391011 int i40e_up(struct i40e_vsi *vsi);
9401012 void i40e_down(struct i40e_vsi *vsi);
9411013 extern const char i40e_driver_name[];
942
-extern const char i40e_driver_version_str[];
9431014 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
9441015 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired);
9451016 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
....@@ -967,6 +1038,7 @@
9671038 return NULL;
9681039 }
9691040 void i40e_update_stats(struct i40e_vsi *vsi);
1041
+void i40e_update_veb_stats(struct i40e_veb *veb);
9701042 void i40e_update_eth_stats(struct i40e_vsi *vsi);
9711043 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
9721044 int i40e_fetch_switch_configuration(struct i40e_pf *pf,
....@@ -1064,6 +1136,7 @@
10641136 const u8 *macaddr);
10651137 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr);
10661138 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
1139
+int i40e_count_filters(struct i40e_vsi *vsi);
10671140 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);
10681141 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
10691142 #ifdef CONFIG_I40E_DCB
....@@ -1083,17 +1156,22 @@
10831156 void i40e_ptp_set_increment(struct i40e_pf *pf);
10841157 int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
10851158 int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
1159
+void i40e_ptp_save_hw_time(struct i40e_pf *pf);
1160
+void i40e_ptp_restore_hw_time(struct i40e_pf *pf);
10861161 void i40e_ptp_init(struct i40e_pf *pf);
10871162 void i40e_ptp_stop(struct i40e_pf *pf);
1163
+int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset);
10881164 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
10891165 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf);
10901166 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf);
10911167 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf);
10921168 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
10931169
1170
+void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags);
1171
+
10941172 static inline bool i40e_enabled_xdp_vsi(struct i40e_vsi *vsi)
10951173 {
1096
- return !!vsi->xdp_prog;
1174
+ return !!READ_ONCE(vsi->xdp_prog);
10971175 }
10981176
10991177 int i40e_create_queue_channel(struct i40e_vsi *vsi, struct i40e_channel *ch);