.. | .. |
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63 | 63 | #define HWRM_DBG_CMN_FLAGS_MORE 1 |
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64 | 64 | }; |
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65 | 65 | |
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| 66 | +#define BNXT_CRASH_DUMP_LEN (8 << 20) |
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| 67 | + |
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66 | 68 | #define BNXT_LED_DFLT_ENA \ |
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67 | 69 | (PORT_LED_CFG_REQ_ENABLES_LED0_ID | \ |
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68 | 70 | PORT_LED_CFG_REQ_ENABLES_LED0_STATE | \ |
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.. | .. |
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75 | 77 | #define BNXT_LED_DFLT_ENABLES(x) \ |
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76 | 78 | cpu_to_le32(BNXT_LED_DFLT_ENA << (BNXT_LED_DFLT_ENA_SHIFT * (x))) |
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77 | 79 | |
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78 | | -#define BNXT_FW_RESET_AP 0xfffe |
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79 | | -#define BNXT_FW_RESET_CHIP 0xffff |
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| 80 | +#define BNXT_FW_RESET_AP (ETH_RESET_AP << ETH_RESET_SHARED_SHIFT) |
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| 81 | +#define BNXT_FW_RESET_CHIP ((ETH_RESET_MGMT | ETH_RESET_IRQ | \ |
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| 82 | + ETH_RESET_DMA | ETH_RESET_FILTER | \ |
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| 83 | + ETH_RESET_OFFLOAD | ETH_RESET_MAC | \ |
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| 84 | + ETH_RESET_PHY | ETH_RESET_RAM) \ |
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| 85 | + << ETH_RESET_SHARED_SHIFT) |
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| 86 | + |
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| 87 | +#define BNXT_PXP_REG_LEN 0x3110 |
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80 | 88 | |
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81 | 89 | extern const struct ethtool_ops bnxt_ethtool_ops; |
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82 | 90 | |
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| 91 | +u32 bnxt_get_rxfh_indir_size(struct net_device *dev); |
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83 | 92 | u32 _bnxt_fw_to_ethtool_adv_spds(u16, u8); |
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84 | 93 | u32 bnxt_fw_to_ethtool_speed(u16); |
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85 | 94 | u16 bnxt_get_fw_auto_link_speeds(u32); |
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| 95 | +int bnxt_hwrm_nvm_get_dev_info(struct bnxt *bp, |
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| 96 | + struct hwrm_nvm_get_dev_info_output *nvm_dev_info); |
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| 97 | +int bnxt_flash_package_from_file(struct net_device *dev, const char *filename, |
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| 98 | + u32 install_type); |
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86 | 99 | void bnxt_ethtool_init(struct bnxt *bp); |
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87 | 100 | void bnxt_ethtool_free(struct bnxt *bp); |
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88 | 101 | |
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