| .. | .. |
|---|
| 1 | | -/* |
|---|
| 2 | | - * aQuantia Corporation Network Driver |
|---|
| 3 | | - * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved |
|---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
|---|
| 2 | +/* Atlantic Network Driver |
|---|
| 4 | 3 | * |
|---|
| 5 | | - * This program is free software; you can redistribute it and/or modify it |
|---|
| 6 | | - * under the terms and conditions of the GNU General Public License, |
|---|
| 7 | | - * version 2, as published by the Free Software Foundation. |
|---|
| 4 | + * Copyright (C) 2014-2019 aQuantia Corporation |
|---|
| 5 | + * Copyright (C) 2019-2020 Marvell International Ltd. |
|---|
| 8 | 6 | */ |
|---|
| 9 | 7 | |
|---|
| 10 | 8 | /* File hw_atl_b0.h: Declaration of abstract interface for Atlantic hardware |
|---|
| .. | .. |
|---|
| 20 | 18 | extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc107; |
|---|
| 21 | 19 | extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc108; |
|---|
| 22 | 20 | extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc109; |
|---|
| 23 | | - |
|---|
| 24 | | -#define hw_atl_b0_caps_aqc111 hw_atl_b0_caps_aqc108 |
|---|
| 25 | | -#define hw_atl_b0_caps_aqc112 hw_atl_b0_caps_aqc109 |
|---|
| 21 | +extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc111; |
|---|
| 22 | +extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc112; |
|---|
| 26 | 23 | |
|---|
| 27 | 24 | #define hw_atl_b0_caps_aqc100s hw_atl_b0_caps_aqc100 |
|---|
| 28 | 25 | #define hw_atl_b0_caps_aqc107s hw_atl_b0_caps_aqc107 |
|---|
| 29 | 26 | #define hw_atl_b0_caps_aqc108s hw_atl_b0_caps_aqc108 |
|---|
| 30 | 27 | #define hw_atl_b0_caps_aqc109s hw_atl_b0_caps_aqc109 |
|---|
| 31 | | - |
|---|
| 32 | | -#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc108 |
|---|
| 33 | | -#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc109 |
|---|
| 34 | | - |
|---|
| 35 | | -#define hw_atl_b0_caps_aqc111e hw_atl_b0_caps_aqc108 |
|---|
| 36 | | -#define hw_atl_b0_caps_aqc112e hw_atl_b0_caps_aqc109 |
|---|
| 28 | +#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc111 |
|---|
| 29 | +#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc112 |
|---|
| 37 | 30 | |
|---|
| 38 | 31 | extern const struct aq_hw_ops hw_atl_ops_b0; |
|---|
| 39 | 32 | |
|---|
| 40 | 33 | #define hw_atl_ops_b1 hw_atl_ops_b0 |
|---|
| 41 | 34 | |
|---|
| 35 | +int hw_atl_b0_hw_rss_hash_set(struct aq_hw_s *self, |
|---|
| 36 | + struct aq_rss_parameters *rss_params); |
|---|
| 37 | +int hw_atl_b0_hw_offload_set(struct aq_hw_s *self, |
|---|
| 38 | + struct aq_nic_cfg_s *aq_nic_cfg); |
|---|
| 39 | + |
|---|
| 40 | +int hw_atl_b0_hw_ring_tx_start(struct aq_hw_s *self, struct aq_ring_s *ring); |
|---|
| 41 | +int hw_atl_b0_hw_ring_rx_start(struct aq_hw_s *self, struct aq_ring_s *ring); |
|---|
| 42 | + |
|---|
| 43 | +int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring, |
|---|
| 44 | + struct aq_ring_param_s *aq_ring_param); |
|---|
| 45 | +int hw_atl_b0_hw_ring_rx_fill(struct aq_hw_s *self, struct aq_ring_s *ring, |
|---|
| 46 | + unsigned int sw_tail_old); |
|---|
| 47 | +int hw_atl_b0_hw_ring_rx_receive(struct aq_hw_s *self, struct aq_ring_s *ring); |
|---|
| 48 | + |
|---|
| 49 | +int hw_atl_b0_hw_ring_tx_init(struct aq_hw_s *self, struct aq_ring_s *aq_ring, |
|---|
| 50 | + struct aq_ring_param_s *aq_ring_param); |
|---|
| 51 | +int hw_atl_b0_hw_ring_tx_xmit(struct aq_hw_s *self, struct aq_ring_s *ring, |
|---|
| 52 | + unsigned int frags); |
|---|
| 53 | +int hw_atl_b0_hw_ring_tx_head_update(struct aq_hw_s *self, |
|---|
| 54 | + struct aq_ring_s *ring); |
|---|
| 55 | + |
|---|
| 56 | +int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, struct aq_ring_s *ring); |
|---|
| 57 | +int hw_atl_b0_hw_ring_rx_stop(struct aq_hw_s *self, struct aq_ring_s *ring); |
|---|
| 58 | + |
|---|
| 59 | +void hw_atl_b0_hw_init_rx_rss_ctrl1(struct aq_hw_s *self); |
|---|
| 60 | + |
|---|
| 61 | +int hw_atl_b0_hw_mac_addr_set(struct aq_hw_s *self, u8 *mac_addr); |
|---|
| 62 | + |
|---|
| 63 | +int hw_atl_b0_set_fc(struct aq_hw_s *self, u32 fc, u32 tc); |
|---|
| 64 | +int hw_atl_b0_set_loopback(struct aq_hw_s *self, u32 mode, bool enable); |
|---|
| 65 | + |
|---|
| 66 | +int hw_atl_b0_hw_start(struct aq_hw_s *self); |
|---|
| 67 | + |
|---|
| 68 | +int hw_atl_b0_hw_irq_enable(struct aq_hw_s *self, u64 mask); |
|---|
| 69 | +int hw_atl_b0_hw_irq_disable(struct aq_hw_s *self, u64 mask); |
|---|
| 70 | +int hw_atl_b0_hw_irq_read(struct aq_hw_s *self, u64 *mask); |
|---|
| 71 | + |
|---|
| 72 | +int hw_atl_b0_hw_packet_filter_set(struct aq_hw_s *self, |
|---|
| 73 | + unsigned int packet_filter); |
|---|
| 74 | + |
|---|
| 42 | 75 | #endif /* HW_ATL_B0_H */ |
|---|