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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/mtd/nand/raw/socrates_nand.c
....@@ -1,11 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  *  Copyright © 2008 Ilya Yanok, Emcraft Systems
3
- *
4
- *
5
- * This program is free software; you can redistribute it and/or modify
6
- * it under the terms of the GNU General Public License version 2 as
7
- * published by the Free Software Foundation.
8
- *
94  */
105 
116 #include <linux/slab.h>
....@@ -27,6 +22,7 @@
2722 #define FPGA_NAND_DATA_SHIFT		16
2823 
2924 struct socrates_nand_host {
25
+	struct nand_controller	controller;
3026 	struct nand_chip	nand_chip;
3127 	void __iomem		*io_base;
3228 	struct device		*dev;
....@@ -34,15 +30,14 @@
3430 
3531 /**
3632  * socrates_nand_write_buf -  write buffer to chip
37
- * @mtd:	MTD device structure
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+ * @this:	NAND chip object
3834  * @buf:	data buffer
3935  * @len:	number of bytes to write
4036  */
41
-static void socrates_nand_write_buf(struct mtd_info *mtd,
42
-		const uint8_t *buf, int len)
37
+static void socrates_nand_write_buf(struct nand_chip *this, const uint8_t *buf,
38
+				    int len)
4339 {
4440 	int i;
45
-	struct nand_chip *this = mtd_to_nand(mtd);
4641 	struct socrates_nand_host *host = nand_get_controller_data(this);
4742 
4843 	for (i = 0; i < len; i++) {
....@@ -54,14 +49,14 @@
5449 
5550 /**
5651  * socrates_nand_read_buf -  read chip data into buffer
57
- * @mtd:	MTD device structure
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+ * @this:	NAND chip object
5853  * @buf:	buffer to store date
5954  * @len:	number of bytes to read
6055  */
61
-static void socrates_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
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+static void socrates_nand_read_buf(struct nand_chip *this, uint8_t *buf,
57
+				   int len)
6258 {
6359 	int i;
64
-	struct nand_chip *this = mtd_to_nand(mtd);
6560 	struct socrates_nand_host *host = nand_get_controller_data(this);
6661 	uint32_t val;
6762 
....@@ -78,31 +73,19 @@
7873  * socrates_nand_read_byte -  read one byte from the chip
7974  * @mtd:	MTD device structure
8075  */
81
-static uint8_t socrates_nand_read_byte(struct mtd_info *mtd)
76
+static uint8_t socrates_nand_read_byte(struct nand_chip *this)
8277 {
8378 	uint8_t byte;
84
-	socrates_nand_read_buf(mtd, &byte, sizeof(byte));
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+	socrates_nand_read_buf(this, &byte, sizeof(byte));
8580 	return byte;
86
-}
87
-
88
-/**
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- * socrates_nand_read_word -  read one word from the chip
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- * @mtd:	MTD device structure
91
- */
92
-static uint16_t socrates_nand_read_word(struct mtd_info *mtd)
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-{
94
-	uint16_t word;
95
-	socrates_nand_read_buf(mtd, (uint8_t *)&word, sizeof(word));
96
-	return word;
9781 }
9882 
9983 /*
10084  * Hardware specific access to control-lines
10185  */
102
-static void socrates_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
103
-		unsigned int ctrl)
86
+static void socrates_nand_cmd_ctrl(struct nand_chip *nand_chip, int cmd,
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+				   unsigned int ctrl)
10488 {
105
-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
10689 	struct socrates_nand_host *host = nand_get_controller_data(nand_chip);
10790 	uint32_t val;
10891 
....@@ -125,15 +108,27 @@
125108 /*
126109  * Read the Device Ready pin.
127110  */
128
-static int socrates_nand_device_ready(struct mtd_info *mtd)
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+static int socrates_nand_device_ready(struct nand_chip *nand_chip)
129112 {
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-	struct nand_chip *nand_chip = mtd_to_nand(mtd);
131113 	struct socrates_nand_host *host = nand_get_controller_data(nand_chip);
132114 
133115 	if (in_be32(host->io_base) & FPGA_NAND_BUSY)
134116 		return 0; /* busy */
135117 	return 1;
136118 }
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+
120
+static int socrates_attach_chip(struct nand_chip *chip)
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+{
122
+	if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_SOFT &&
123
+	    chip->ecc.algo == NAND_ECC_ALGO_UNKNOWN)
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+		chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
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+
126
+	return 0;
127
+}
128
+
129
+static const struct nand_controller_ops socrates_ops = {
130
+	.attach_chip = socrates_attach_chip,
131
+};
137132 
138133 /*
139134  * Probe for the NAND device.
....@@ -160,28 +155,31 @@
160155 	mtd = nand_to_mtd(nand_chip);
161156 	host->dev = &ofdev->dev;
162157 
158
+	nand_controller_init(&host->controller);
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+	host->controller.ops = &socrates_ops;
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+	nand_chip->controller = &host->controller;
161
+
163162 	/* link the private data structures */
164163 	nand_set_controller_data(nand_chip, host);
165164 	nand_set_flash_node(nand_chip, ofdev->dev.of_node);
166165 	mtd->name = "socrates_nand";
167166 	mtd->dev.parent = &ofdev->dev;
168167 
169
-	/*should never be accessed directly */
170
-	nand_chip->IO_ADDR_R = (void *)0xdeadbeef;
171
-	nand_chip->IO_ADDR_W = (void *)0xdeadbeef;
172
-
173
-	nand_chip->cmd_ctrl = socrates_nand_cmd_ctrl;
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-	nand_chip->read_byte = socrates_nand_read_byte;
175
-	nand_chip->read_word = socrates_nand_read_word;
176
-	nand_chip->write_buf = socrates_nand_write_buf;
177
-	nand_chip->read_buf = socrates_nand_read_buf;
178
-	nand_chip->dev_ready = socrates_nand_device_ready;
179
-
180
-	nand_chip->ecc.mode = NAND_ECC_SOFT;	/* enable ECC */
181
-	nand_chip->ecc.algo = NAND_ECC_HAMMING;
168
+	nand_chip->legacy.cmd_ctrl = socrates_nand_cmd_ctrl;
169
+	nand_chip->legacy.read_byte = socrates_nand_read_byte;
170
+	nand_chip->legacy.write_buf = socrates_nand_write_buf;
171
+	nand_chip->legacy.read_buf = socrates_nand_read_buf;
172
+	nand_chip->legacy.dev_ready = socrates_nand_device_ready;
182173 
183174 	/* TODO: I have no idea what real delay is. */
184
-	nand_chip->chip_delay = 20;		/* 20us command delay time */
175
+	nand_chip->legacy.chip_delay = 20;	/* 20us command delay time */
176
+
177
+	/*
178
+	 * This driver assumes that the default ECC engine should be TYPE_SOFT.
179
+	 * Set ->engine_type before registering the NAND devices in order to
180
+	 * provide a driver specific default value.
181
+	 */
182
+	nand_chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
185183 
186184 	dev_set_drvdata(&ofdev->dev, host);
187185 
....@@ -206,8 +204,12 @@
206204 static int socrates_nand_remove(struct platform_device *ofdev)
207205 {
208206 	struct socrates_nand_host *host = dev_get_drvdata(&ofdev->dev);
207
+	struct nand_chip *chip = &host->nand_chip;
208
+	int ret;
209209 
210
-	nand_release(&host->nand_chip);
210
+	ret = mtd_device_unregister(nand_to_mtd(chip));
211
+	WARN_ON(ret);
212
+	nand_cleanup(chip);
211213 
212214 	iounmap(host->io_base);
213215