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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/mtd/nand/raw/sharpsl.c
....@@ -1,13 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  *  Copyright (C) 2004 Richard Purdie
34  *  Copyright (C) 2008 Dmitry Baryshkov
45  *
56  *  Based on Sharp's NAND driver sharp_sl.c
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License version 2 as
9
- * published by the Free Software Foundation.
10
- *
117  */
128 
139 #include <linux/genhd.h>
....@@ -24,6 +20,7 @@
2420 #include <linux/io.h>
2521 
2622 struct sharpsl_nand {
23
+	struct nand_controller	controller;
2724 	struct nand_chip	chip;
2825 
2926 	void __iomem		*io;
....@@ -59,11 +56,10 @@
5956  *	NAND_ALE: bit 2 -> bit 2
6057  *
6158  */
62
-static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
59
+static void sharpsl_nand_hwcontrol(struct nand_chip *chip, int cmd,
6360 				   unsigned int ctrl)
6461 {
65
-	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
66
-	struct nand_chip *chip = mtd_to_nand(mtd);
62
+	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
6763 
6864 	if (ctrl & NAND_CTRL_CHANGE) {
6965 		unsigned char bits = ctrl & 0x07;
....@@ -76,29 +72,49 @@
7672 	}
7773 
7874 	if (cmd != NAND_CMD_NONE)
79
-		writeb(cmd, chip->IO_ADDR_W);
75
+		writeb(cmd, chip->legacy.IO_ADDR_W);
8076 }
8177 
82
-static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
78
+static int sharpsl_nand_dev_ready(struct nand_chip *chip)
8379 {
84
-	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
80
+	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
8581 	return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
8682 }
8783 
88
-static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
84
+static void sharpsl_nand_enable_hwecc(struct nand_chip *chip, int mode)
8985 {
90
-	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
86
+	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
9187 	writeb(0, sharpsl->io + ECCCLRR);
9288 }
9389 
94
-static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
90
+static int sharpsl_nand_calculate_ecc(struct nand_chip *chip,
91
+				      const u_char * dat, u_char * ecc_code)
9592 {
96
-	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
93
+	struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip));
9794 	ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
9895 	ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
9996 	ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
10097 	return readb(sharpsl->io + ECCCNTR) != 0;
10198 }
99
+
100
+static int sharpsl_attach_chip(struct nand_chip *chip)
101
+{
102
+	if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST)
103
+		return 0;
104
+
105
+	chip->ecc.size = 256;
106
+	chip->ecc.bytes = 3;
107
+	chip->ecc.strength = 1;
108
+	chip->ecc.hwctl = sharpsl_nand_enable_hwecc;
109
+	chip->ecc.calculate = sharpsl_nand_calculate_ecc;
110
+	chip->ecc.correct = nand_correct_data;
111
+
112
+	return 0;
113
+}
114
+
115
+static const struct nand_controller_ops sharpsl_ops = {
116
+	.attach_chip = sharpsl_attach_chip,
117
+};
102118 
103119 /*
104120  * Main initialization routine
....@@ -140,6 +156,10 @@
140156 	/* Get pointer to private data */
141157 	this = (struct nand_chip *)(&sharpsl->chip);
142158 
159
+	nand_controller_init(&sharpsl->controller);
160
+	sharpsl->controller.ops = &sharpsl_ops;
161
+	this->controller = &sharpsl->controller;
162
+
143163 	/* Link the private data with the MTD structure */
144164 	mtd = nand_to_mtd(this);
145165 	mtd->dev.parent = &pdev->dev;
....@@ -153,22 +173,14 @@
153173 	writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
154174 
155175 	/* Set address of NAND IO lines */
156
-	this->IO_ADDR_R = sharpsl->io + FLASHIO;
157
-	this->IO_ADDR_W = sharpsl->io + FLASHIO;
176
+	this->legacy.IO_ADDR_R = sharpsl->io + FLASHIO;
177
+	this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO;
158178 	/* Set address of hardware control function */
159
-	this->cmd_ctrl = sharpsl_nand_hwcontrol;
160
-	this->dev_ready = sharpsl_nand_dev_ready;
179
+	this->legacy.cmd_ctrl = sharpsl_nand_hwcontrol;
180
+	this->legacy.dev_ready = sharpsl_nand_dev_ready;
161181 	/* 15 us command delay time */
162
-	this->chip_delay = 15;
163
-	/* set eccmode using hardware ECC */
164
-	this->ecc.mode = NAND_ECC_HW;
165
-	this->ecc.size = 256;
166
-	this->ecc.bytes = 3;
167
-	this->ecc.strength = 1;
182
+	this->legacy.chip_delay = 15;
168183 	this->badblock_pattern = data->badblock_pattern;
169
-	this->ecc.hwctl = sharpsl_nand_enable_hwecc;
170
-	this->ecc.calculate = sharpsl_nand_calculate_ecc;
171
-	this->ecc.correct = nand_correct_data;
172184 
173185 	/* Scan to find existence of the device */
174186 	err = nand_scan(this, 1);
....@@ -203,13 +215,19 @@
203215 static int sharpsl_nand_remove(struct platform_device *pdev)
204216 {
205217 	struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
218
+	struct nand_chip *chip = &sharpsl->chip;
219
+	int ret;
206220 
207
-	/* Release resources, unregister device */
208
-	nand_release(&sharpsl->chip);
221
+	/* Unregister device */
222
+	ret = mtd_device_unregister(nand_to_mtd(chip));
223
+	WARN_ON(ret);
224
+
225
+	/* Release resources */
226
+	nand_cleanup(chip);
209227 
210228 	iounmap(sharpsl->io);
211229 
212
-	/* Free the MTD device structure */
230
+	/* Free the driver's structure */
213231 	kfree(sharpsl);
214232 
215233 	return 0;