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2023-12-09 b22da3d8526a935aa31e086e63f60ff3246cb61c 
 kernel/drivers/mtd/nand/raw/sh_flctl.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23  * SuperH FLCTL nand controller
34  *
....@@ -5,20 +6,6 @@
56  * Copyright (c) 2008 Atom Create Engineering Co., Ltd.
67  *
78  * Based on fsl_elbc_nand.c, Copyright (c) 2006-2007 Freescale Semiconductor
8
- *
9
- * This program is free software; you can redistribute it and/or modify
10
- * it under the terms of the GNU General Public License as published by
11
- * the Free Software Foundation; version 2 of the License.
12
- *
13
- * This program is distributed in the hope that it will be useful,
14
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
15
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
- * GNU General Public License for more details.
17
- *
18
- * You should have received a copy of the GNU General Public License
19
- * along with this program; if not, write to the Free Software
20
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
21
- *
229  */
2310 
2411 #include <linux/module.h>
....@@ -114,14 +101,12 @@
114101 static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
115102 
116103 static struct nand_bbt_descr flctl_4secc_smallpage = {
117
-	.options = NAND_BBT_SCAN2NDPAGE,
118104 	.offs = 11,
119105 	.len = 1,
120106 	.pattern = scan_ff_pattern,
121107 };
122108 
123109 static struct nand_bbt_descr flctl_4secc_largepage = {
124
-	.options = NAND_BBT_SCAN2NDPAGE,
125110 	.offs = 0,
126111 	.len = 2,
127112 	.pattern = scan_ff_pattern,
....@@ -399,7 +384,8 @@
399384 	dma_addr_t dma_addr;
400385 	dma_cookie_t cookie;
401386 	uint32_t reg;
402
-	int ret;
387
+	int ret = 0;
388
+	unsigned long time_left;
403389 
404390 	if (dir == DMA_FROM_DEVICE) {
405391 		chan = flctl->chan_fifo0_rx;
....@@ -440,13 +426,14 @@
440426 		goto out;
441427 	}
442428 
443
-	ret =
429
+	time_left =
444430 	wait_for_completion_timeout(&flctl->dma_complete,
445431 				msecs_to_jiffies(3000));
446432 
447
-	if (ret <= 0) {
433
+	if (time_left == 0) {
448434 		dmaengine_terminate_all(chan);
449435 		dev_err(&flctl->pdev->dev, "wait_for_completion_timeout\n");
436
+		ret = -ETIMEDOUT;
450437 	}
451438 
452439 out:
....@@ -456,7 +443,7 @@
456443 
457444 	dma_unmap_single(chan->device->dev, dma_addr, len, dir);
458445 
459
-	/* ret > 0 is success */
446
+	/* ret == 0 is success */
460447 	return ret;
461448 }
462449 
....@@ -480,7 +467,7 @@
480467 
481468 	/* initiate DMA transfer */
482469 	if (flctl->chan_fifo0_rx && rlen >= 32 &&
483
-		flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE) > 0)
470
+		!flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_FROM_DEVICE))
484471 			goto convert;	/* DMA success */
485472 
486473 	/* do polling transfer */
....@@ -539,7 +526,7 @@
539526 
540527 	/* initiate DMA transfer */
541528 	if (flctl->chan_fifo0_tx && rlen >= 32 &&
542
-		flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE) > 0)
529
+		!flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_TO_DEVICE))
543530 			return;	/* DMA success */
544531 
545532 	/* do polling transfer */
....@@ -611,21 +598,24 @@
611598 	writel(flcmcdr_val, FLCMCDR(flctl));
612599 }
613600 
614
-static int flctl_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
615
-				uint8_t *buf, int oob_required, int page)
601
+static int flctl_read_page_hwecc(struct nand_chip *chip, uint8_t *buf,
602
+				 int oob_required, int page)
616603 {
604
+	struct mtd_info *mtd = nand_to_mtd(chip);
605
+
617606 	nand_read_page_op(chip, page, 0, buf, mtd->writesize);
618607 	if (oob_required)
619
-		chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
608
+		chip->legacy.read_buf(chip, chip->oob_poi, mtd->oobsize);
620609 	return 0;
621610 }
622611 
623
-static int flctl_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
624
-				  const uint8_t *buf, int oob_required,
625
-				  int page)
612
+static int flctl_write_page_hwecc(struct nand_chip *chip, const uint8_t *buf,
613
+				  int oob_required, int page)
626614 {
615
+	struct mtd_info *mtd = nand_to_mtd(chip);
616
+
627617 	nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);
628
-	chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
618
+	chip->legacy.write_buf(chip, chip->oob_poi, mtd->oobsize);
629619 	return nand_prog_page_end_op(chip);
630620 }
631621 
....@@ -747,9 +737,10 @@
747737 	}
748738 }
749739 
750
-static void flctl_cmdfunc(struct mtd_info *mtd, unsigned int command,
740
+static void flctl_cmdfunc(struct nand_chip *chip, unsigned int command,
751741 			int column, int page_addr)
752742 {
743
+	struct mtd_info *mtd = nand_to_mtd(chip);
753744 	struct sh_flctl *flctl = mtd_to_flctl(mtd);
754745 	uint32_t read_cmd = 0;
755746 
....@@ -923,9 +914,9 @@
923914 	return;
924915 }
925916 
926
-static void flctl_select_chip(struct mtd_info *mtd, int chipnr)
917
+static void flctl_select_chip(struct nand_chip *chip, int chipnr)
927918 {
928
-	struct sh_flctl *flctl = mtd_to_flctl(mtd);
919
+	struct sh_flctl *flctl = mtd_to_flctl(nand_to_mtd(chip));
929920 	int ret;
930921 
931922 	switch (chipnr) {
....@@ -967,17 +958,17 @@
967958 	}
968959 }
969960 
970
-static void flctl_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
961
+static void flctl_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
971962 {
972
-	struct sh_flctl *flctl = mtd_to_flctl(mtd);
963
+	struct sh_flctl *flctl = mtd_to_flctl(nand_to_mtd(chip));
973964 
974965 	memcpy(&flctl->done_buff[flctl->index], buf, len);
975966 	flctl->index += len;
976967 }
977968 
978
-static uint8_t flctl_read_byte(struct mtd_info *mtd)
969
+static uint8_t flctl_read_byte(struct nand_chip *chip)
979970 {
980
-	struct sh_flctl *flctl = mtd_to_flctl(mtd);
971
+	struct sh_flctl *flctl = mtd_to_flctl(nand_to_mtd(chip));
981972 	uint8_t data;
982973 
983974 	data = flctl->done_buff[flctl->index];
....@@ -985,18 +976,9 @@
985976 	return data;
986977 }
987978 
988
-static uint16_t flctl_read_word(struct mtd_info *mtd)
979
+static void flctl_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
989980 {
990
-	struct sh_flctl *flctl = mtd_to_flctl(mtd);
991
-	uint16_t *buf = (uint16_t *)&flctl->done_buff[flctl->index];
992
-
993
-	flctl->index += 2;
994
-	return *buf;
995
-}
996
-
997
-static void flctl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
998
-{
999
-	struct sh_flctl *flctl = mtd_to_flctl(mtd);
981
+	struct sh_flctl *flctl = mtd_to_flctl(nand_to_mtd(chip));
1000982 
1001983 	memcpy(buf, &flctl->done_buff[flctl->index], len);
1002984 	flctl->index += len;
....@@ -1004,6 +986,7 @@
1004986 
1005987 static int flctl_chip_attach_chip(struct nand_chip *chip)
1006988 {
989
+	u64 targetsize = nanddev_target_size(&chip->base);
1007990 	struct mtd_info *mtd = nand_to_mtd(chip);
1008991 	struct sh_flctl *flctl = mtd_to_flctl(mtd);
1009992 
....@@ -1016,11 +999,11 @@
1016999 
10171000 	if (mtd->writesize == 512) {
10181001 		flctl->page_size = 0;
1019
-		if (chip->chipsize > (32 << 20)) {
1002
+		if (targetsize > (32 << 20)) {
10201003 			/* big than 32MB */
10211004 			flctl->rw_ADRCNT = ADRCNT_4;
10221005 			flctl->erase_ADRCNT = ADRCNT_3;
1023
-		} else if (chip->chipsize > (2 << 16)) {
1006
+		} else if (targetsize > (2 << 16)) {
10241007 			/* big than 128KB */
10251008 			flctl->rw_ADRCNT = ADRCNT_3;
10261009 			flctl->erase_ADRCNT = ADRCNT_2;
....@@ -1030,11 +1013,11 @@
10301013 		}
10311014 	} else {
10321015 		flctl->page_size = 1;
1033
-		if (chip->chipsize > (128 << 20)) {
1016
+		if (targetsize > (128 << 20)) {
10341017 			/* big than 128MB */
10351018 			flctl->rw_ADRCNT = ADRCNT2_E;
10361019 			flctl->erase_ADRCNT = ADRCNT_3;
1037
-		} else if (chip->chipsize > (8 << 16)) {
1020
+		} else if (targetsize > (8 << 16)) {
10381021 			/* big than 512KB */
10391022 			flctl->rw_ADRCNT = ADRCNT_4;
10401023 			flctl->erase_ADRCNT = ADRCNT_2;
....@@ -1058,13 +1041,13 @@
10581041 		chip->ecc.strength = 4;
10591042 		chip->ecc.read_page = flctl_read_page_hwecc;
10601043 		chip->ecc.write_page = flctl_write_page_hwecc;
1061
-		chip->ecc.mode = NAND_ECC_HW;
1044
+		chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
10621045 
10631046 		/* 4 symbols ECC enabled */
10641047 		flctl->flcmncr_base |= _4ECCEN;
10651048 	} else {
1066
-		chip->ecc.mode = NAND_ECC_SOFT;
1067
-		chip->ecc.algo = NAND_ECC_HAMMING;
1049
+		chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
1050
+		chip->ecc.algo = NAND_ECC_ALGO_HAMMING;
10681051 	}
10691052 
10701053 	return 0;
....@@ -1148,10 +1131,8 @@
11481131 	flctl->fifo = res->start + 0x24; /* FLDTFIFO */
11491132 
11501133 	irq = platform_get_irq(pdev, 0);
1151
-	if (irq < 0) {
1152
-		dev_err(&pdev->dev, "failed to get flste irq data: %d\n", irq);
1134
+	if (irq < 0)
11531135 		return irq;
1154
-	}
11551136 
11561137 	ret = devm_request_irq(&pdev->dev, irq, flctl_handle_flste, IRQF_SHARED,
11571138 			       "flste", flctl);
....@@ -1183,26 +1164,27 @@
11831164 
11841165 	/* Set address of hardware control function */
11851166 	/* 20 us command delay time */
1186
-	nand->chip_delay = 20;
1167
+	nand->legacy.chip_delay = 20;
11871168 
1188
-	nand->read_byte = flctl_read_byte;
1189
-	nand->read_word = flctl_read_word;
1190
-	nand->write_buf = flctl_write_buf;
1191
-	nand->read_buf = flctl_read_buf;
1192
-	nand->select_chip = flctl_select_chip;
1193
-	nand->cmdfunc = flctl_cmdfunc;
1194
-	nand->set_features = nand_get_set_features_notsupp;
1195
-	nand->get_features = nand_get_set_features_notsupp;
1169
+	nand->legacy.read_byte = flctl_read_byte;
1170
+	nand->legacy.write_buf = flctl_write_buf;
1171
+	nand->legacy.read_buf = flctl_read_buf;
1172
+	nand->legacy.select_chip = flctl_select_chip;
1173
+	nand->legacy.cmdfunc = flctl_cmdfunc;
1174
+	nand->legacy.set_features = nand_get_set_features_notsupp;
1175
+	nand->legacy.get_features = nand_get_set_features_notsupp;
11961176 
11971177 	if (pdata->flcmncr_val & SEL_16BIT)
11981178 		nand->options |= NAND_BUSWIDTH_16;
1179
+
1180
+	nand->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE;
11991181 
12001182 	pm_runtime_enable(&pdev->dev);
12011183 	pm_runtime_resume(&pdev->dev);
12021184 
12031185 	flctl_setup_dma(flctl);
12041186 
1205
-	nand->dummy_controller.ops = &flctl_nand_controller_ops;
1187
+	nand->legacy.dummy_controller.ops = &flctl_nand_controller_ops;
12061188 	ret = nand_scan(nand, 1);
12071189 	if (ret)
12081190 		goto err_chip;
....@@ -1224,9 +1206,13 @@
12241206 static int flctl_remove(struct platform_device *pdev)
12251207 {
12261208 	struct sh_flctl *flctl = platform_get_drvdata(pdev);
1209
+	struct nand_chip *chip = &flctl->chip;
1210
+	int ret;
12271211 
12281212 	flctl_release_dma(flctl);
1229
-	nand_release(&flctl->chip);
1213
+	ret = mtd_device_unregister(nand_to_mtd(chip));
1214
+	WARN_ON(ret);
1215
+	nand_cleanup(chip);
12301216 	pm_runtime_disable(&pdev->dev);
12311217 
12321218 	return 0;
....@@ -1242,7 +1228,7 @@
12421228 
12431229 module_platform_driver_probe(flctl_driver, flctl_probe);
12441230 
1245
-MODULE_LICENSE("GPL");
1231
+MODULE_LICENSE("GPL v2");
12461232 MODULE_AUTHOR("Yoshihiro Shimoda");
12471233 MODULE_DESCRIPTION("SuperH FLCTL driver");
12481234 MODULE_ALIAS("platform:sh_flctl");